chip manufacturing

In the rapidly-evolving semiconductor industry, maintaining a competitive edge is crucial. To position Europe at the forefront of global semiconductor innovation, imec is leading the NanoIC pilot line initiative. Aligned with the European Chips Act, this initiative is a strategic move to bolster Europe's leadership in key markets like high performance computing, automotive, and healthcare.SEMI spoke with Srikanth Samavedam and Jo De Boeck from imec, Belgium, to learn more about the NanoIC pilot line and to better understand its goals, challenges, and prospects. From transitioning to gate-all-around (GAA) nanosheet devices, to developing advanced memory technologies and interconnects, this conversation highlights the cutting-edge advancements made possible through collaboration across the industry’s value chain.SEMI: How is the NanoIC pilot line working to revolutionize the semiconductor industry, and what are its main objectives?Samavedam: The NanoIC pilot line is a European initiative aimed at bridging the gap between R D and industrial innovation. The project is creating a beyond-2nm system-on-chip (SoC) pilot line, developing advanced logic, memory, and interconnect technologies. This effort supports the European Chips Act's vision for leadership and competitiveness in global semiconductor innovation, particularly in critical markets like high performance computing, communication, automotive, energy, and healthcare. However, advanced technologies come with more complexity, and addressing these complexity challenges requires more mature module baseline flows. By improving baseline flow repeatability and variability while reducing defectivity, we can accelerate the development of future technologies. The NanoIC pilot line is working to provide access to these advanced technologies and baselines to develop future compute systems. This will help ensure European competitiveness across the industry – from semiconductor materials, equipment and design to systems and applications.SEMI: Who are the core partners involved in this initiative?De Boeck: Key partners of the pilot line include CEA-Leti, Fraunhofer-Gesellschaft, VTT Technical Research Centre of Finland, Tyndall National Institute, and the Center for Surface Science and Nanotechnology of the University POLITEHNICA of Bucharest. This project is also supported by the Flemish government, other participating states, and the Chips Joint Undertaking of the EU Chips Act.These institutions and organizations bring a wealth of knowledge and resources, and imec compliments their efforts by providing access to its global partnerships with key industry leaders. The NanoIC pilot line is helping strengthen Europe’s global semiconductor industry leadership while aligning efforts with other regional Chips Acts. SEMI: Can you elaborate on the significance of transitioning from field-effect transistors (FinFETs) transistors to GAA nanosheet devices in CMOS technology?Samavedam: The transition from FinFETs to GAA nanosheet devices is a significant advancement in CMOS device technology. FinFETs have been the backbone of CMOS technology from the 22nm to the 3nm node. But starting at the 2nm node, nanosheet devices will need to be introduced. Nanosheet devices, including variants like Forksheet devices, are expected to drive scaling and performance through three generations – 2nm, A14, and A10. Complementary FET (CFET) architectures are also expected to be introduced around 2031 at the A7 node, which will represent another major inflection point in CMOS device design. This progression requires extensive research into new materials, process modules, equipment, and advanced patterning capabilities using high numerical aperture extreme ultraviolet (high NA EUV) lithography – all of which will be implemented on the NanoIC pilot line. FIGURE PROVIDED BY IMEC │ SCHEMATIC ILLUSTRATION OF A FUTURE COMPUTE SYSTEM. THE SYSTEM IS MADE OF LARGE MULTI-DIE ELECTRICAL-OPTICAL INTERPOSER PROVIDING ELECTRICAL AND OPTICAL INTERCONNECTS BETWEEN THE VARIOUS CHIPLETS (CPUS, GPUS, HBM). ALSO SHOWN ARE CONNECTIONS TO PACKAGE SUBSTRATE, AS WELL AS FIBER CONNECTORS AND AN INTEGRATED LASER SOURCE. CENTRAL PROCESSING UNIT (CPU); GRAPHICS PROCESSING UNIT (GPU); HIGH BANDWITH MEMORY (HBM); PROCESSING UNIT THAT CAN INCLUDE CPUS, GPUS, AND OTHER SPECIALIZED PROCESSORS (XPU); APPLICATION-SPECIFIC INTEGRATED CIRCUIT (ASIC); ELECTRONIC INTEGRATED CIRCUIT (EIC); FF-LEVEL: FEMTOFARAD-LEVEL; FIELD-PROGRAMMABLE GATE ARRAY (FGPA); GAAS QD: GALLIUM ARSENIDE QUANTUM DOT; INTEGRATED SILICON PHOTONICS PLATFORM 300MM (ISIPP300); REDISTRIBUTION LAYER (RDL); SILICON PHOTONICS (SIPHO); THROUGH PACKAGE VIA (TPV). SEMI: What are the key innovations necessary for advancing memory technology?Samavedam: As SRAM scaling slows, the exploration of novel, dense embedded memory concepts will become imperative. Technologies like spin orbit torque magnetic RAM (SOT-MRAM) and 2-transistor 0-capacitor (2T0C) embedded DRAM using deposited semiconductors like indium gallium zinc oxide (IGZO) are promising. These innovations address memory capacity and bandwidth challenges from new workloads in compute systems. Additionally, developing a 3D memory platform to explore future memory options will be essential for improving SRAM and DRAM. These advancements will help meet the demands of new applications like machine learning, augmented and virtual reality, and autonomous vehicles.SEMI: How do advanced interconnect technologies contribute to the future of semiconductor design?Samavedam: Advanced interconnect technologies, like chip-to-chip lateral (2.5D or interposer technologies) and vertical interconnects (3D technologies), play a crucial role in addressing memory capacity and bandwidth challenges. These technologies enable the partitioning of SoC functions into separate dies, allowing for more efficient and scalable designs. Advances like pitch scaling of micro-bumps and copper (Cu) hybrid bonding are facilitating this fine-grained partitioning of SoC functions. Additionally, optical interconnects and 3D interconnect-enabled co-packaging provide high-bandwidth and low-power connectivity at wafer scale. The rise of chiplet architectures and standardization will also increase the demand for low-cost, tight-pitch interconnect technologies like Cu/polymer redistribution layers.SEMI: How do your collaborators benefit from the NanoIC pilot line? De Boeck: One of the biggest collaborator benefits is the pilot line’s commitment to knowledge sharing through R D access and training. We invite foundries, IDMs, materials suppliers, equipment suppliers, and system companies/OEMs to jointly develop the materials, process modules, and integration flows to accelerate the development of beyond-2nm SoC technology pillars.Design pathfinding and system exploration process design kits (PDKs) will be available for start-ups, small- and medium enterprises, universities, and design and system companies to aid in prototyping and testing their designs. The NanoIC pilot line will also offer comprehensive training programs, including virtual PDK training, bootcamps for faculty, and internships and expert courses for students. To learn more, experts and key partners of the NanoIC pilot line will be presenting from 14 -16:40 at SEMICON Europa on November 12. imec’s program, ITF Chip into the Future, will highlight advancements in digital technology, capacity building through the European Chips Act, and the role of the NanoIC pilot line in accelerating beyond-2nm innovation. The conversation will also address industry requirements for pilot lines, emerging initiatives boosting Europe’s innovation and competitiveness, and perspectives on advanced materials and semiconductor equipment. Srikanth Samavedam, Senior Vice President of Semiconductor Technologies at imec, oversees programs in logic, memory, photonics, and 3D integration. Previously, he was a senior director at GlobalFoundries, leading 14nm FinFET technology into production and developing 7nm CMOS. Starting his career at Motorola, he worked on strained silicon and other advanced materials. He holds a Ph.D. in materials science and engineering from MIT and a master's degree from Purdue University. Jo De Boeck, Executive Vice President and Chief Strategy Officer at imec, oversees the company’s strategic direction and serves on its executive board. He joined imec in 1991 after earning his Ph.D. from KU Leuven and has since held various leadership roles, including head of imec’s Smart Systems and Energy Technology business unit and CTO. De Boeck is also a part-time professor at KU Leuven. Maria Daniela Perez / Communications Manager, SEMI EuropePhone: +49 160 2562977Email: [email protected]

To help companies create their workforce development plans as part of the CHIPS Act funding application, we created the SEMI Foundation Workforce Development and DEI Menu of Services – packages of workforce development programs currently offered by the SEMI Foundation.

As the world confronts the health crisis of a generation in the form of the fast-spreading coronavirus, the microelectronics industry remains firmly in the spotlight. Aware of the central role they play in the fight against the COVID-19 pandemic, a growing number of companies are joining efforts to combat the virus by developing technologies for coronavirus detection, contact tracing and predicting its spread.SkyWater Technology, a U.S.-based foundry and prestigious member of SEMI-Fab Owners Alliance, is on the front lines in supplying an essential microfluidic MEMS component used in COVID-19 testing and research to identify mutations of the virus. This component is instrumental for the sequencing kit in the DNBSEQ-T7 system, an ultra-high-throughput sequencing system manufactured by MGI, a subsidiary of global genomics leader BGI Group.SEMI had the pleasure to catch up with Thomas Sonderman, president of SkyWater Technology, to talk about the company’s valuable contribution to the detection of COVID-19. He also gave us a peek into its business continuity plan and the safety measures it is taking to resiliently run a 24/7 chip-making operation amid these unprecedented times.SEMI: Tell us about SkyWater's contribution to the detection of COVID-19 and your partnership with MGI?Sonderman: SkyWater has been working with genomics sequencing leader MGI for several years to supply a critical component used in MGI's DNBSEQ-T7, an ultra-high-throughput sequencing system. The component we supply to MGI is a microfluidic MEMS device that uses microscopic channels to help perform very small-scale chemical reactions in the genetic sequencing platform. MGI's DNBSEQ-T7 identifies and monitors possible mutations of viruses, which is important for epidemiologists when tracking how viral illnesses such as COVID-19 spread through human populations.MGI’s sequencing system is used in parallel with its sister company BGI Genomics’ RT-PCR test kit, which is typically used more broadly as an initial screening agent due to its ability to return virus detection results within a matter of hours. Sequencing with the DNBSEQ-T7 can be used to confirm results of the RT-PCR tests that have indicated positive for the presence of the virus and then to perform a full DNA sequence of these positive specimens, which can help track mutations in the virus.DNBSEQ-T7 is important in the fight against COVID-19 as it tracks how the virus changes and enables scientists to look at its genetic sequence like a fingerprint at a crime scene. Their focus is on finding sudden changes in the sequence over time — a mutation. When they analyze available genomes from infected patients in several countries, they can see if inevitable virus mutations are causing associated illnesses that may have different incubation periods, contagiousness or deadliness – all critical dynamics that must be tracked by public health officials during an outbreak such as this.SEMI: What was the path that brought your company to the forefront of this testing?Sonderman: MGI’s DNBSEQ-T7 sequencing system and BGI’s RT-PCR rapid testing kit were among the first officially approved products by the National Medical Products Administration (NMPA – essentially China’s version of the FDA) – to fight the outbreak. MGI’s manufacturing plant, based in Wuhan, was able to fast-track its response, producing and delivering test kits very quickly to many hospitals and disease control centers in Wuhan and other cities in China.As concerns continue to rise about COVID-19 and we strive to flatten the curve, the pressure is on to enable even faster, more accessible testing. On March 27th, BGI’s RT-PCR virus detection test received FDA Emergency Use Authorization (EUA) for use in the U.S. The test works in just three hours. MGI’s DNBSEQ™ T7 sequencers are being used in China and other countries now and will be available in the U.S. starting in Q3. Products from BGI/MGI and affiliates are currently being distributed to more than 70 countries and regions worldwide to assist the global efforts in fighting the pandemic.SkyWater is certified to the ISO 13485 Quality Standard for Medical Devices to support the design, development and fabrication of DNA sequencing and other biochip applications in a wide range of emerging biomedical market segments. This allows us to provide this type of cutting-edge technology solution that is making an important contribution to coronavirus detection.SEMI: Given the challenges COVID-19 has placed on workforce and supply chain, what steps are being taken by your company to mitigate disruptions? Sonderman: SkyWater has been identified as Essential Critical Infrastructure per the U.S. Dept. of Homeland Security in several categories including Healthcare/Public Health Sector, Defense Industrial Base Sector, Information Technology Sector, and Critical Manufacturing Sector. To maintain continuity of operations, we contacted our close market partners as we need their support to continue supply of their starting and manufacturing support materials necessary for us to maintain operations. We asked these organizations to make every reasonable effort to fulfill our order requirements while also following recommended protective measures and are actively monitoring these relationships for possible developments that could be disruptive. By means of their partnership with us, these suppliers, too, are a part of the Essential Critical Infrastructure. Currently, there has been no change in wafer operations or fab utilization during this time of COVID-19.In addition to our sustained operations, our fab expansion is well underway as construction continues. The over 60,000-square-foot facility expansion adds clean room area and infrastructure to support the Department of Defense’s investment in SkyWater to broaden our production capabilities for Strategic Rad-Hard electronics and other complementary technologies. A fab technician in SkyWater’s SkyTech Center, an expansion of its operations to enhance advanced processing capabilities at its U.S.-based and U.S.-owned manufacturing facility. SEMI: What advice would you give to other companies seeking to keep their operations running amid COVID-19?Sonderman: First and foremost, creating a Pandemic Response Team (PRT) was critical for us in planning how to operate and communicate during this crisis. Our PRT updates our leadership team multiple times per week to enact procedures and ensure alignment throughout the organization. We follow CDC alerts and other local, state, and federal government guidelines on how to deal with home and work environments while communicating with all company stakeholders. This is important in providing reassurance of the company’s continued business and details on any potential change in operations.Increasing the frequency of communication with the organization’s supply chain to anticipate any disruptions in service is vital. Also, keeping in contact with customers is imperative to take the pulse of their continued operations during COVID-19. We recommend being flexible and pursuing new paradigms in getting business accomplished, such as telecommuting. In addition, if a company is deemed an essential business, we suggest drafting a letter in advance for employees should they need to prove why they are in transit (to and from work) if transportation becomes severely limited and monitored.Communicating with employees on how operations are changing is crucial. Ensure there is an intranet site that employees can access remotely via laptops or mobile devices that allows for ongoing updates and a way to communicate to all employees as things continue to evolve.We also put several safety measures in place, including: A screening process was set up to take the temperature of everyone entering the building. Site access is restricted for vendors, contractors, customers and other visitors as a default policy. Employee travel is restricted. All employees who can do their jobs from home can stay home. For essential on-site workers, we allow flexible schedules so people can move shifts if needed. Shifts have been staggered so people are not congested at lockers, gowning areas and other places. Physical distancing is required everywhere inside and outside the building. Video conferencing is being used even for participants inside the building. The number of people allowed in conference rooms is limited to comply with physical distancing; some chairs were removed and maximum occupancy signs were posted. Hand-sanitizing stations have been set up. We are providing employees access to masks, gloves and cleaning wipes. Safety measures are posted around the building and cleaning frequency of hard surfaces has been ramped significantly. These safety measures are among several other modifications we’ve made to daily operating procedures. SEMI: Please share some examples of how the SEMI Fab Owners Alliance (FOA) has helped support your business?Sonderman: Our Pandemic Response Team has leveraged the FOA recently by participating in its webinars on COVID-19 to ensure we are using industry best practices. We also use FOA surveys to provide and request information pertaining to COVID-19 practices.We have implemented building entrance protocols (i.e. temperature scanning, restricting access for non-employees) and expanded building cleaning procedures, including increasing the cleaning frequency of specific high-touch items. We have adjusted shift start times to minimize the number of personnel in the change room at the same time and we store each fab worker’s hood in the sleeve of the suit. These last two items resulted from a conversation with another FOA member.Outside of the pandemic, we have leveraged the FOA by participating in its industry-wide maintenance best practices and learning group that meets monthly on maintenance needs, issues and concerns within the industry. This allows us to learn from each other within the semiconductor industry. We have also leveraged this group in sourcing parts and/or parts sharing on tools no longer supported by OEMs.We greatly value the type of cross-organizational sharing and learning the FOA facilitates. It has been beneficial in a number of ways over the years. At this time, the FOA is especially useful when best practices are crucial to enable us and our peers to minimize disruptions, operate with the utmost safety, and quickly adapt to this new environment.SkyWater is a member of the SEMI Fab Owners Alliance, an international group of semiconductor and MEMS fab managers and industry suppliers that meets regularly to solve common non-competitive manufacturing issues and improve their business results. Nishita Rao is a product marketing manager at SEMI.

Sandia National Laboratories just finished updating equipment in its microelectronics fab, marking the completion of the first phase of a 3-year fab upgrade program. The transition from 6-inch to 8-inch wafer sizes will align the Department of Energy national lab with industry standards to ensure easier access to tools, spare parts and raw materials.Sandia is a prestigious member of the SEMI Fab Owners Alliance (SEMI FOA), an international group of semiconductor and MEMS fab managers and industry suppliers that meet regularly to solve common non-competitive manufacturing issues and improve their business results. SEMI spoke with Michael Holmes, senior manager of microfabrication at Sandia, about its approach to revitalizing the fab while developing new production processes and technologies.SEMI: What were the main challenges in moving into production with 8-inch wafers?Holmes: The goal of the conversion is to reestablish our 6-inch production processes on 8-inch wafers including our radiation hardened 350nm CMOS and MEMS technologies. This requires tuning hundreds of interrelated parameters to get the same end result as before but with different equipment and at a larger scale. In addition, during the conversion we are developing a new 180nm radiation hardened CMOS production process and re-establishing research work on 8” in our silicon photonics and ion trap technologies. Modifications to the facility have also been required including raising the ceiling to install the new implanter and relocating our gowning area to facilitate installation of new CMP tools. In addition to converting our Silicon fabrication facility, we are also converting select equipment in our compound semiconductor facility. We are one large team working toward these goals.SEMI: Were there any roadblocks in sustaining production of the 6-inch wafers while planning and implementing processes for the upgrade to 8-inch?Holmes: Six years of planning ensured the conversion would not affect production of components needed for national defense. This planning window was required to ensure production commitments were completed in advance of conversion start in August of 2018 and return to production for commitments starting in July 2021. This period provides time to complete the hardware conversion and steps review and requalify the production line to ensure products made using the new equipment are identical to ones produced by the old equipment. The hardware conversion phase completed on schedule and the fabrication of prototype and research components on 8-inch started in November of 2018.SEMI: Can you shed some light on the development of gold antennas that promise to improve the thermal infrared radiation capabilities in systems?Holmes: Sandia developed a new infrared detector design that breaks away from relying on thick layers of detector material and instead uses a subwavelength nanoantenna – a patterned array of gold square or cross shapes – to concentrate light on a thinner layer of material. This design uses just a fraction of a micron of detector material, whereas traditional thermal infrared detectors have a thickness of 5 to 10 microns. The nanoantenna-enhanced design increases the amount of an infrared radiation a detector can see while also reducing image distortion caused by background noise. It also allows for the invention of new detector concepts.SEMI: Sandia is known for producing high-reliability components. Several SEMI FOA members have customers in the automotive domain, where reliability is critical. Do you have any advice for them on their path to high-reliability, zero-defect systems?Holmes: High-reliability microdevices at Sandia’s MESA facility are paramount. A structured quality program is rigorously realized in each facet of the production process. Our processes and design rules are constructed around reliability, and we extensively leverage in-line metrology and electrical test to validate devices throughout production. SEMI: Are there any examples of how the FOA peer-to-peer dialogue and knowledge sharing helped in your upgrade from 6-inch to 8-inch?Holmes: Sandia is new to the FOA. Our initial interactions have been very valuable, and members have shared insights into metrics and process improvements that will benefit MESA moving forward. Relative to the 6-inch to 8-inch conversion, as part of our planning process, we did engage other foundries within the FOA to solicit feedback and lessons learned.The mission of the Fab Owners Alliance is to provide value to the fab management and operations community through collaborative platforms for device makers and solution providers.Nishita Rao is marketing manager for technology communities at SEMI.

Imagine a world where there are chips in about everything we touch on a daily basis. It is not hard to do with semiconductors already at the core of many leading-edge electronic devices. These sophisticated chips are hidden from sight, but their functions are vitally significant to our daily lives.Manufactured in multibillion-dollar facilities, the production process of chips is one of the riskiest, costliest, and most technically complex feats in business. Consider the difficulties of managing contaminants during device manufacturing: A single speck of dust on a lens could cause the entire output of the plant to be scrapped.For years, these exotic fabrication facilities, called fabs, have been packing more efficiency into ever smaller chips. As new technologies continue to emerge, chip manufacturers face constant pressure to continually refine and improve their operations to meet the challenge of rising device performance and yield goals. Fab managers must optimize tool performance, improve fabrication techniques, safely handle toxic materials and design better integration flows. Layer on top of those requirements customer demand for greater innovation and quality of service, it can be difficult for manufacturers to handle everything on their own while consistently meeting necessary requirements.Align for CollaborationWith the help of the Fab Owners Alliance (FOA), a SEMI technology community, manufacturers and their suppliers don’t have to travel this road alone. Membership in this international group allows semiconductor and MEMS fab managers and industry suppliers to come together to solve common non-competitive manufacturing issues and improve business results.Founded in 2004, the group consists of 25+ device manufacturers (DMs) with over 120 semiconductor manufacturing facilities and 60+ solution providers (SPs) who supply equipment and services. Through quarterly meetings, study teams, benchmarking surveys, case studies and online forums, FOA successfully provides a collaborative, non-competitive platform to the fab management and operations community. FOA members enjoying an engaging discussion and networking event during the recent Q1 2019 Collaborative Forum at the Double Tree Resort in Scottsdale, Arizona One of the most popular FOA platforms is the annual Collaborative Forum early in the year. The goal is to bring together DMs and SPs from around the world for an open dialogue under one roof. For two days, they share success stories and discuss issues facing their fabs and the industry in general and develop collective strategies to address them.The success stories are particularly engaging as they accentuate the value and benefits of FOA membership. Presented as case studies, these stories outline how the DMs and SPs work together to improve fab efficiency and increase yields. Often, the ideas for the case studies are conceived during networking events, fab tours and programs organized by the FOA.The case studies shared at the 2019 Collaborative Forum, held at the Double Tree Resort in Scottsdale, Arizona, February 13-14, 2019, illustrate the power of collaboration within the FOA. Following are a few examples.Scheduling System Implementation Broadcom was facing a steep ramp when it decided to engage with FPS, an INFICON product line. In addition, the manual decision making, and limited real-time visibility of factory data was negatively impacting their production in its 150mm and 200mm environment. By deploying an integrated Smart Manufacturing software solution and its digital twin, FPS was able to retrofit Broadcom’s manual factory with automated decision-making capabilities.This solution offered many benefits. Constraint tool utilization increased by more than 15 percent. The automated WIP management system also eliminated many manual wafer handling issues such as lost lots, WIP storage constraints, building transfers, and time spent looking for lots. Pushing Tool Performance BoundariesAs tools in the 200mm space are hard to find, GLOBALFOUNDRIES is always looking to squeeze every wafer out of its existing resources. To drive continuous improvement and increase equipment throughput, GLOBALFOUNDRIES leveraged MAX’s knowledge with Machine Rate Models. Together, they were able to employ a modelling technique that helped them model key toolsets and develop actions to increase intrinsic machine rate performance.Based on this knowledge, 10 capacity constraints were selected, and speed models were developed for all of them. This win-win collaboration allowed GLOBALFOUNDRIES to find some real opportunities that translated into CAPEX and cost savings. On average, the companies identified a 12 percent potential improvement opportunity per toolset and created engineering task force teams to prioritize and drive the improvements.Simplifying the Chamber Matching Process Using Trace AnalyticsThe collaboration between NXP and BISTel resulted from a shared vision of achieving Smart Manufacturing using analytic solutions enabled by artificial intelligence and other advanced technologies. Chamber matching is critical in identifying process variation to ensure manufacturing quality. Traditional tools like Fault Detection Classification (FDC) often do not provide clear enough insights to pinpoint the issues and require extensive time to collect data from each chamber.Through several use cases, NXP and BISTel successfully illustrated the effectiveness of using a trace analytic solution to quickly and accurately quantify and monitor chamber-to-chamber mismatches as well as changes within a chamber over time. The full trace analyses of all parameters allowed NXP to generate better FDC models to more quickly detect similar issues in the future. In addition, NXP was able to identify the cause of a parametric shift by comparing performance of the same chamber between two different time periods. All in all, the trace analytics solution brought together and analyzed the process data efficiently, thereby reducing analysis time from days to minutes.Eagleview Inspection of SiC and Transparent Wafers X-FAB challenged Microtronic to develop a new capability for its high-throughput recipe-less macro defect inspection systems. Microtronic’s EagleView machine vision macro defect inspection system is well known for its versatility in the semiconductor industry due to its wide deployment as well as its recognition as winner of the 2017 Best of West Award at SEMICON West. But X-FAB’s requirements to inspect and image transparent wafer substrates were novel. After working closely to understand X-FAB’s needs, Microtronic made extensive hardware and software enhancements to enable high-throughput macro inspection of Silicon Carbide (SiC) and other transparent wafer substrates.Get InvolvedThe FOA meetings are held at device manufacturing sites twice a year. The next meeting will be graciously hosted by MACOM in Lowell, Massachusetts, May 22-23, 2019. The DMs and SPs will meet again at SEMICON West at the Moscone Center in San Francisco on July 11, 2019.To attend these meeting and be part of this high-impact group, please email us at [email protected]. For more information about FOA, please visit our website.Nishita Rao is a marketing manager at SEMI.