energy efficiency

Artificial intelligence (AI) is scaling at a pace that is reshaping semiconductor roadmaps, data center design, and long-term infrastructure strategy. AI promises many economic and social benefits; but the growth comes with an escalating demand for power, and energy has emerged as a major challenge.SEMI, as the global semiconductor and electronics association connecting over 4,000 companies, continues to unite the entire ecosystem to “bend the curve” – to maximize AI performance while minimizing power consumption. In a series of successful, sold-out workshops that the SEMI Smart Data-AI Initiative held on this topic, a resonant theme has emerged: sustaining AI progress requires energy-efficient computing with holistic co-design and co-optimization across materials, devices, systems, data transmission, data centers, emerging architectures and software. While this dialog is an important starting point, the ultimate goal is to drive concrete action through collaborative innovation.The AI Energy ChallengeAI training compute for frontier models is growing at an estimated 4–5x per year, driving unprecedented demand for hardware capability and infrastructure capacity. That trajectory has resulted in a global “data center gold rush” and is testing energy availability limits. As model sizes scale exponentially, so too does the energy required to train and deploy them; and power consumption has become a significant limiter to performance gains. Further, this increases heat dissipation, and requires innovations like direct liquid cooling.Modern AI and high-performance computing systems now operate at levels comparable to small cities, with tens of megawatts per installation and a trajectory toward gigawatt-scale data center campuses. Grid capacity—both in the U.S. and globally—may be challenged to keep pace with projected demand. Thus, AI infrastructure is no longer just a technical challenge, but it is an energy, systems, and policy challenge.System-Technology Co-OptimizationContinuous advances in chip and inference efficiency have delivered orders-of-magnitude improvements over many decades. These gains must now be expanded by holistic co-optimization of the entire compute system from silicon technologies to data center to the grid.For example, processors can be made more efficient by customizing them for specific workloads. However, only part of total data center power is consumed by the processor itself. A significant portion is used by data movement, power conversion and cooling. The energy required to move data increases dramatically with distance. Moving bits across packages, boards, and networks can consume far more energy than the compute operations themselves. This makes locality a critical design principle. The opportunity—and necessity—therefore lies in cross-layer optimization: efficient compute, efficient communication, and intelligent power management across the entire system. Not surprisingly, advanced packaging and integration are becoming central to performance. These technologies can enable architectures that tightly couple compute, memory, and I/O—using 2.5D and 3D integration techniques—reducing energy per bit and increasing bandwidth. Photonic interconnects and low-power materials can further lower the cost of processing and moving data.The bottom line is that incremental chip-level gains alone will not be sufficient and energy optimization cannot be siloed—system-technology co-optimization is needed.Hardware-Software Co-optimizationKeeping data as localized as possible depends as much on software algorithms as it does on hardware architectures. The challenge is that the development cycles are mismatched: new software models can be developed in months, while designing and fabricating new hardware can take years. While this cycle mismatch is fundamental, closer coordination between hardware and software developers can significantly improve efficiency. For example, offloading selected functions in the algorithm, including distributed DPUs, and reducing the level of data precision can reduce energy use. Partitioning workloads logically across the hardware/software stack between cloud services and compute-on-edge can also reduce energy appreciably. Further, risk mitigation techniques—for example, building in strategic redundancy—can make future designs more resilient to shifts in software algorithms and models.Diverse Computing ModalitiesWhile AI dominates current infrastructure investment, the future of computing will likely include multiple, diverse computational modalities such as quantum, neuromorphic, photonic and analog computing.Different computational paradigms will be applied where they are most effective. For example, quantum computing is likely to complement—not replace—classical systems; especially for specific classes of problems where it offers exponential advantages. However, progress in quantum computing is tightly coupled to advances in semiconductor infrastructure. Error correction, orchestration, and hybrid algorithms all depend on high-performance classical systems operating with low latency alongside quantum processors. While there is no single silver bullet, system-level design can ensure that multiple computing modalities work together within unified workflows spanning edge, cloud, and exascale environments.Why It Matters What to WatchEnergy will now be a key constraint for AI performance and infrastructure expansion.The evolution of gigawatt-scale AI campuses and their interaction with public energy grids will accelerate – or slow down – AI growth.Data movement, memory bandwidth, interconnect efficiency, advanced packaging and heterogeneous integration will be strategic levers. Enhanced system-technology co-optimization and integration of advanced technologies like 3D ICs and photonics will be critical.Co-optimization across hardware, software, and systems will be required.Future architectures will blend classical and emerging compute modalities like quantum, photonic and neuromorphic.In conclusion, AI has become a defining global force with much promise, but its trajectory will be shaped by technology, energy and infrastructure economics working together. This is a formidable challenge because it requires many diverse players with divergent priorities to collaborate effectively.We invite you to join the SEMI Smart Data-AI initiative to collaboratively address this challenge and help realize AI’s full potential sustainably. Our next workshop in this series will be on September 9 in Silicon Valley – please join us for this exciting event.SourcesSEMI Smart Data-AI Initiative – Future of ComputingEnergy-Efficient Computing for AI and Beyond, SEMICON West, October 2025Sustainable AI Systems, SEMI HQ, March 2026About the AuthorsDr. Pushkar P. Apte is the Strategic Technology Advisor for SEMI Global Lead for the Smart Data-AI Initiative Dr. Melissa Grupen-Shemansky is Senior VP and CTO of SEMI

The CxO Summit at SEMICON Europa 2025 spotlighted Europe’s ongoing efforts to build a resilient and globally competitive semiconductor industry, while calling for greater ambition, speed, and unity in execution. Following global disruptions with the automotive supply chain crisis, the European Union launched a continent-wide strategy through the EU Chips Act. While the Act has already spurred significant developments, including construction of the new ESMC fab in Dresden, Europe remains far from its goal of achieving a 20% share of global semiconductor production by 2030. The CxO Summit, part of the SEMICON Europa event in Munich, provided an opportunity for industry leaders to share ideas about how to catalyze the next phase of the European industry’s growth.Ajit Manocha, President and CEO of SEMI opened the summit by describing today’s industry landscape with one word: “unprecedented.” Manocha said, “The global growth of the industry is unprecedented, with 107 new fabs set to come online by 2028, but the uncertainties are unprecedented, from geopolitics to the talent shortage to environmental concerns. So we need unprecedented solutions.” Ajit Manocha, President and CEO, SEMILaith Altimime, President of SEMI Europe echoed the mood of uncertainty, describing Europe as caught “in a perfect storm.” Altimime said, “As we face a combination of internal challenges and intensifying external competition, collaboration is not optional — it is mission critical.” Laith Altimime, President, SEMI EuropePierre Chastenet, Head of the Unit for Microelectronics and Photonics, European Commission, highlighted the tangible progress made under the EU Chips Act. “We now have a proper toolbox to handle a future crisis in the supply chain. The Chips for Europe initiative has led to the creation of five pilot lines for advanced technologies such as FD-SOI and wide bandgap semiconductors.” Chastenet added, “Europe must now capitalize on its strengths, from materials and equipment to design tools and cutting-edge research emerging from our RTOs.”Pierre Chastanet, Head of the Unit for Microelectronics and Photonics, European CommissionEchoing the call for action, Oliver Schenk, Member of the European Parliament, urged stronger regional unity. “Europe must act together, act faster, and act with much bigger ambition,” Schenk said, reinforcing the need for cross-border commitment to strengthen the continent’s semiconductor position.Oliver Schenk, Member of the European Parliament, European ParliamentHighlighting Europe’s most critical technology gap, Luc Van den hove, President and CEO of imec, unveiled plans for a new advanced fab backed by €2.5 billion in investment from the EU, the Flemish government, and ASML. Van den hove urged Europe to commit wholeheartedly to advanced technologies: “We must be more ambitious, and focus on disruptive breakthroughs rather than incremental change if we want to ensure a prosperous future.”Luc Van den hove, President CEO, imecAt the CxO Summit, CEA-Leti and ASML signed a memorandum of understanding (MoU) to deepen their collaboration and accelerate innovation in mainstream semiconductor technologies. Building on promising results in hybrid bonding, the partnership will now target 'More-than-Moore' innovations, including heterogeneous integration and novel substrates like SiC and GaN. “We aim to combine ASML’s world-class lithography expertise with CEA-Leti’s system-level innovation,” said Sébastien Dauvé, CEO of CEA-Leti. The collaboration is set to strengthen Europe’s ecosystem by shortening the path from early research to industrial impact.Left: Anne Hidma, Senior Vice President EUR US, ASML; Right: Sébastien Dauvé, CEO, CEA-LetiTurning to Europe’s industrial base, Christian Senger, CEO of Volkswagen Autonomous Mobility, emphasized the need to shift from risk-aversion to opportunity. While the region’s automotive sector faces intense global competition, particularly from China, Senger highlighted that Europe has the potential to lead in new mobility markets. “The market for autonomous roboshuttles for people transport in large cities is forecast to be worth €400 billion in the US and Europe alone,” he said. With American firms like Waymo and Uber leading the robotaxi space, Senger stressed that Europe must “act swiftly to create an environment that supports an autonomous mobility industry here.”Christian Senger, Member of the Board for Fully Autonomous Mobility and Transport CEO of ADMT GmbH, VolkswagenEurope’s Potential to Create Advanced TechnologyOne of these RTOs, CEA-Leti, is responsible for the FAMES pilot line for FD-SOI technology. Sébastien Dauvé, CEO of CEA-Leti, agreed with Pierre Chastenet that the pilot lines show great promise. He said, “FD-SOI is a big trend in semiconductors, because it enables very low power consumption in embedded devices. We think that adoption of the technology will grow in the coming years, and that is good, because most of the technology is produced in Europe.”Sébastien Dauvé, CEO, CEA-LetiEurope is also widely recognized to be the leading global voice on sustainability – a huge issue of concern to the semiconductor industry. Henri Berthe, President of the Semiconductor and Battery Segment at Scheider Electric, told the summit that 500 million tonnes of CO2 emissions per year are attributable to the semiconductor industry – “more than the whole of Mexico emits!” he said. “We need to make fabs more efficient, and that is why Schneider Electric has launched a new playbook with Applied Materials for sustainable energy abundance for the industry.”Henri Berthe, President of the Semiconductor Segment, Schneider ElectricAnother aspect of Europe’s playbook is support for new fabs. The flagship is ESMC, the joint venture between TSMC, NXP Semiconductors, Bosch, and Infineon. Christian Koitzsch, president and managing director of ESMC, reported to the summit that the project to build in Dresden a 12nm FinFET foundry and a 28nm CMOS line, requiring a total investment of €10bn, is on schedule. “We are now developing local supply chains, hosting a series of ESMC Supplier Days which are open not only to German but generally to European suppliers,” said Koitzsch.Christian Koitzsch, President and Managing Director, European Semiconductor Manufacturing Company (ESMC)As Manfred Horstmann, General Manager and Senior Vice President of Global Foundries, pointed out, the building of the ESMC fab means that Dresden is established as the center of a cluster of semiconductor industry companies. “Global Foundries has its Fab 1 and a mask center in Dresden. In fact, one-third of the chips produced throughout the whole of Europe now comes from Dresden.”Manfred Horstmann, General Manager and Senior Vice President, GlobalFoundriesAn example of ambition was given by Terence Gan, Executive Director of the Institute of Microelectronics of Singapore. Gan told the summit how Singapore has used pilot lines to stimulate research and development in new technologies. He said: “We started research into advanced packaging as long ago as 2011. Most people thought we were mad! But today, there is strong demand for our advanced packaging capabilities because of the rise of AI and its need for high-performance computing.”Terence Gan, Executive Director, Institute of MicroelectronicsBreaking Barriers to ProgressDespite momentum, bureaucratic inefficiencies continue to hamper progress. Narjiss Haddaoui, Managing Director of European Economics called for faster decision-making: “In global competition, speed is a decisive factor. To act fast enough, the EU must change its ‘software’ - the processes by which it considers and makes decisions.” Narjiss Haddaoui, Managing Director, European economicsThe stifling character of European bureaucracy is reflected in the region’s approach to building fabs. Herbert Blaschitz, Executive Vice President of Advanced Technology Facilities at Exyte, compared fab construction timelines: 20 months in Taiwan, 34 in Europe, and 38 in the U.S., attributing delays in Europe to paperwork bottlenecks.Herbert Blaschitz, Executive VP of Advanced Technology Facilities, ExyteFabio Gualandris, President for Quality, Manufacturing and Technology at STMicroelectronics raised another concern — 100% of raw materials used in European fabs come from outside the region. Christophe Frey, Vice-President for EU Engagements at Arm France, added that geopolitical tensions are clouding the path forward: “We are a bit lost in the smoke from the big fire in the world’s semiconductor industry.” Fabio Gualandris, President Quality, Manufacturing Technology, STMicroelectronics Christophe Frey, Vice-President of EU Engagements, Arm FrancePlaybooks For Future SuccessSo amid the uncertainty and global tension, what lessons can the industry learn from successful regional examples? Tuomas Korpela, Business Development Senior Manager at Nokia, credited Finland’s strategic procurement and policy tools with enabling a vibrant semiconductor ecosystem: “Finland creates demand for advanced chips using industrial policy tools, alongside strategic procurement in sectors such as defense and aerospace, and connectivity.” Tuomas Korpela, Business Development Senior Manager - Corporate Development Organization, NokiaAt a regional level, Joerg Schulze, Director of the Bavarian Chips Alliance, said that his organization was supported by the Bavarian State Ministry of Economic Affairs, as well as by companies and universities. “We help semiconductor companies to establish themselves and grow here through help with site searches, networking and contacts, funding and support, and talent acquisition,” said Schulze.Joerg Schulze, Spokesperson for the Bavarian Chips Alliance, Director of the Fraunhofer IISB, Bayern Innovativ GmbHCompanies in the European semiconductor supply chain also provided the summit with their insights into the roots of global success. André Grede, Chief Technology Officer of Comet, described how his company’s strategy is not to wait for customers to tell it what they need, but to be “ahead of the curve.” Grede said: “Is staying in sync with the customer enough? Not for us - we are deeply embedded with our customers, and constantly looking to broaden our relevance to them.”André Grede, CTO, CometChristophe Maleville, Chief Technology Officer of Soitec, provided a real-world example of how this is done. He said: “Our engineered substrates using RF-SOI technology reduce the drain on a mobile phone’s battery power, and cut our customers’ board footprint thanks to RF front end integration. As a result, our products are now in 100% of 5G smartphones.”Christophe Maleville, CTO, SoitecAnne Hidma, Senior Vice-President for Europe and the US at ASML, shared the company’s success formula: “The reasons for ASML’s success include customer focus – decide which markets you are going to be in, and which you are not. We are also all-in on innovation. We nurture an ecosystem, which for us includes imec and CEA-Leti, as well as partnerships with academia. And lastly, we have a strong supply base, which is a core strength of Europe.” In a time marked by both uncertainty and opportunity, the example of ASML shows how the European semiconductor supply chain can survive and thrive.Anne Hidma, Senior Vice President EUR US, ASMLEurope’s Path ForwardThe CxO Summit made one thing clear: Europe has world-class innovation, policy momentum, and industrial commitment. What’s needed now is faster execution, deeper collaboration, and the courage to invest in the technologies of tomorrow. As the industry heads toward the $1 trillion milestone, the decisions made today will shape Europe’s place in the semiconductor world for decades to come.On behalf of SEMI, the SEMI Europe team would like to express appreciation to the industry leaders for sharing their visions and readiness to collaborate during the CxO Summit.SEMI ContactLaith Altimime, President SEMI [email protected]

AI is proliferating rapidly, fueled by ever-larger models and data sets that are expanding AI use cases and improving its accuracy. Future computing systems are now required to simultaneously deliver high performance, process large amounts of data, and use the least possible energy. The growing energy footprint of AI and the strain it places on the power grid is an increasing concern for companies and even entire countries. This could adversely impact future growth and could slow the semiconductor industry’s march towards $1 trillion in revenue, which is largely driven by AI applications.This is a formidable challenge that cannot be addressed in silos by individual companies or even industry segments. The SEMI Smart Data-AI Initiative is exploring how to overcome this challenge with collaborative and innovative system-level solutions that connect the dots across the entire AI system stack. In March 2025, we hosted a successful workshop, bringing together industry leaders across the value chain for a day of thoughtful discussions and knowledge sharing. Building on this foundation, we developed an exciting Smart Data-AI session to be held at SEMICON West in Phoenix, Arizona on October 7 from 10:30 a.m.-4:40 p.m. The “Future of Computing: Energy-Efficient Computing for AI and Beyond” forum will bring together executives and thought leaders across the entire ecosystem – including design, fabrication, interconnects, system integration, hyperscale architectures, advanced materials, and emerging technologies such as photonics and quantum. Attendees will have a unique opportunity to get strategic perspectives from these distinguished experts and learn about exciting future trends.Why Attend?Gain insights from global leaders and learn about innovative paths towards an energy-efficient computing future.Network and build cross-industry collaborations for the next wave of AI, photonics and quantum.Promote a more sustainable path for continued growth of AI to benefit humanity and the planet.Join the SEMI Smart Data-AI initiative to develop solutions and take concrete actions to reduce AI’s growing energy footprint.Support the industry in achieving its goal of reaching $1 trillion in revenue. Speaker Highlights Include:AMD • Ciena • Hewlett Packard Enterprise • IBM • Merck KGaA, Darmstadt, Germany •Microsoft • Quantum Economic Development Consortium • Rapidus • Rigetti •Siemens AG • Stanford UniversityDr. Pushkar P. Apte is the Strategic Technology Advisor and leads the Smart Data-AI Initiative at SEMI.

As artificial intelligence (AI) proliferates rapidly, AI models and datasets are also growing rapidly in size. This growth far outpaces performance improvement in hardware systems, and is increasing AI’s energy consumption unsustainably. To address these challenges and explore collaborative solutions, SEMI’s Smart Data-AI Initiative - as part of its Future of Computing focus - recently hosted a day-long workshop on Sustainable AI Systems that brought together domain experts from the entire AI ecosystem. Speakers included industry leaders Applied Materials, AMD, Arm, ASE, Google DeepMind, IBM, Intel, Lam Research, McKinsey, Micron, NVIDIA, Qualcomm, SK hynix; exciting start-ups Cerebras, LightMatter, Mentium Technologies and Mueon; and leading-edge academic institutions, Stanford University and University of California, Davis Irvine. The keynotes, panels and spirited audience discussions covered novel devices, materials, advanced packaging, chiplets, photonics and architectures algorithms for data centers, cloud edge. This article synthesizes high-level insights from the workshop.The AI ImperativeThe day started with a basic question – why is AI essential to continued progress and prosperity? The answer lies partly in shifting global demographics, with the population aging in most developed economies. At the turn of the century, there were ~6 people in the workforce supporting each retiree, but projections indicate there will be only 2 active workers per retiree by 2050. In parallel, productivity growth rates have fallen to half of what is required. AI can help bridge this gap, if we can ensure continued progress of AI in a responsible and sustainable manner.The Energy WallA formidable roadblock to continued progress of AI is its rising energy demands. For example, the energy used by some large language models (LLMs) to run just one training cycle could be used to power thousands of homes. The switch to transformer models has increased AI-driven computing demand by a factor of 50 million over 5 years, and by some projections, this demand will consume half the world's generation capacity by 2050. This is clearly not sustainable! All players in the ecosystem are deeply committed to reducing AI’s energy consumption, and the industry has already decreased the energy used per token of computing by a factor of 100K in the past 10 years. However, the rapid growth of AI outpaces this, highlighting the huge challenge ahead.The System StackThis workshop was developed with the hypothesis that innovation is required across all segments, and an important first step is to initiate a dialog. Our highly distinguished speakers covered the entire solution stack, and while it is impossible to capture the ocean of insights that they shared, the following provides a flavor.Materials DevicesMaterials and devices used to build semiconductor chips form the foundation of the stack for all computing systems. Silicon substrates with copper interconnects remain industry’s mainstay, but are being augmented by innovative ideas. As device dimensions continue to shrink, novel 2D materials such as MoSe2, WSe2, ZrSe2 and NbP are being researched. While Si mobility degrades with decreasing film thickness, 2D materials maintain high electron mobility in thin-film substrates. These can be stacked to build 3D systems with lower power consumption than traditional planar structures. In parallel, novel device technologies such as gate-all-around (GAA) can provide power savings up to 25%.These novel materials and devices are complex, and require almost magical wizardry to build. For example, they may require depositing a stack of multiple defect-free films that are only a single (or few) atomic layer(s) thick, or etching a steep well that is one hundred times as deep as it is wide. It is an incredible accomplishment of the semiconductor industry to build these devices and chips successfully, but it is getting harder and more expensive. Consequently, AI is now being used as a tool to help with this ever-growing fabrication complexity of semiconductor R D and manufacturing. This is a synergistic virtuous cycle, where AI algorithms enabled by chips are used in turn to help with chip fabrication.System IntegrationThe next layer of the stack is the integration of individual devices into a system. Advanced packaging techniques, such as silicon or glass interposers (2.5D) for interconnecting chips, can reduce the communication distance and power consumption. These are often deployed for high-performance computing systems running AI algorithms. Beyond this, the industry is actively exploring 3D systems that are even more compact, both as multi-die 3D packages and as monolithic 3D chips.The concept of chiplets – smaller chips with specialized functions that can be assembled flexibly to optimize system performance – holds much promise. Industry consortia are developing protocols such as Universal Chiplet Interconnect ExpressTM (UCIeTM) to enable seamless integration of chiplets both in the planar and vertical dimensions. These advanced techniques pack more functional elements into increasingly compact form factors, but this proximity makes power delivery challenging and often generates intense heat. Much work is needed to ensure optimal power delivery and adequate thermal dissipation.Looking beyond traditional electronics, photonics represents an exciting opportunity. Most long-distance data communication is on fiber-optic cables and thus already photonic – bringing this to shorter distances can save energy while increasing bandwidth and performance. This requires efficient photonic-electronic integration at the packaging or even chip level, which is a major challenge requiring cross-disciplinary collaboration.Architectures and AlgorithmsAI algorithms need enormous amounts of data processing compared to traditional computing workloads. This requirement stretches (or breaks) the limits of traditional Von Neumann architecture, which requires frequent data movement between memory and processor elements for each computation cycle. Much of current architecture innovation focuses on bringing processor and memory elements closer to each other. System integration is already driving “compute-near-memory” architectures like high bandwidth memory (HBM). Other forward-looking implementations combine them into a single chip, known as compute-in-memory (CIM). Memory elements being explored for this purpose include resistive RAM (RRAM), phase-change memory (PCM), ferroelectric RAM (FeRAM) and magnetic RAM (MRAM). However, there is no one “perfect” memory – each has pros and cons in terms of latency, capacity, bandwidth, power consumed per operation, manufacturability, etc. Other researchers are also exploring devices like memristors for analog computing, which can improve energy efficiency for certain workloads.Finally, hardware-software co-optimization is crucial. Algorithms mismatched with the underlying system are energy expensive; conversely, co-optimized systems are highly efficient. While conceptually obvious, this is difficult in practice because development cycles are quite different – software algorithms can transform in a few months, while new hardware often takes years to develop. While some strategies can be used for mitigation – such as designing in redundancy/flexibility or making the hardware application-specific – much work remains to solve this conundrum.Pre-competitive Collaboration to Find SolutionsAll speakers emphasized that pre-competitive collaboration across the entire stack is critical, as these challenges are formidable and cannot be solved by one entity or in isolated silos. SEMI is a global and neutral organization with over 3,000 member companies, and is well-positioned to provide a pre-competitive collaboration platform to connect the dots across silos. In fact, SEMI’s mantra is “Connect, Collaborate, Innovate” – reinforcing its commitment to advancing the entire industry. For this purpose, SEMI’s Smart Data-AI Initiative continues to drive robust discussions on this topic – next there will be a roundtable discussion during SEMICON Southeast Asia, May 20-22 in Singapore, followed by a focused technology session at SEMICON West 2025, October 7-9 in Phoenix, Arizona. The overall objective is to move from “talking-the-talk” to “walking-the-walk,” towards creating system-level solutions for energy-efficient AI computing. Specifically, we want to identify the pre-competitive actions that could synergize individual innovations and make the whole greater than the sum of parts. Some ideas include collaborative proof-of-concept projects, industry standards and independent benchmarking. Come join us on this journey and connect with us at [email protected]. Dr. Pushkar P. Apte is the Strategic Technology Advisor and leads the Smart Data-AI Initiative at SEMI.

The world is abuzz with the new opportunities being created by artificial intelligence (AI), enabled by availability of unprecedented amounts of data. AI runs on the semiconductor engine, and in turn, creates a rising demand for semiconductor chips. The semiconductor industry is predicted to reach $1 trillion in revenue by 2030 by McKinsey Co., in large part due to the market demand for AI and data. There are, however, formidable challenges to overcome for this virtuous cycle to continue. The SEMI Smart Data-AI Initiative, together with the SEMI Future of Computing Think Tank, is working to help the industry address these challenges. This article paints the big picture and lays the groundwork for an in-person workshop on March 19, 2025, in Silicon Valley, where pre-competitive and collaborative solutions will be explored.“To unlock the full potential of AI, innovation is required across the technology stack – from the models and software to datacenter architecture, chip design and how those chips are made. Advancements in foundational semiconductor technologies will have a dramatic impact on system-level energy and cost reduction in the AI datacenter.” – Gary Dickerson, President and CEO of Applied MaterialsThe Performance ChallengeInvestment in AI system infrastructure is rising at a dizzying pace, with hundreds of billions of dollars being committed by individual companies as well as public-private partnerships around the world. AI models built on larger data sets generally deliver better results, so model sizes are growing exponentially each year, with leading-edge models requiring billions and even trillions of parameters. This is especially true with the rapid growth of the Large Language Models (LLMs) used for Generative AI. Can the foundational semiconductor technology keep up? Even if semiconductor chips were following the famous Moore’s Law, performance would only double every 2 years. The real pace of performance improvement is even slower, as leading-edge technologies are reaching physical limits of materials – with the tiniest patterned dimensions on chips now approaching the fundamental atomic separation distance. While semiconductor designers and process technologists continue to innovate with new materials, devices, 3-dimensional stacking and so forth, there remains a formidable challenge for silicon chips and hardware systems to keep up with the growth rate of AI models and data sets. The Energy ChallengeProcessing ever-larger data sets and AI models also requires increasing energy. A recent report by the US Department of Energy indicates that data center energy consumption tripled over the past decade and may triple again in just 5 years! Other analyses show that a single data center powered by 20,000 GPUs can consume almost 40,000 KW, which is enough to power 31,000 homes in the US! Consequently, it is challenging for data centers to meet their power needs through public utilities, and several hyper scalers are investing in nuclear power. This acceleration in AI energy demand is further exacerbated because silicon technology evolution no longer follows power scaling with “Dennard’s Law,” which states that power density remains constant as technology scales to tinier dimensions. In fact, energy consumption of silicon devices has been increasing with technology scaling for the last decade. These combined factors give rise to the second formidable challenge – energy consumption is rising unsustainably for AI systems.Exploring SolutionsAddressing these challenges requires innovation from algorithms and architecture to foundational silicon technologies. The following are illustrative examples (not comprehensive) spanning the entire AI system stack.At the software and algorithm level, innovators are finding ways to reduce model size and to use hardware more efficiently. For example, IBM’s Granite models are smaller in size, with less than a billion parameters. Similarly, Google's Gemma platform offers small language models (SLMs). The recent market disruption from the publication of the DeepSeek reasoning model suggests that relatively smaller domain-specific reasoning models may offer significant efficiencies. At the architectural level, multiple paths are being explored. Special-purpose (or domain-specific) processing elements can deliver improved performance at equal or lower power for specific tasks. Examples include Cerebras’ wafer-scale designs with optimized AI accelerators and Mueon’s system-scale integration solutions. Another innovation path focuses on bringing computing closer to the memory elements, where the data resides. This addresses the major bottleneck between processors and memory in the traditional Von Neumann architecture, which has been the mainstay of the industry since inception. In-memory or near-memory computing, such as memory-focused architectures from Micron or processor-in-memory (PIM) solutions from SK hynix, offer higher performance with lower energy consumption for certain workloads. In parallel, leading CPU and GPU makers like AMD, Intel, and NVIDIA continue to innovate with power-efficient solutions. And “Edge Intelligence” innovations – for example, internet-of-things (IoT) solutions from Arm and Qualcomm – help reduce the processing and power load on data centers by executing more operations on edge devices.Critical enabling technologies also contribute significantly. Advanced packaging, for example ASE’s heterogeneous integration solutions, enable efficient, high-performance computing by integrating multiple diverse components optimally. Another emerging development is the advent of “chiplets,” which split the chip into smaller parts, and enable special-purpose accelerator building blocks to be assembled with more general processor, memory, and interconnect elements. A well-developed chiplet ecosystem could provide silicon designers with more degrees of freedom to design optimized systems. Looking beyond electronics, the integration of photonics can enable low-power, high-bandwidth connectivity – for example, LightMatter’s silicon photonics interconnects and Ciena’s data center interconnects.Materials and devices form the foundation of the technology stack. Example technology innovations include Stanford University-led N3XT, a 3D solution that integrates multiple novel devices and materials including resistive and spin-torque transfer RAMs, carbon nanotubes and 2D materials. Similarly, a University of California-led effort synthesizes low-dimensional nanostructures, sensors, detectors and photonics in an integrated solution. Finally, advanced and innovative processes and equipment are being developed – for example, by Applied Materials and Lam Research – to fabricate these novel materials and devices.All these individual innovations are amazing and necessary, but are they sufficient? What if we could collaborate across the entire system and co-optimize hardware and software innovations synergistically? Could the integrated whole be greater than the sum of parts? What efficiencies could we unleash? And what business opportunities would this unlock?The SEMI Future of Computing workshop on March 19, 2025, seeks to answer these questions by uniting AI innovation leaders from industry, academia and start-ups, including most of the companies and universities mentioned in this article. We will begin building pre-competitive collaboration that breaks through silos and explores system-level solutions – with the ultimate objective of radically improving the energy-efficiency of computing for AI.Pushkar Apte is the Strategic Technology Advisor and leads the Smart Data-AI Initiative at SEMI.Jim Sexton is a Fellow at IBM.Melissa Grupen-Shemansky is CTO and VP of Technology Communities at SEMI.

Building on the success of the first year of Startups for Semiconductor Sustainability to spur more green tech innovation, SEMI invites startups, academics, and innovators with compelling ideas for advancing semiconductor industry sustainability to apply to participate.

The Semiconductor Sustainability Summit at SEMICON Taiwan in September focused on three themes - Green Innovation of Zero Waste, Carbon Reduction, and Sustainable Innovation in Semiconductor Manufacturing - as the semiconductor industry drives toward net-zero carbon emissions.

Guido D’hert, High Tech and Semiconductor Industry Europe Lead at Accenture, spoke about challenges semiconductor companies face in meeting sustainability goals and how to apply analytics, new green technologies and circular design, sharing during his presentation at ISS Europe in Brussels, Belgium.

In 2021, SEMI member companies joined forces to partner with the world’s top startups to bring new sustainability technologies to semiconductor operations. The initiative, called Startups for Semiconductor Sustainability, covers three areas: Energy efficiency, water technologies, & material usage.

SEMI member companies joined forces to seek out and partner with the world’s top startups to bring new sustainability technologies to semiconductor operations. The initiative- Startups for Semiconductor Sustainability- covers three areas: Energy efficiency, water technologies, & materials usage.