downloadGroupGroupnoun_press release_995423_000000 copyGroupnoun_Feed_96767_000000Group 19noun_pictures_1817522_000000Member company iconResource item iconStore item iconGroup 19Group 19noun_Photo_2085192_000000 Copynoun_presentation_2096081_000000Group 19Group Copy 7noun_webinar_692730_000000Path
Skip to main content
Default Banner Image

mmWave

The SOI Consortium’s China 2019 event ran for two days, and it’s taken four (!) posts to cover all the presentations. In this final post we cover the afternoon RF-SOI sessions, which were dedicated to the China RF-SOI ecosystem and the RF value chain. In case you missed them, our previous posts recapped: 1. major keynotes from both the FD-SOI and RF-SOI days; 2. the FD-SOI presentations; 3. the morning sessions of the RF-SOI day; and 4. (this post) the RF-SOI day afternoon sessions. As we noted in Part 1 of our RF-SOI coverage, there were over 500 attendees for the RF-SOI day. And impressively, the room was still packed right through to the very end of the afternoon. Read on! SESSION 2: CHINA RF-SOI ECOSYSTEMSuzhou HunterSun Electronics: Super Opportunity for Integrated RFFE (“Jacky” Yujun Ding, COO)This talk had two parts. First, how is 5G changing the world, and second, what are the RFFE opportunities? He cited IHS data indicating that 5G will create tens of millions of jobs. New products include NB IoT, cellular V2X, as well as traditional PC/tablets and smart phones. But you still need to cover 2/3/4G with 5G. Major growth will happen in 2025-27. In terms of opportunities for RFFE, you've currently got 550mm2 going for $8; in 5G, you'll need 600mm2, but it will cost $16. You need RFSOI for filters and antenna switches, which are in high demand. Parts of the supply chain have no China players. Revenue for BAW is higher than SAW, but there's more SAW. He sees the industry moving heavily into integrated FEM (versus chip-on-board). He finished by itemizing different parts of the RFFE, indicating where the opportunities are (citing some data from Yole), with a special emphasis on integrated products for Chinese companies, with continued investor confidence. SmarterMicro: RF-SOI: Key Technology of Smart Connection (Yangyang Pen, Director) RF-SOI is an enabler of smart connections. However he sees GaAs as better for power, so SmarterMicro has a solution combining RF-SOI and GaAs. They've developed the world's first mMTC RFFE for high-performance upgrades on a single die and software reconfigurable. He notes that for IoT, lifetimes will be longer than 10 years, and that terminals are becoming more powerful. CanaanTek: Critical SOI CMOS Blocks in the 5G NR Sub-6GHz RF Front-End Architectures (Wayne Ni, CTO Board Chairman) CanaanTek is a fabless company working in consumer markets, with switches, tuners and LNAs in SOI-CMOS. He wants to capture 10% of the market with a focus on sub-6. The antenna/tuner is a must, and they've developed solutions for switches here. The figure of merit is RonCoff. He showed a product roadmap on SOI-CMOS. Xpeedic: Innovative EDA Solutions to Enable Differentiated RF-SOI Designs (Feng Ling, CEO)RF-SOI is growing, but there are still design challenges in process, models, filters and packaging. To design a good front end, you need better models and filters. People think passives are easy, but you need accurate models here. Xpeedic has developed design flows that include the effects of packaging early in design. Their products include IRIS, iModeler and Metis (for packaging). They've also introduced substrate modeling in partnership with CWS in France. The product is called SiPEX: it can address linearity in switch or PA designs. You need accurate substrate models to do this. Customers indicate they're seeing big improvements as well as reductions of 25% in chip area. IDP filters is another place they're working, to provide RF filters to fabless IC or module companies. No single filter technology can fit all the needs – IDP is one of them, so they have a broad portfolio of IDP filter technologies. He closed by saying that especially in China, the SOI ecosystem is really growing. SESSION 3: RF VALUE CHAINTowerJazz: Specialized RFSOI Foundry Technology to Support Rapid New Product Development (Paul Hurwitz, Director of RF Technology Development)This presentation gave a full overview of what TowerJazz offers in terms of RF-SOI foundry services with its fabs in Isreal, the US and Japan. What's new in 2019 is a diversifying of 200mm and 300mm. 200mm is best for power handling (for infrastructure/basestation antenna tuners and switch power handling, for example). 300mm is best for SW and LNA integration and higher digital densities. They've got new SOI models for the latest technology generations, and physics-based modeling of RF breakdown for accuracy. With more die being flipped, they needed new substrate modeling. For LNA and switch integration in 300mm, they invested in RF modeling. They also have an in-house MPW (multi-project wafer) program. He noted that customers in China are moving quickly in response to their customer requirements. Okmetic: Tailored Silicon Substrates for RF Applications (Atte Haapalinna, CTO)Okmetic Oy is a niche player in the substrate materials market, with specialties in sensors and MEMS, where they are the market leader. Now part of China’s NSIG group, they are expanding their manufacturing facility in Finland. In this presentation, their CTO talked about their current offerings as well as what they have under development. They do 150-200mm wafers, with a special emphasis on thick SOI. In terms of silicon substrates for RF, ultra-high resistivity is key. Their wafers are also used in IDP – integrated passive devices – for RF and acoustic filters. They are continually improving their high resistivity Magnetic Czochralski (MCz) silicon wafers, and are developing substrates for RF passives for automotive V2X. For RF beyond 6 GHz, they are looking at customized high resistivity silicon wafers for mmWave with researchers and customers. For sensors, they do SOI wafers with built-in cavities. Incize: RF SOI Ecosystem – History Challenges (Mostafa Emam, CEO)The world is exceeding expectations in terms of data usage. While the CAGR for devices is 27%, for data it’s 46%. Therefore each device needs to be faster and more power efficient. Incize recognizes RF as an art, with each piece hand crafted. But artists need to see the whole picture: at Incize, they help 17 companies – including wafer suppliers, foundries and fabless – see that big picture, especially in measurement, characterization and modeling for RF. For wafer suppliers, they do very high-power and very precise on-wafer testing to determine things like intermodulation distortion and substrate interference. For foundries, their specialty is in RF switches, for whom they do harmonics testing and thermal noise management. With those insights, Incize foundry customers have drastically increased the performance of the RF chips they’re manufacturing on trap-rich, high-resistivity SOI wafers. Meanwhile, Incize is also preparing PDKs for future potential substrate generations including GaN-on-Silicon, silicon-on-porous, and new contactless testing techniques for piezoelectric-on-insulator (POI – used in filters in 4/5G). “There’s a really big business opportunity for RF-SOI,” concluded Emam, “and room for everyone.” Cadence: SOI Technology in Intelligent and IoT/Vision/AI Systems (Jonathan Smith, Senior Director)Cadence does SOI enablement at advanced nodes. Smith shared three recent success stories. First, there’s the Musca-S1 test chip they did with Arm, Samsung and Sondrel this past spring. Second, there’s the Tensilica DSP for automotive vision on GlobalFoundries’ 22FDX, which uses 1/10th of the power of existing solutions and was demonstrated at CES. And finally there’s the i.MX line from NXP. In recent news, there’s a new version (18.1) of Virtuoso RF. Though it’s been on the market for 30 years, they’ve added advanced methodologies so that system design and analysis are on the same platform. They’ve also announced National Instruments’ analysis solver, the Clarity 3D solver for next-gen 3D solutions, the integration of multiple electromagnetic (EM) solvers, and advance SiP options. Silvaco: Xena-IP Management Infrastructure for the SOI Ecosystem (Babak Taheri, CEO)Every multi-core SoC today has as many as 200 IPs, if not more. How do you manage that? Tracking and traceability of IP is complicated but important. For IP providers, how do they track where its being used? And for IP consumers, they need to know what they’ve used and where. What’s required is an IP management system to keep track of the different functions and different concerns. Today’s tracking systems don’t talk to each other. Silvaco’s Xena IP management solution organizes all IP data, accounts, products, contracts, devices, support, compliance and reporting. For compliance in particular, they do IP “fingerprinting” and “DNA analysis”, which they’ve patented. The fingerprint is a digital representation of the IP: it’s not just software. It is secure, and can’t be reverse engineered. It’s not a tag: a tag is inserted into the IP, whereas fingerprints are extracted. DNA analysis flags discrepancies and quickly identifies where they are and which files to look in. Xena works in the cloud, enterprise systems or hybrids. The SOI ecosystem will be hearing a lot more about this. ~~ Please note that the China event presentations are all available on our website to anyone whose company or organization is a member of the SOI Consortium.
Read More
The SOI Industry Consortium awarded two luminaries of the semiconductor industry for pioneering advances in RF-SOI, a technology now found in all cellphones. Jim Cable (shown on the left in the photo above), Chairman and CTO of pSemi, a Murata Company, and Herb Huang, CEO and GM of Ninbo Semiconductor received the awards during a gala following the SOI Consortium's 2019 RF-SOI Workshop in Shanghai. "Thanks in large part to the innovation, dedication and perseverance of men like Jim Cable and Herb Huang, RF technology based on SOI is now ubiquitous," said Carlos Mazure (on the right in the photo), Chairman and Executive Director of the SOI Consortium. "Jim Cable drove the development of SOI and RF switches that are now in every cellphone, and Herb Huang has been a key contributor to SOI technology and a champion of the SOI foundry ecosystem in China. We are happy and honored to recognize the contributions they have made to advancing RF-SOI globally." Jim Cable joined pSemi (formerly Peregrine Semiconductor) in 1996 and held technical leadership roles before serving as CEO from 2002 to 2017. An early pioneer of SOI technology, Cable believed SOI would ultimately replace other technologies in the RF front end, and he pushed his team to innovate. Cable is a co-inventor on more than 70 semiconductor and technology patents, including breakthroughs in SOI-based processes for CMOS RF switch linearity and integration that are used by all smartphones today, and will become even more mission-critical in 5G and millimeter-wave markets. He received his B.S. in physics from UC Riverside and his master's degree and Ph.D. in electrical engineering from UCLA. Herb Huang is CEO of Ningbo Semiconductor International Corporation (NSI), which is based in Ningbo, China. A driver of the RF-SOI ecosystem in China, he spent much of his career at SMIC, the largest semiconductor foundry company in mainland China. In 2016, SMIC created NSI as a joint venture subsidiary with China IC Investment Fund, Ningbo Economic Development Zone Industrial Investment Company, Ltd. and other IC investment funds. Under Huang's leadership, NSI optimized the process and model of a 0.13um RF-SOI technology platform transferred from SMIC. Now in mass production, the RF-SOI technology platform supports customers in IC design and product development for new generations of radio communications. Huang holds both a Ph.D in Materials Science and Engineering and an MBA from the University of Minnesota.
Read More
Join us! In partnership with our members, the SOI Consortium is co-organizing and participating in two key SOI events coming up in China over the next few weeks. On May 18th, we’ve put together an SOI Forum at the World Semiconductor Congress (WCS) in Nanjing. And on May 23rd 24th, we’ve teamed up with our members SIMIT, Sitri and Leti for another in our series of SOI Academies, including an FD-SOI Training Day. (The last one this past winter was a terrific success – read about that here if you missed our coverage at the time.) QR code for WCS, Nanjing '19At WCS, the SOI Forum (sub-forum #8) is part of the afternoon Innovation Summit. We’ll cover the broader SOI ecosystem, including both RF-SOI and FD-SOI – from wafers to design through manufacturing. Presentations will be given by members of the SOI Consortium team, and by leaders from our membership, including Simgui, NXP, Incize, ST, IBM, Cadence and Xpeedic. Click here or scan the QR code for the full program and registration information. Also at WCS, SOI Consortium member VeriSilicon will be participating in a morning session on AI and IoT Wireless Communications (sub-forum #4). They’ll be giving a presentation on their low-power Bluetooth design platform for GlobalFoundries 22FDX, and their CEO Wayne Dai will be moderating a round-table discussion. You can get more information on that (in Chinese only, tho) here, or follow VeriSilicon on WeChat. QR code for SOI Academy and FD-SOI Training, Shanghaid 2019The SOI Academy in Shanghai is an opportunity for experienced designers to gain solid expertise in FD-SOI. The event begins in the afternoon of May 23rd with a series of informative plenary talks by members of the SOI Consortium team, and by experts from our members Leti, Soitec, VeriSilicon, GlobalFoundries and NXP. The FD-SOI Training starts the next morning, on May 24th.. This is a hands-on event lead by top experts from Leti. The morning is devoted to digital design in FD-SOI, and the afternoon to RF design (including for 5G) in FD-SOI. Attendees will get a comprehensive understanding of design techniques for low-power chips leveraging the multiple benefits and flexibility of FD-SOI technology. Get more information here, or from the WeChat QR code.We've got a busy schedule! To keep up to date with where we and our members will be promoting the SOI ecosystem, be sure to check our Events page regularly.
Read More
Key takeaway #2: If you need a Goldilocks process node – where you'll get just the right balance between active power, unit cost and investment – look to FD-SOI. And, btw, the IP landscape has improved dramatically. Those were just some of the great points made by Huibert Verhoeven (shown above), GM/SVP of Synaptics' IoT Division in his talk at the recent SOI Symposium in Silicon Valley.BTW, if you missed part 1 of our coverage --Silicon Valley SOI Symposium a Huge Success. Key Takeaways (Part 1) Here. – you’ll want to be sure to read it, too. Almost all of the presentations are now posted on our website – click here to access them.In this post here, we’ll cover presentations by Synaptics, GlobalFoundries, STMicroelectronics, Anokiwave and Dolphin Integration. It was a really full, day, so be sure to stay turned for Part 3 of our coverage to follow shortly: it will highlight the remaining presentations and panel discussions.Synaptics: Smart Home at the EdgeSynaptics’ Verhoeven’s presentation Revolutionizing User Experience Through Secure Neural Network Acceleration at the Edge was about Smart Home and using SOI. Synaptics is a human interface (HMI) company that’s been doing neural networks since 1986. They’ve always been on the leading edge, from their first shipment of PC touchpads to becoming a dominant force in all things HMI today: they now ship over a billion units annually. Synaptics slides 15 16 from the SOI Symposium, Silicon Valley 2019.They currently have SOI products shipping with dedicated neural networks for voice, he said. European [privacy] regulations have played a part in driving their use of SOI, as have challenges regarding power and heat. Things are getting smarter at the edge. For example, not only do users want their coffee machine to offer the usual morning espresso, Synaptics says that the next step is for your coffee machine to recognize you’re looking extra tired and ask if you might want a double?! For them Smart Home and multi-modal applications are the primary area of interest, as well as some automotive. Although their biggest customers have resources, others need guidance. Voice is a critical component, but now you also need video and display.Why SOI? Their HMI vision requires low power, significant computation and dedicated neural network hardware, explained Verhoeven, so FD-SOI with RF meets their needs. “22nm SOI is a Goldilocks IoT Process Node,” he proclaimed. It gets the combination of active power, unit cost and investment just right. What’s more, he said, “The IP landscape has improved dramatically. Our choice of SOI was not an accident.” Be on the lookout for more products leveraging FD-SOI over the next six months, he concluded. At this point on SOI, they’ve got 1 TOPS products with dedicated NPU for speakers, soundbars, Wi-Fi mesh, appliances, STBs and smart displays. These products have voice and sensor real-time (RT) AI. Next up is 4 TOPS on SOI with dedicated NPU, targeting STBs and smart displays with voice, video, imaging and RT AI. GF: World-Changing OppsGlobalFoundries slides 6 7 from the SOI Symposium 2019, Silicon Valley.“Our clients are at the forefront of changing the world,” declared Mark Granger, VP of the Automotive Product Line at GlobalFoundries. His presentation, Capturing High Growth Market Opportunities with SOI, detailed how mobility, automotive and IoT are the growth markets for SOI. So not unsurprisingly, GF’s 22nm FD-SOI technology, 22FDX, is seeing particular traction in mobile, edge, wearables and automotive. They’ve got twice as many tape-outs this year as they did a year ago, he noted. GF’s SOI portfolio includes 22FDX®, 45RFSOI and 8SW/7SW RF SOI for 5G/mobility; 22FDX for automotive (fully qualified for automotive Grade 2, with Grade 1 on the way); and 22FDX, 130RFSOI and 8SW/7SW RF SOI for IoT. GF has announced a stream of good news recently:with Dolphin Integration they’re delivering differentiated FD-SOI Adaptive Body Bias Solutions for 5G, IoT and automotive applications;they’ve crossed the billion-dollar design win threshold with 8SW RF SOI technology; they’ve collaborated with Synopsys to develop the industry’s first Automotive Grade 1 IP for their 22FDX process;and they worked with Rambus on the delivery of High-Speed SerDes on 22FDX® for communications and 5G applications.You might have heard about the Dolphin Integration news, as we covered it recently here at ASN (if not, be sure to read it here). Dolphin’s IP and methodology solutions address energy efficiency challenges. Automated transistor body biasing adjustment can achieve up to 7x energy efficiency with power supply as low as 0.4V on 22FDX designs. At the Silicon Valley event, Dolphin Integration CEO Philippe Berger provided additional information in his talk, FD-SOI IP Platform for Energy-Efficient IoT SoC. Dolphin Integration slides 5 6 from the SOI Symposium 2019, Silicon Valley.In another GF-related talk, Nitin Jain, the CTO of longtime GF RF-SOI customer Anokiwave presented Unleashing the mmWave Phase Array Using SOI for 5G Satcom. Anokiwave is a fabless semi IC company (you’ll find a good technical discussion of mmWave phase array written by their Chief Architect here). They do active antennas (aka phased array), something the military’s done for a long time, but now Anokiwave is bringing it to new markets and applications including radar, satcom and 5G. What they’ve been able to do is planarize the active antennas. They use GF’s 45RFSOI process technology for phased array systems because of the cost, performance, scalability and system enhancements it enables. 45RFSOI, he explained, is ideal for beam-forming FEMs (including the switches, LNAs and PAs). The move to 5G/mmWave is going to require a lot of antennas, so these Anokiwave ICs are headed to high volumes, concluded Jain.Stellar by STAs Roger Forchhammer, Director of Business Development at STMicroelectronics pointed out in his presentation, Automotive FD-SOI Microcontrollers with Embedded PCM, ST pioneered FD-SOI (and that was almost a decade ago, btw). Then in February 2019, they announced a world first: they’d begun sampling 28nm FD-SOI microcontrollers (MCUs) with embedded non-volatile memory (eNVM) based on embedded Phase-Change Memory (ePCM) to 10 alpha customers. These MCUs target powertrain systems, advanced and secure gateways, safety/ADAS applications, and vehicle electrification.STMicroelectronics slides 9 10 from the SOI Symposium 2019, Silicon Valley.(In case you want technical details, the breakthrough ePCM eNVM was first presented at IEDM in December 2018 – you can get the presentation that accompanied the paper, Truly Innovative 28nm FDSOI Technology for Automotive Microcontroller Applications embedding 16MB Phase Change Memory, from the ST website.)In his Silicon Valley presentation, Forchhammer said they’re now doing Stellar, a whole family of automotive products on FD-SOI. To do it, they’d taken an existing device and moved it to 28nm FD-SOI with ePCM, which they manufacture at their fab in Crolles, France. A major advantage for automotive he cites is that in software updates it’s bit-level programmable. “ST is fully behind FD-SOI,” he concluded, adding that we’re see more automotive as well as IoT products coming soon. Well folks, that’s all for this post. We’ll finish up our coverage of the SOI Consortium’s 2019 Silicon Valley Symposium in the next ASN post (there was so much to cover!). So please stay tuned.
Read More
FD-SOI for RF and mmWave communications is a hot topic. In high-data rate communications like RF and millimeter-wave devices in particular, FD-SOI delivers high-performance with numerous unique advantages, making it most likely the fastest RF-CMOS technology on the market. If you’d like to take a deep dive and learn more about it, Soitec and Incize are sponsoring a free, full-day workshop in Grenoble on April 4th, 2019. Click here for registration information. The workshop follows the day after the IEEE/EDS EuroSOI-ULIS conference there (you can read about the full conference in a previous ASN post). This technical workshop will cover the FD-SOI technology platform with a focus on its compatibility with RF mmWave communications. Attendees will hear from notable FD-SOI leaders and experts from leading industry and research institutions presenting updates on key developments and building blocks across the semiconductor value chain. Topics will include circuit design, device fundamentals, simulation and characterization of RF devices, test, CMOS technology and substrate technologies enabling FD-SOI. In addition, the workshop will include an overview about how FD-SOI technology is benefiting current and future end user applications. Here’s the agenda: [caption id="attachment_15990" align="alignleft" width="945"] FD-SOI technology platform: new standards for emerging consumer electronics [Click to enlarge.][/caption]
Read More
Following the immense success of last year's FD-SOI training day in Silicon Valley, the SOI Consortium has another one planned for the end of April this year. If you want to start learning how to leverage FD-SOI in your chip designs, this is a great place to start. Click here for information on how to sign up. ST Fellow Dr. Andreia Cathelin has put together another great line-up. World renowned professors and experts from industry will deliver a series of four training sections of 1.5 hours each, focused on energy efficient and low-power, low-voltage design techniques for analog, RF, high-speed, mmW and mixed-signal design. You'll learn about design techniques that take full advantage of the unique features of FD-SOI, including body biasing capabilities that further enhance the excellent analog/RF performances of these devices. Each section of this training day will take you through concrete design examples that illustrate new implementation techniques enabled by FD-SOI technologies at the 28nm and 22nm nodes – and beyond. The design examples will cover basic building blocks through SoC implementations. A global Q A session will close the day. Here's a little more info on how the day will unfold. Click on the slides to see them in full screen. Morning sessionsFDSOI-specific design techniques for analog, RF and mmW applications - Andreia Cathelin, Fellow, STMicroelectronics [caption id="attachment_11714" align="alignleft" width="300"] Quick preview from Andreia Cathelin's FD-SOI training session (Courtesy: STMicroelectronics, SOI Consortium)[/caption] Andreia Cathelin is ST's key design scientist for all advanced CMOS technologies, and is arguably the world's leading expert on leveraging FD-SOI in high-performance, low-power RF/AMS SoCs. Her course will first present a very short overview of the major analog and RF technology features of 28nm FDSOI technology. Then the focus moves to the benefits of FD-SOI technology for analog/RF and millimeter-wave circuits. She'll give design examples such as analog low-pass filters, inverter-based analog amplifiers and 30GHz and 60GHz Power Amplifiers, as well as mmW oscillators. There will be particular focus on the advantages of body biasing and special design techniques offering state-of-the-art performance. Circuit Design Techniques in 22nm FD-SOI for 5G 28GHz Applications - Frank Zhang, Principal Member of Technical Staff, GlobalFoundries [caption id="attachment_11716" align="alignright" width="300"] Quick preview from Frank Zhang's FD-SOI training session (Courtesy: GlobalFoundries, SOI Consortium)[/caption] Frank Zhang has designed chips using GF's 22nm FD-SOI (22FDX) process for WLAN, 5G cellular and automotive radar applications. His course will focus on how to take advantages of FD-SOI’s high-frequency performance at relatively low-current density to design high performance RF/mmWave circuits. Examples circuits include a 28GHz LNA, a 28GHz PA and an RF switch for 5G applications. The FD-SOI advantages such as low capacitance, high breakdown voltage and high-output impedance will be exploited in these design examples. This course will also discuss how to extend these techniques to applications at higher frequencies and/or higher current densities that are subject to extreme temperatures and EM requirements. Afternoon sessionsEnergy-Efficient Design in FDSOI - Bora Nikolic, Professor, UC Berkeley [caption id="attachment_11715" align="alignleft" width="300"] Quick preview from Bora Nikolić's FD-SOI training session (Courtesy: UC Berkeley, SOI Consortium)[/caption] Borivoje (“Bora”) Nikolić is known as one of the world’s top experts in body-biasing for digital logic (he and his team have designed more than ten chips in ST’s 28nm FD-SOI.) If you missed it, his team's RISC-V chip was cited as one of Dr. Cathelin's “Outstanding 28nm FD-SOI Chips Taped Out Through CMP” – read more about that here. His talk at the training day will present options for energy-efficient mixed-signal and digital design in FD-SOI technologies. He'll explain how to generate body bias and use it to improve efficiency, with examples in RF and baseband building blocks, temperature sensors, data converters and voltage regulators. The techniques will be presented in the context of UC Berkeley's latest RISC-V-based SoC, designed to operate in a very wide voltage range using 28nm FD-SOI. mm-Wave and Fiber-Optics Design in FD-SOI CMOS Technologies - Sorin Voinigescu, Professor, University of Toronto [caption id="attachment_11713" align="alignright" width="300"] Quick preview from Sorin Voinigescu's FD-SOI training session (Courtesy: U. Toronto, SOI Consortium)[/caption] Sorin Voinigescu is a world renowned expert on millimeter-wave and 100+Gb/s ICs and atomic-scale semiconductor device technologies. His lecture will cover the main features of FD-SOI CMOS technology and how to efficiently use its unique features and suitable circuit topologies for mm-wave and broadband SoCs. He'll begin with an overview of the impact of the back-gate bias and temperature on the measured I-V, transconductance, fT, and fMAX characteristics. Then he'll compare the maximum available gain, MAG, of FDSOI MOSFETs with those of planar bulk CMOS and SiGe BiCMOS transistors through measurements up to 325 GHz. Next, he'll provide biasing, sizing and step-by-step design examples for VCO, doubler, switches, PA, large swing optical modulator drivers and quasi-CML circuit topologies and layouts that make efficient use of the back-gate bias to overcome the limitations associated with the low breakdown voltage of 20nm and 12nm FD-SOI CMOS technologies. Sign Up Now!With over 100 attendees filling every chair in the auditorium, last year's training day was sold out. Although it was in Silicon Valley, people actually flew in from all over the world to be there. During the Q A at the end, most everyone prefaced their questions by saying, “Thank you. I really learned a lot today.” 2018 will be no different – except that it's sure to sell out even faster. Please note, though, that this is not a free event, so only the attendees will get copies of the slide decks. Here's key info you need to sign up. See you there!What: SOI Consortium's FD-SOI Training DayWhen: 27 April 2018, 7:30am – 5pm.Where: Crowne Plaza San Jose, Milpitas CA (parking is free)Registration fee: US $485.00 (includes training book, breakfast, box lunch and refreshments during breaks)How to sign up: Click here to go directly to the registration site.
Read More