innovation

In the rapidly-evolving semiconductor industry, maintaining a competitive edge is crucial. To position Europe at the forefront of global semiconductor innovation, imec is leading the NanoIC pilot line initiative. Aligned with the European Chips Act, this initiative is a strategic move to bolster Europe's leadership in key markets like high performance computing, automotive, and healthcare.SEMI spoke with Srikanth Samavedam and Jo De Boeck from imec, Belgium, to learn more about the NanoIC pilot line and to better understand its goals, challenges, and prospects. From transitioning to gate-all-around (GAA) nanosheet devices, to developing advanced memory technologies and interconnects, this conversation highlights the cutting-edge advancements made possible through collaboration across the industry’s value chain.SEMI: How is the NanoIC pilot line working to revolutionize the semiconductor industry, and what are its main objectives?Samavedam: The NanoIC pilot line is a European initiative aimed at bridging the gap between R D and industrial innovation. The project is creating a beyond-2nm system-on-chip (SoC) pilot line, developing advanced logic, memory, and interconnect technologies. This effort supports the European Chips Act's vision for leadership and competitiveness in global semiconductor innovation, particularly in critical markets like high performance computing, communication, automotive, energy, and healthcare. However, advanced technologies come with more complexity, and addressing these complexity challenges requires more mature module baseline flows. By improving baseline flow repeatability and variability while reducing defectivity, we can accelerate the development of future technologies. The NanoIC pilot line is working to provide access to these advanced technologies and baselines to develop future compute systems. This will help ensure European competitiveness across the industry – from semiconductor materials, equipment and design to systems and applications.SEMI: Who are the core partners involved in this initiative?De Boeck: Key partners of the pilot line include CEA-Leti, Fraunhofer-Gesellschaft, VTT Technical Research Centre of Finland, Tyndall National Institute, and the Center for Surface Science and Nanotechnology of the University POLITEHNICA of Bucharest. This project is also supported by the Flemish government, other participating states, and the Chips Joint Undertaking of the EU Chips Act.These institutions and organizations bring a wealth of knowledge and resources, and imec compliments their efforts by providing access to its global partnerships with key industry leaders. The NanoIC pilot line is helping strengthen Europe’s global semiconductor industry leadership while aligning efforts with other regional Chips Acts. SEMI: Can you elaborate on the significance of transitioning from field-effect transistors (FinFETs) transistors to GAA nanosheet devices in CMOS technology?Samavedam: The transition from FinFETs to GAA nanosheet devices is a significant advancement in CMOS device technology. FinFETs have been the backbone of CMOS technology from the 22nm to the 3nm node. But starting at the 2nm node, nanosheet devices will need to be introduced. Nanosheet devices, including variants like Forksheet devices, are expected to drive scaling and performance through three generations – 2nm, A14, and A10. Complementary FET (CFET) architectures are also expected to be introduced around 2031 at the A7 node, which will represent another major inflection point in CMOS device design. This progression requires extensive research into new materials, process modules, equipment, and advanced patterning capabilities using high numerical aperture extreme ultraviolet (high NA EUV) lithography – all of which will be implemented on the NanoIC pilot line. FIGURE PROVIDED BY IMEC │ SCHEMATIC ILLUSTRATION OF A FUTURE COMPUTE SYSTEM. THE SYSTEM IS MADE OF LARGE MULTI-DIE ELECTRICAL-OPTICAL INTERPOSER PROVIDING ELECTRICAL AND OPTICAL INTERCONNECTS BETWEEN THE VARIOUS CHIPLETS (CPUS, GPUS, HBM). ALSO SHOWN ARE CONNECTIONS TO PACKAGE SUBSTRATE, AS WELL AS FIBER CONNECTORS AND AN INTEGRATED LASER SOURCE. CENTRAL PROCESSING UNIT (CPU); GRAPHICS PROCESSING UNIT (GPU); HIGH BANDWITH MEMORY (HBM); PROCESSING UNIT THAT CAN INCLUDE CPUS, GPUS, AND OTHER SPECIALIZED PROCESSORS (XPU); APPLICATION-SPECIFIC INTEGRATED CIRCUIT (ASIC); ELECTRONIC INTEGRATED CIRCUIT (EIC); FF-LEVEL: FEMTOFARAD-LEVEL; FIELD-PROGRAMMABLE GATE ARRAY (FGPA); GAAS QD: GALLIUM ARSENIDE QUANTUM DOT; INTEGRATED SILICON PHOTONICS PLATFORM 300MM (ISIPP300); REDISTRIBUTION LAYER (RDL); SILICON PHOTONICS (SIPHO); THROUGH PACKAGE VIA (TPV). SEMI: What are the key innovations necessary for advancing memory technology?Samavedam: As SRAM scaling slows, the exploration of novel, dense embedded memory concepts will become imperative. Technologies like spin orbit torque magnetic RAM (SOT-MRAM) and 2-transistor 0-capacitor (2T0C) embedded DRAM using deposited semiconductors like indium gallium zinc oxide (IGZO) are promising. These innovations address memory capacity and bandwidth challenges from new workloads in compute systems. Additionally, developing a 3D memory platform to explore future memory options will be essential for improving SRAM and DRAM. These advancements will help meet the demands of new applications like machine learning, augmented and virtual reality, and autonomous vehicles.SEMI: How do advanced interconnect technologies contribute to the future of semiconductor design?Samavedam: Advanced interconnect technologies, like chip-to-chip lateral (2.5D or interposer technologies) and vertical interconnects (3D technologies), play a crucial role in addressing memory capacity and bandwidth challenges. These technologies enable the partitioning of SoC functions into separate dies, allowing for more efficient and scalable designs. Advances like pitch scaling of micro-bumps and copper (Cu) hybrid bonding are facilitating this fine-grained partitioning of SoC functions. Additionally, optical interconnects and 3D interconnect-enabled co-packaging provide high-bandwidth and low-power connectivity at wafer scale. The rise of chiplet architectures and standardization will also increase the demand for low-cost, tight-pitch interconnect technologies like Cu/polymer redistribution layers.SEMI: How do your collaborators benefit from the NanoIC pilot line? De Boeck: One of the biggest collaborator benefits is the pilot line’s commitment to knowledge sharing through R D access and training. We invite foundries, IDMs, materials suppliers, equipment suppliers, and system companies/OEMs to jointly develop the materials, process modules, and integration flows to accelerate the development of beyond-2nm SoC technology pillars.Design pathfinding and system exploration process design kits (PDKs) will be available for start-ups, small- and medium enterprises, universities, and design and system companies to aid in prototyping and testing their designs. The NanoIC pilot line will also offer comprehensive training programs, including virtual PDK training, bootcamps for faculty, and internships and expert courses for students. To learn more, experts and key partners of the NanoIC pilot line will be presenting from 14 -16:40 at SEMICON Europa on November 12. imec’s program, ITF Chip into the Future, will highlight advancements in digital technology, capacity building through the European Chips Act, and the role of the NanoIC pilot line in accelerating beyond-2nm innovation. The conversation will also address industry requirements for pilot lines, emerging initiatives boosting Europe’s innovation and competitiveness, and perspectives on advanced materials and semiconductor equipment. Srikanth Samavedam, Senior Vice President of Semiconductor Technologies at imec, oversees programs in logic, memory, photonics, and 3D integration. Previously, he was a senior director at GlobalFoundries, leading 14nm FinFET technology into production and developing 7nm CMOS. Starting his career at Motorola, he worked on strained silicon and other advanced materials. He holds a Ph.D. in materials science and engineering from MIT and a master's degree from Purdue University. Jo De Boeck, Executive Vice President and Chief Strategy Officer at imec, oversees the company’s strategic direction and serves on its executive board. He joined imec in 1991 after earning his Ph.D. from KU Leuven and has since held various leadership roles, including head of imec’s Smart Systems and Energy Technology business unit and CTO. De Boeck is also a part-time professor at KU Leuven. Maria Daniela Perez / Communications Manager, SEMI EuropePhone: +49 160 2562977Email: [email protected]

With the rapid proliferation of electronics applications with more powerful embedded intelligence, demand for smarter, more efficient sensors is increasing to help devices connect to the world around them. As the semiconductor industry drives the future of connected technologies and sustainable solutions, it faces challenges in energy consumption, resource management, and ensuring data security.SEMI spoke with Simone Ferri, Vice President and General Manager at STMicroelectronics (ST), about current trends and challenges in the Micro-electromechanical Systems (MEMS) and imaging sensors market and how ST is driving innovation in this rapidly evolving industry. Ferri shared insights ahead of his keynote presentation at the SEMI MEMS Imaging Sensors Summit on November 14, 2024, in Munich. Registration is open.SEMI: Welcome, Simone, and thank you for sharing your perspective on the dynamics and trends for today’s MEMS and imaging sensors. To start, how would you describe the current market dynamics for these technologies, and what key factors are influencing these dynamics? Ferri: Right now, the MEMS and imaging sensors market is primarily driven by applications such as automotive electronics, consumer medical devices, AI-powered devices, and intelligent wake-up systems.According to Omdia, the MEMS market is projected to reach approximately $11 billion by 2027, with a CAGR of 2.8% from 2022 and 2027. Currently, automotive applications account for 50% of this market, with industrial at 15% and consumer at 35%. Notably, the automotive sector is the fastest growing, with a 5.4% CAGR, driven by the increasing use of inertial measurement units (IMUs) and microphones.In addition, Yole Group estimates that the imaging market, including optical sensing, will grow at a 4.7% CAGR between 2023 and 2029. Although mobile phone applications remain the primary driver of Complementary Metal-Oxide-Semiconductor (CMOS) image sensors (CIS) volumes, other sectors, including consumer electronics, automotive, and security imaging, are also contributing to the growth.Long-term forecasts for smartphone sales have been trending downwards, but mobile phones still remain a major driver of applications, innovation, and overall volume in the imaging market. Notably, the automotive imaging sector is one of the fastest growing markets and is expected to drive additional demand for CIS.Factors that influence the current market include global economic conditions, regulatory changes, geopolitical factors, technological innovations, and the emergence of new applications and use cases.SEMI: Can you elaborate on the growth strategies that STMicroelectronics is adopting to stay competitive in the MEMS and imaging sensors market? Ferri: ST has played a pivotal role in both the MEMS and imaging sensors markets for over two decades with its proprietary silicon technologies. We fully leverage our Integrated Device Manufacturer (IDM) business model, which allows us to support our customers through integrated capabilities for both design and manufacturing.To remain competitive, we are exploring new markets for MEMS sensors, particularly in digital healthcare with biosensors, where wearable devices are expected to exceed 500 million units per year by 2027.We’re focusing on the growing demand for automotive sensors such as accelerometers, Inertial Measurement Units (IMU), and pressure sensors, particularly with the rise of electric vehicles. We are enhancing the integration and synergy between automotive and personal devices. For example, we are combining high-g and low-g accelerometers within a single IMU, enabling accurate fall and crash detection, along with precise orientation and wake-up functionality.AI is another one of our priorities. In today's digitalized world, AI enables real-time, contextual understanding and the ability to make decisions that optimize and reduce the power consumption of the final device. Sensors are no longer merely for data collection. Thanks to AI, sensors can interact with their environment and significantly contribute to innovation and sustainability.We are also prioritizing low power consumption. Our MEMS technology operates in low-power mode with almost negligible energy use, activating only when necessary, without waking up the system to understand its environment or to be reconfigured.In addition, we’ve seen optical sensing continue to grow year over year. Optical sensing now offers features such as 3D capture, low-power and low-footprint computer vision, Near InfraRed (NIR) and even Short Wavelength InfraRed (SWIR).We are accelerating and leveraging our IDM model and broadband semiconductor supplier positioning to propose wider system offerings based on the array of sensors and microprocessors that ST develops. As the world shifts toward widespread use of sensors and data collection, the demand for secure sensing technologies is growing, extending beyond mobile and PC applications to spatial computing and AR/VR environments. For example, if we are talking about recognizing specific persons in an AR environment, we don't want the data related to these persons to be sent to the cloud before a decision is made about whether they are supposed to be there or not, as such information can be intercepted. We want all the data to be managed at sensor level and only a warning of rejection or acceptance to be transferred outside our secure sensor. SEMI: What are some of the latest technological innovations in MEMS and imaging sensors that are shaping the industry? Ferri: In MEMS, we're seeing significant advancements in three key areas:- In-sensor AI is integrating technologies in the sensors such as machine learning core (MLC), adaptive self-configuration (ASC), and intelligent sensor processing units (ISPU).- Open sensors are designed to interface seamlessly with other sensors, allowing third parties to benefit from on-sensor processing innovations, while building an ecosystem to create joint value with customers.- Accurate sensors are providing high-precision data, enabling better decision-making and smoother, more natural user interactions. These sensors also reduce factory calibration time and resources, leading to overall lower energy consumption. Because of their accuracy, onboard MLC, and ASC, the sensors can also reconfigure themselves without interaction with the processor, thus guaranteeing the proper accuracy at lower power consumption, at any time, under any condition.In the imaging sensor market, key trends include:- Higher Pixel performance is leading to improved signal-to-noise ratio (SNR), low light performance, better quantum efficiency (QE) and lower noise performance. Despite post processing, pixel performance remains the key factor as SNR performance must remain high while the pixel shrink roadmap advances.- Embedded Intelligence is providing local processing for local decision making, enhanced security, advanced image sensor processing (ISP) for improved image quality, and fusing sensor functions to deliver a better user-experience.- "Always on" capabilities are supporting mass sensorization and deployment of optical sensing solutions everywhere through specific low-power design techniques, process development, and overall system architecture optimization.SEMI: Looking toward the future, what trends do you anticipate will have the most significant impact on the MEMS and imaging sensors market? Ferri: Some macrotrends for sensors include:Electrification: Certain consumer and industrial applications are now being adopted in the automotive sector, especially with the rise of electric vehicles creating new opportunities for innovation and for new players to enter the market. As example, the predictive maintenance that has been developed for industrial electric motors is ported 1:1 to electric vehicles.AI: Regarding data transmission, distributed architecture will push AI towards edge computing, increasingly supported by advancements in 6G and foldable technologies. Additionally, as AI becomes more integrated, the maintenance and security for AI will require more attention.Smart home, buildings, and cities: As cities grow, the demand for smart homes and buildings rises, requiring more sensors to manage energy, security, and urban infrastructure efficiently. Over 55% of the global population and 70% of the EU population reside in cities. Urban areas generate more than 80% of the world’s GDP, and by 2030, it's anticipated that 68% of the global population will be urban dwellers, pointing to the growing need for smart cities.Aging population and digital health: The integration of biosensors with MEMS technology will be crucial for addressing the needs of an aging population.Overall, the use of image sensors for environmental sensing is steadily increasing. This is a major focus for ST, particularly in 3D sensing. New use cases, such as presence detection, are enhancing security and reducing power consumption due to efficient data processing. Additionally, the average number of cameras in smartphones, automobiles, and even in devices like robots and vacuum cleaners, continues to grow.SEMI: What has STMicroelectronics been working on, and what are your plans for the upcoming years? Ferri: To date, we have shipped over 23 billion MEMS sensors. Still, we remain committed to continuously improving our products and enhancing our MEMS technology in terms of affordability, miniaturization, performance, and novelty. We are striving to set the stage for a future defined by innovation and excellence with:Evolution of our current product portfolio by investing in lower power consumption, lower supply voltage, and additional and more sophisticated in-sensor AI for an effective distributed AI conceptNew sensors for presence detection, like infrared (IR) sensors, and health-focused sensors such as biosensors.MEMS sensors are also becoming increasingly accurate, open towards different ecosystems of technologies, and so intelligent that they can self-configure and reduce power consumption thanks to optimal data processing. These attributes allow us to provide meaningful and sustainable solutions across sectors such as automotive, industrial, infrastructure, and personal electronics, enabling us to improve energy efficiency, reduce waste, and support sustainable practices for a greener planet.For the past 10 years, ST has focused on depth sensing across multiple use cases. Today, ST is the number one in the world for time-of-flight solutions through our ST FlightSense product family. More recently, we launched our global shutter image sensors family, ST BrightSense, to address markets like personal electronics, automotive, industrial, communications equipment, and computers and peripherals.More specifically on the automotive side, we have the portfolio, customers, and customer program awards to lead the driver and occupancy monitoring market. We continue to secure design wins from our growing customer base while we expand our product portfolio and broaden our customer and application footprints.SEMI: What are some of the biggest challenges facing the MEMS and imaging sensors industry today, and how is ST addressing them? Ferri: The MEMS and imaging sensors industry faces several challenges, but with strategic planning and innovative solutions, companies can overcome these obstacles by focusing on the following:Integration: With our biosensors, we are doing more with less space. For example, in a standard accelerometer, we integrate an analog front end for electrocardiogram (ECG) analysis, enhancing functionality without increasing the device footprint.Performance enhancement: Ensuring high performance and reliability in various environmental conditions is crucial, especially in automotive and healthcare applications. To meet these demands, we deploy comprehensive testing protocols to ensure our sensors meet performance and reliability standards.Power efficiency: Reducing power consumption is vital, particularly for battery-operated devices like smartphones and IoT devices. We are developing low-power architectures to address this need.Data security: With the growing use of imaging sensors in surveillance and personal devices, data security and privacy have become paramount. Our solutions include encryption for data transmission and storage, as well as robust access control mechanisms to prevent unauthorized access to sensor data.Additionally, supply chain issues remain a significant challenge today. We believe our strategy and capacity as an IDM, combined with our strong innovation capabilities, give us a competitive edge in supply chain management.SEMI: What are you most looking forward to at the MEMS Imaging Sensors Summit, and what does it mean for the European semiconductor industry? Ferri: I look forward to the Summit as a valuable opportunity to connect with industry peers, share insights, and explore new collaborations. I encourage my peers to attend, as it’s a unique platform to collectively shape the future of our industry and sustain Europe’s leadership in semiconductor innovation. About Simone FerriSimone Ferri is Vice President of APMS Group and General Manager for MEMS sub-group at STMicroelectronics. Ferri began his career in STMicroelectronics in 1999 as an R D engineer before becoming a digital designer for the company’s audio division, leading into product management after 5 years. In 2014, ST entrusted Ferri with MEMS consumer sensors followed by global MEMS-sensor related Marketing and Application activities across all markets and segments, leading into his current role. Ferri graduated with a degree in microelectronics from Politecnico di Milano (Polytechnic of Milan), where he also completed his MBA. Sitong He is Marketing and Communications Manager at SEMI Europe.

The drive to scale nodes towards physical limits, known as "More than Moore," and the adoption of 3D architecture in chip integration strategies for advanced logic and memory applications has led to unprecedented demand for high-quality dependable materials solutions. With the aid of digital solutions, the process is expedited with higher quality and efficiency.SEMI spoke with Thorsten vom Stein, Director, Head of Process Design Semiconductor Materials at Merck KGaA, Darmstadt, Germany, about how materials innovations and advanced packaging can contribute to smarter supply chain solutions for a sustainable ecosystem.More insights into key aspects of 3D architecture in chip integration and heterogeneous integration will be shared at the Advanced Packaging Conference (APC) during SEMICON Europa 2024, Nov. 12-15 in Munich, Germany. Registration is open.SEMI: What makes the digitalization of chemical process design for semiconductor materials manufacturing so challenging at a technology level? Vom Stein: The primary challenge in digitalization of process design is achieving data rich experimentation and design flexibility from the start. When we begin the process design for a novel material solution, the freedom of design needs to be very high for optimal outcomes. For example, to identify the best sequence of unit operations to achieve best process intensification, do we need a distillation or extraction after the reaction to meet the purity requirements? At the same time, the samples from these early process trials need to have purity levels and process reliability standards for high-volume manufacturing of routine production in order to meet the requirements of our customers’ leading-edge chip integration strategies. We address this need by executing data rich experimentation starting with first trial, and thereby establish “production ready” data density in the lab.To avoid confining our design space, we therefore need highly “sensorized” and automated modular lab equipment that can give us the data density we need and flexibility at the same time.SEMI: Are data-driven approaches also applied to streamline manufacturing processes? Vom Stein: Yes, data-driven approaches are key to driving cost, quality, process reliability and sustainable excellence. As we scale up from lab experiments to high-volume manufacturing—often times increasing volumes by two or three orders of magnitude—we scale the process model virtually ahead of its physical twin to de-risk these major scale-up steps. An example of this is simulating the effect of reactor geometry on the impurity profile.Establishing this handshake between the physical asset and the process model early in the development has a lot of benefits for sustained cost efficiency of the future manufacturing process. For instance, it allows for optimization of yield and cycle times to the existing asset infrastructure. Furthermore, we can achieve quality reliability critical to our customers by establishing end-to-end correlation models that link the quality of incoming raw materials to finished good impurity profiles.Finally, we can achieve the lowest possible carbon footprint and minimize waste streams and energy intensity via process intensification by matching the unit operation sequence to the specific thermodynamics and kinetics of the process.SEMI: How can advanced packaging contribute to the pursuit of net zero? Vom Stein: Ultimately in a successful process design, we aim to achieve the maximum yield of value-added product with minimal input of resources and raw materials. So, there is an intrinsic synergy between highly intensified processes and their carbon footprint. The digitalization of process design allows us to track the CO 2 footprint during every iteration of the design. Establishing this tracking as a routine design KPI is one of the key initiatives to drive net zero semiconductor material solutions.In addition, advanced process design is a key enabler for circular value streams. We are currently working on multiple projects to recycle waste streams and re-feed them as raw materials in our processes. We are also exploring how our chemical process technology can aid our customers’ recycling efforts such as reusing lithography cleaning solvent waste streams.SEMI: In your previous talks, you emphasized the importance of diversity, equity and inclusion (DE I). How is this related to the digital revolution? Vom Stein: In the not-so-distant past, my team consisted mainly of process chemists and engineers. Now, we are working with data scientists, model developers, automation experts and many more substance matter experts on our projects. This work requires an inclusive culture to maximize the impact of these diverse sets of insights and disciplines.We also must acknowledge that, in many instances, we are exploring unchartered territory that requires a “leap of faith” culture trusting in digital models. Imagine, for example, a production plant director who is used to a stepwise physical scale-up, now being onboard with skipping physical scale-up steps by using predictive process models. It takes time to really establish a trust in the “power of data.” This type of culture is championed at Merck KGaA, Darmstadt, Germany on all levels: from CEO to the production operator. Our DE I Report showcases how we continuously build belonging for over 64,000 employees across the globe.SEMI: Merck KGaA, Darmstadt, Germany is a key contributor to semiconductor innovations. How important is it for Merck KGaA, Darmstadt, Germany to collaborate with other industry leaders to achieve goals in matters such as sustainability and DE I? Vom Stein: Collaboration with our customers and OEM partners is a key piece of achieving the molecular precision necessary to drive technology evolution that serves as the backbone to society. More and more, we need to link our material solution manufacturing process to the process parameters of the tools in the fab, ultimately improving the chip yield of our customers. To transition from the nanometer era to the angstrom era, we must establish these process correlations end to end along the value chain, which is why we are heavily engaged on our Athinia collaboration framework.Besides technology enablement, sustainability is the next avenue where cross value chain collaboration is a must to lower the CO 2 and energy footprint of our industry. To this end, we have started a joint program with Intel on AI-enabled sustainable semiconductor processes.The importance of industry collaboration is why I was so honored to participate at SEMICON Europa together with representatives from leading companies.SEMI: What did enjoy about SEMICON Europa 2023 that you would like to experience again in 2024? Vom Stein: I was really impressed by the SEMICON Europa 20 Under 30 recognition program launched during the show. The program honored the brightest young leaders who have demonstrated success in their careers in the microelectronics supply chain. We were very happy with the acknowledgement of one of our brightest minds at Merck KGaA, Darmstadt, Germany, Balazs Bordas, Digital Twin Implementation Lead. He has been instrumental for many of our pioneering efforts in this space.Such recognition programs are very important for our industry and can make a significant difference in the perception of the semiconductor industry and its ability to motivate and attract more talent. I personally hope to see similar programs in the years to come.Additional resources:Learn more about diversity and inclusion at Merck KGaA, Darmstadt, Germany.Learn more about Merck’s KGaA, Darmstadt, Germany modular lab automation approach.Merck KGaA, Darmstadt, Germany sponsored SEMICON Europa and SEMI Advanced Packaging Conference in 2023. Thorsten vom Stein is Director, Head of Process Design Semiconductor Materials at Merck KGaA, Darmstadt, Germany. Based in Darmstadt, Germany, he holds a PhD in Chemistry from the RWTH Aachen University and has extensive experience in Catalysis, Materials Science, Process Development and Value Chain Innovation.Serena Brischetto is Director of Marketing and Digital Engagement at SEMI Europe.

Silicon carbide (SiC), with its wide band gap and high thermal conductivity, is increasingly favored for semiconductor power applications across several fast-growing industries. Its ability to operate at higher voltages and frequencies enables significant efficiency gains, particularly in e-mobility, where SiC offers key advantages in size, weight, and speed compared to traditional silicon-based power devices.However, as promising as SiC is, the industry still faces critical challenges in scaling to meet growing demand. Key barriers include cost, reliability, and manufacturing capacity, all of which must be addressed for SiC to fully mature.SEMI spoke with Entegris Senior Director - Advanced Technology Engagements, Office of the CTO Mark Puttock, Ph.D., to discuss the challenges of scaling SiC power chip manufacturing from a material supplier’s perspective. Puttock shared insights ahead of his presentation at the Entegris session, Cultivating a Thriving SiC Market: Tackling Key Challenges Across the Value Chain, taking place on November 14, 2024, at SEMICON Europa in Munich, Germany. Don’t miss the opportunity to engage with experts from Entegris and other industry leaders. Registration is now open. SEMI: Global megatrends like environmental crises and AI drive the necessity for SiC power semiconductors. What is the current status? Puttock: The increasing demand for efficient power electronics — fueled by global megatrends such as vehicle electrification, environmental de-carbonization, and the rise of power-hungry AI chips — drives the necessity of wide bandgap semiconductors. SiC offers advantages of weight, size, and speed over traditional silicon (Si) solutions, which are particularly vital in automotive applications 600V and above. However, SiC chip manufacturing has not reached the maturity of silicon-based processing. Greater maturity will help reduce costs, which will accelerate adoption in the market.SEMI: What are the main challenges in scaling SiC?Puttock: Challenges in scaling SiC power chip manufacturing to high volumes are not surprising. That’s because high volume producers have not been operating long enough to resolve early-stage issues. From a material perspective, SiC is more challenging to manage compared to Si. The challenges we identify include:Chemical Mechanical Planarization (CMP): SiC is nearly as hard as diamond and significantly harder than Si, making it challenging to achieve a high removal rate while maintaining both planarity and low defectivity. This step is crucial toward the end of the wafering process and before the epitaxial growth of device layers.Handling: SiC is more brittle than Si, making it more susceptible to damage or breakage.Implantation: SiC is more difficult to implant than Si, requiring higher temperatures and the use of aluminum instead of boron as a P-type implant species. Additionally, it is a significant challenge to achieve a reliable aluminum source with a long and stable lifetime.Thermal Processing for Wafer Growth and Epitaxy Processes: SiC processes run hotter than Si ( 2000° C for wafering, 1500° C for epitaxial growth), demanding resilient chamber parts to achieve good lifetimes.Sustainability: Because SiC is extremely hard, the CMP process requires significant amounts of slurry. Improving slurry recycling and wastewater management continues to be a challenge.On October 29, we will address these issues in our webinar, “Challenges in Scaling SiC Power Chip Manufacturing: A Material Supplier's Perspective” This session will provide valuable insights and considerations for advancing maturity in high-volume SiC power chip manufacturing. SEMI: Can you elaborate on the challenges associated with CMP for SiC wafers? Puttock: SiC wafers are challenging to process, requiring specialized materials and methods compared to traditional silicon. Defects in the SiC wafer crystal during non-optimized CMP processing can propagate into the device epitaxial layers. This leads to yield loss, increased electrical resistance, reduced performance, and wasted power.SiC wafers must be cut, ground, lapped, and polished to create the necessary surface properties before depositing active layers. As the demand for these devices grows, optimizing the CMP process is essential to ensure the desired surface quality and planarity required for device fabrication. For a deeper understanding of these challenges, we recommend downloading our latest white paper, “Solving CMP Challenges in High-Volume SiC Production,” which covers:Achieving maximum smoothness with high removal ratesReducing the total cost of ownership Optimizing CMP slurry and pads for the unique wafer chemistry and topology of SiC wafersSEMI: What do you mean by optimizing slurry for SiC CMP?Puttock: CMP slurry typically consists of abrasive nanoparticle powder dispersed in a chemically reactive solution. The objective is to achieve a smooth, defect-free surface (less than 1 A Ra) with a high removal rate (greater than 7 µm/m).Traditionally, achieving high removal rates and smooth surfaces required two separate slurries. This approach sometimes forced SiC wafer manufacturers to choose a defect-free surface over a faster, more efficient CMP process, depending on their fab capabilities. Today, optimization allows SiC wafer manufacturers to achieve both high polishing capacity and good final surface quality using a single slurry.Additionally, while the slurry is the most critical part of the CMP process, the pad must be compatible with the application. This ensures the desired planarity while also preventing scratches or contamination of the SiC wafer surface. Research shows that optimized thermoplastic polyurethane CMP pads outperform traditional thermoset polyurethane pads. The optimized pads minimize surface damage and enhance removal rates due to their bulk hardness.SEMI: What are the future challenges for SiC devices? Puttock: SiC devices are increasingly favored for their superior energy efficiency and reduced environmental impact. However, the SiC manufacturing process presents challenges due to its high-temperature operations, which consumes significant amounts of energy and shortens the lifespan of chamber components. To address this, improving efficiency in these processes will be crucial in the coming years.Recycling is another important challenge. For example, CMP slurries present an opportunity for water recycling and conservation. At Entegris, we are committed to this issue and are actively collaborating with key industry players to enhance material circularity and prioritize sustainability in our new product development.SEMI: How is Entegris contributing to advancements in SiC technology, and what initiatives or partnerships do you have planned for the near future? Puttock: Entegris is an active member of the SEMI Global Automotive Advisory Council (GAAC) and participates in a working group focused on SiC with key industry leaders such as Volkswagen, BMW, Porsche Consulting, onsemi, Infineon, STMicroelectronics, and others. Our engagement spans the entire semiconductor supply chain, collaborating with integrated device manufacturers and original equipment manufacturers in fabs worldwide. Additionally, we recently announced our latest long-term agreement with onsemi, which underscores our commitment to advancing SiC technology.SEMI: What are your expectations regarding your participation at SEMICON Europa? Puttock: SEMICON Europa is a unique platform to connect with the semiconductor and automotive ecosystems. Last year, we organized a highly successful SiC session in collaboration with SEMI at both SEMICON West and SEMICON Europa, focusing on “Connecting the Automotive Ecosystem Towards More Mature SiC Manufacturing.”This year, we will continue the discussion with industry leaders during our session, “Cultivating a Thriving SiC Market: Tackling Key Challenges Across the Value Chain.” Our goal is to provide insights and propose solutions that will enable SiC power chips to achieve their anticipated role in future technology ecosystems.We will present alongside Porsche Consulting, and the talks will be followed by a panel discussion that will explore the current state and future prospects of SiC technology in power electronics. We invite visitors to join us at the Executive Forum on Thursday, November 14, from 1:40 – 3:00 p.m. and to visit us at Silicon Saxony booth 219 in Hall C1.About Mark PuttockMark Puttock, Ph.D., is the senior director of advanced technology engagements in the office of the CTO at Entegris. He has worked in the semiconductor industry for over 30 years with a background in physics and plasma processing. As a team member of the Entegris CTO office since 2014, Mark has followed technology trends and collaborated with Entegris’ global product development teams to develop timely and differentiated new materials, chemistries, and components for all the world’s semiconductor manufacturers. Maria Daniela Perez is Communications Manager at SEMI Europe.

SEMI spoke with Kate Wilson, president of the semiconductor division at Edwards Vacuum, about how her personal dedication to sustainability and Edwards Vacuum’s commitment to green practices such as contributing to the semiconductor manufacturing industry’s reduction of carbon emissions.

AEM Holdings Ltd, a Singapore-based multinational corporation, is listed in Forbes Asia’s 200 Best Under A Billion 2019 and 2020 spotlighting small and midsized companies in the Asia-Pacific region with sales under $1 billion. AEM clinched the Singapore Business Review Technology Excellence Award 2020 for Analytics-Semiconductor and the Singapore Business Awards Enterprise Award 2019/2020. These achievements are testament to AEM’s vision and innovation and the company’s contributions to the increasingly complex testing of chips in a rapidly evolving technological world. I spoke with AEM CEO Chandran Nair, a new Regional Advisory Board (RAB) member of SEMI Southeast Asia, about the company’s intelligent test and handling solutions, its role in digital transformation, the company’s key role in the smart manufacturing movement and the growth prospects for Singapore’s electronics sector. SEMI: AEM’s application-specific, intelligent system test and handling solutions for semiconductor and electronics companies serve the advanced computing, 5G and AI markets. How do you differentiate your solutions from those offered by competitors? Nair: A key differentiation for AEM is that we work closely with our customers to develop application-specific integrated test and handling solutions that meet their needs in a scalable manner from lab to production. We offer our customers customized, full-stack test and handling solutions that give them the agility to accelerate their delivery cycles and enhance product quality. Over the years, AEM has developed and acquired world-class technologies in instrumentation, test, automation, robotics, optical inspection, high-end thermal control, and software. These technology pillars, along with our deep know-how to customize test and handling solutions using the technology pillars as a platform, enable AEM to meet the fast-changing needs of our customers faced with the challenges of testing heterogeneous and complex devices. In addition to investing in technology, AEM has also invested in delivering application-specific solutions to meet customer demand. Our recently announced acquisition of CEI with its manufacturing capabilities in Vietnam and its specialization in low-volume, high-mix manufacturing increases our geographical reach and our ability to quickly turn application-specific test and handling solutions to be deployed. We have a unique and differentiated approach that enables our customers to test high-performance computing devices, automotive devices, and mobility devices with maximum test coverage, cost-effectively, in a manufacturing environment. Our experience in serving the high-performance computing market that traditionally drives advancements in thermal control also puts us at the forefront of delivering comprehensive thermal management, vision, and deep automation and test solutions for the computing, automotive, and mobility markets. AEM also has a strong instrumentation portfolio, including high-density digital instruments and mixed-signal and protocol-aware instrumentation that is well-suited for ATE solutions for SoC, high-power devices, and CMOS image sensors. Over the last few years, we have also established leadership positions in developing and deploying application-specific test solutions for MEMS devices and offering wafer and frame probing stations suitable for R D, wafer sort, and final test. We form strong partnerships with our customers, provide them with end-to-end support in product development, and take them through the entire life cycle process from concept to mass production. Chandran Nair and Goh Meng Klang, vice president of operations, at the AEM manufacturing site in Singapore. (Photo credit: AEM) SEMI: Digital transformation is powering strong growth of advanced computing, 5G and AI. Will AEM be expanding its AEM manufacturing plants in China, Malaysia and Singapore to meet rising demand for these technologies in the coming years? Nair: In regards to manufacturing, AEM currently has manufacturing facilities in Singapore, Malaysia, the U.S., Finland, and China. With our recently announced acquisition of CEI, we will add manufacturing capability in Vietnam and Indonesia. AEM will continue to expand manufacturing appropriately to give our customers cost-effective solutions while maintaining our proven track record of delivering on time and scaling rapidly in times of crises like the pandemic or geopolitical disruptions. As for advanced technologies, the three key factors that will bring the full potential of 5G to fruition are 1) cost-effective, high-powered processing devices at the edge, 2) easy access to high-bandwidth communications, and 3) cost-effective sensor technology. Semiconductors are the primary drivers of these three key success factors. As devices become more complex and our reliance on semiconductor-powered devices in all aspects of our lives deepens exponentially to include mission-critical applications, AEM’s role is to ensure that our customers' electronic and semiconductor devices are shipped thoroughly tested, safe to use, and highly reliable. It is imperative that, as a testing company, we find innovative ways to help our customers test their products with maximum coverage and minimum cost. To do this, we are focusing our R D efforts and investments to continue building on our key technology pillars to ensure that we stay ahead of the curve when it comes to test and handling solutions. We prepare our customers to test increasingly complex devices manufactured on the latest process node. SEMI: During your career you’ve driven projects in test and automation and more recently robotics solutions for ports, logistics warehouses and transport. With robotics and automation a key part of Industry 4.0, what role do AEM solutions play in powering the smart manufacturing movement? Nair: The smart manufacturing movement is powered by semiconductors, software and increasingly by artificial intelligence (AI). Test is at the heart of the process of ensuring that semiconductor and electronics devices reach the consumer well-tested for reliability. With our vision of enabling A Zero Failure World, AEM addresses the necessity for safe, highly reliable devices. The semiconductor companies themselves are adopting smart manufacturing methods. AEM’s tools are Industry 4.0-ready, and we continue to invest in machine learning and data analytics, which are integral to the future of test. Our tools are automated and feature embedded sensors to provide our customers with data about tool usage, the state of a machine’s health, and more. Our tools are connected to our customers’ manufacturing automation platforms. Additionally, we continue to invest in our ability to better slice and dice test data to understand trends and patterns to help our customers analyze data and make decisions faster. SEMI: You also have experience heading autonomous vehicle projects. With the COVID-19 pandemic hastening digital transformation, do you see an acceleration in the development of fully autonomous vehicles and smart manufacturing? Research and development efforts for autonomous vehicles (AV) continue at a fast pace worldwide. With shutdowns and restricted movement rules globally, the pandemic has hastened digital transformation in many ways. The delivery of goods and services is transforming, and AV will surely play a part, especially in secure environments for autonomous transport. The pandemic has accelerated the development of autonomous vehicles and smart manufacturing technology in automation-friendly environments like factories and ports. SEMI: At the recent Global Technology Summit hosted by SEMI, you spoke about testing innovations to meet the demands of highly complex devices. Please elaborate on innovative testing solutions versus traditional testing? Nair: AEM offers a disruptive and differentiated solution, one that is driving a paradigm shift to asynchronous, modular, highly parallel, smart testing solutions. ​ The traditional approach of ATEs to test increasingly complex devices on advanced nodes has reached a point of diminishing returns as it gets exponentially more expensive to increase test coverage to acceptable levels. Additionally, as devices get more complex and companies are rapidly adopting heterogeneous packaging technologies, the realization that System Level Test (SLT) is necessary is forcing a rethink of the entire test process. AEM’s provides asynchronous, modular, highly parallel test cell solutions that enable each test cell to run SLT, final test, or burn-in all in one system and its ability to handle hundreds of test cells independently with each test cell testing multiple devices. Our solutions suddenly make comprehensive testing of every complex device cost-effective. Freeing us from legacy ATE allows AEM to provide these innovative solutions to our customers. AEM engineering and manufacturing teams in Singapore at work on semiconductor test and handling systems for global deployment at world-class semiconductor facilities. (Photo credit: AEM) SEMI: Singapore seems to be in the sweet spot of digital transformation. Singapore’s industrial production grew 8.6% year-over-year in January 2021, an expansion driven mainly by a surge in sectors including electronics, and more growth is seen in the year ahead. Digital technologies such as 5G technology and cloud computing together with continued demand for work-from-home equipment is behind this growth. What are the growth prospects for the region’s electronics sector? Nair: Singapore is well-poised to benefit from the current digital transformation accelerated by the adoption of these technologies during the pandemic. Being a safe, well-governed country with strong IP protection, excellent infrastructure, and the rule of law, Singapore is in a great position to play a central role in cloud-based services, 5G, and the semiconductor industry. Singapore’s semiconductor sector output is at a record high, and the prospects for renewed growth in the region are very good. SEMI: As a new Regional Advisory Board member of SEMI Southeast Asia, how is your industry experience relevant to the scope of this role? What opportunities lie ahead for the region? Nair: I am honored to represent AEM in the SEMI’s Southeast Asia RAB. The SEMI RAB can influence policymakers with ideas and information on the current and future needs of the industry. I also believe that SEMI Southeast Asia can cultivate a strong innovative semiconductor ecosystem that helps regional and global growth. I look forward to working with other very experienced and accomplished board members. Bee Bee Ng is president of SEMI Southeast Asia.