semiconductor packaging

SEMICON Europa 2022 (Munich, 15-17 November) attendees gathered at the Executive Forum for the Opening Ceremony on day one to hear from industry leaders and gain insights into the latest market and technology trends.

Electronic designers demand greater integration densities and faster data transfer rates to meet the growing performance requirements of AI/ML, 5G/6G networks and autonomous vehicles as these technologies have outpaced the capabilities of any single chip.

As monolithic scaling slows down, the semiconductor industry is increasingly relying on advanced packaging technologies to extend Moore’s law through heterogeneous integration. Higher on-package bandwidth, improved yield resiliency and the need to integrate diverse IP from multiple foundries are driving demand for advanced packaging technologies that address these issues but introduce challenges of their own such as efficient power delivery to all the different domains in a heterogeneous system. SEMI spoke with Kaladhar Radhakrishnan, Intel Fellow at Intel, about heterogeneous system integration trends and new developments in the semiconductor industry. Radhakrishnan shared his views ahead of his keynote at the SEMI Connecting Heterogeneous Systems Summit, 1-3 September 2021, an online event. Join the summit to meet experts from Intel and other key industry influencers. Registration is open. SEMI: What is driving the adoption of electronics and semiconductor devices nowadays and why is the development of new and innovative technologies important? Radhakrishnan: We are living in an increasingly data-driven world where devices have become an integral part of our lives. A recent study estimated that in the United States alone, 13.6 connected devices per capita consume an average of 300 gigabytes worth of data every month. In the workplace, COVID-19 has driven fundamental business changes that has sped up the adoption of digital technologies such as virtual conferencing, remote work, and e-commerce. Organizations are realizing that a high-quality video conference can be an adequate substitute for many in-person meetings. As a result, businesses are accelerating the digital transformation in order to adapt and thrive in this new environment. Five decades of sustained exponential growth in semiconductor performance has conditioned the average digital consumer to expect more from their devices. However, there are some headwinds ahead as traditional scaling slows down and power density rises. Because consumers and businesses are now generating data at a faster rate than they can consume it, technologists need to scale compute, storage, and bandwidth even faster to keep pace. Without investments in research and development of new and innovative technologies to address these challenges, the full potential of this data will go unrealized. SEMI: What forces are heightening the importance of heterogeneous system integration? What are the implications for increased on-package bandwidth, improved yield resiliency and the need to integrate diverse IP from multiple foundries? Radhakrishnan: The semiconductor industry increased transistor density and scaled performance through classical Dennard scaling until the turn of the century. By then, the gate oxide thickness had scaled down to atomic dimensions and the exponential increase in sub-threshold leakage signaled the end of scaling through traditional methods. Since that time, the chip industry has been relying on innovations in transistor materials and structures such as high-k metal gate, strained silicon, and FinFETs to keep pace with Moore’s law. However, this alone will not be sufficient to continue scaling and the industry needs to explore other vectors to augment improvements in transistor technology. Heterogeneous integration through advanced packaging is one key technology that can help drive these gains. Technologies like Foveros can enable device density scaling by creating a 3D stack of multiple die using high-density interconnects. Heterogeneous integration enables chipmakers to move from a monolithic system designed on a single large chip to a heterogeneous system comprised of a number of smaller chiplets. The main benefit of using smaller chiplets is that they improve yield and enable application based customization of the foundry processes. However, if the disaggregation to smaller chiplets is not accompanied by an increase in on-package bandwidth, the power and performance penalties associated with chiplet-to-chiplet communication will hobble system performance. This is why advanced packaging technologies that improve die-to-die communication are key enablers for heterogeneous integration. SEMI: What are some of the key technology challenges in developing heterogeneous systems? Radhakrishnan: The obvious challenge that most people focus on is the need for improved on-package bandwidth. However, as we rely on 3D stacking to continue device scaling at the package level, it is important to comprehend power delivery and thermal challenges as well. Power to the top die has to be delivered through TSVs on the bottom die, which not only adds resistance but also reduces the useful area available on the bottom die. This problem is further exacerbated when we stack more than two die. Excessive noise on the power delivery network can cause timing issues that limit the maximum operating frequency of the transistor. Similarly, when we stack multiple die, we must take into account associated thermal challenges. For example, each interface of the multi-die stack adds thermal resistance, which makes it harder to cool the chips at the bottom. SEMI: What are some of the key global market trends that driving demand for heterogeneous and system-level integration? Radhakrishnan: The number of artificial intelligence (AI) and machine learning applications have grown dramatically due to their ability to solve highly complex problems across a wide range of segments. AI and machine learning models require more memory bandwidth and compute capabilities that are difficult to achieve without some form of heterogeneous integration. Another market trend driving demand for heterogeneous integration is the increasing reliance on custom hardware accelerators. To combat the slowdown in frequency scaling and single-core performance, we have moved to multi-core architectures by tackling the inherent parallelism in our workloads. However, Amdahl’s law tells us that such an approach will hit a bottleneck when we reach the limits of the serial portion of the workload. As these constraints slow the performance of general-purpose processors, the reliance on custom hardware accelerators to boost performance for specific workloads is growing. Heterogeneous integration at the system level with a combination of CPUs, GPUs, FPGAs and other accelerators can optimize system power and performance. SEMI: What solutions is Intel developing to address these market needs? Radhakrishnan: Intel is actively involved in the development of the industry ecosystem for heterogeneous integration. We have developed a number of innovative advanced packaging solutions such as the EMIB and Foveros that are used in products today. Intel is also developing the next generation of advanced packaging technologies, Foveros Omni and Foveros Direct, which will dramatically scale the IO density by using direct Cu-Cu bonding technology. Foveros Omni is a crucial building block technology to enable high-voltage power conversion on the package for efficient power delivery. Intel is uniquely positioned to predict the design needs for future systems and deploy its resources to develop the technology building blocks needed to continue performance scaling. Our IDM 2.0 strategy enables us to leverage our leadership in packaging technologies to design the best products and use the best IP to deliver leading products across a broad range of categories. SEMI: What do you expect from your participation at SEMI Connecting Heterogeneous Systems Summit? Radhakrishnan: I’m hoping to shed some light on some of the new technologies we have been developing at Intel to enable heterogeneous system integration. I also want to bring awareness to the power-related challenges we are facing with heterogeneous systems. I also look forward to listening to what other industry leaders have to say on the topic. Kaladhar Radhakrishnan is an Intel Fellow and a Power Delivery Architect with the Technology Development group at Intel. He plays a significant role in shaping and driving power delivery technologies for Intel microprocessors. His areas of expertise include integrated voltage regulators, advanced packaging and passives technologies. Kaladhar is a two-time recipient of the Intel Achievement Award, the highest Intel honor an individual or small team can receive. He has authored four book chapters, over 40 technical papers in peer-reviewed journals, and has been awarded 35 U.S. patents. He has also served as an adjunct professor at Arizona State University. Kaladhar joined Intel in 2000 soon after receiving his Ph.D. in Electrical Engineering from the University of Illinois at Urbana-Champaign. Serena Brischetto is senior manager of marketing and communications at SEMI Europe.

The SEMI Smart Manufacturing Americas Chapter, a key driver of the Global Smart Manufacturing Initiative, accelerates awareness of digital and data-driven strategies and implementations to help speed adoption of smart manufacturing. In 2021, the Chapter will focus on expanding its work across the industry to include academic and research initiatives. The semiconductor industry saw an unprecedented focus on improving digital monitoring of manufacturing activity in 2020, partially due to COVID-19. The Americas Chapter shared case studies on new tools and techniques for social distancing in fabs, aides for remote maintenance, and tips for remote workers. The Chapter also introduced its three pillars of Sensing, Connecting and Predicting and offered related programs. The Global Smart Manufacturing Conference (GSMC) highlighted the significance of universities and research institutions in the development of smart manufacturing with their focus on joint research for broad dissemination. To help drive smart manufacturing advances, at GSMC several offered non-proprietary tutorials on topic including the following: Integrating sensors for acquisition – CEA-Leti Applying new AI and ML tools and strategies to manufacturing – Binghamton University Digital tools for planning, qualifying and management and scheduling in fabs – MINES Saint-Étienne. Adding AI tools to robot work in a smart factory – KAIST Institutes By continuously highlighting the activities of these and other institutions through presentations, interviews, articles and blog posts, we will draw more attention to what is on the horizon for smart manufacturing in 2021. The SEMI Smart Manufacturing Americas Chapter also plans to elevate activities important to the Outsourced Semiconductor Assembly and Test (OSAT), Surface-Mount Technology (SMT) and Printed Circuit Board Assembly (PCBA) segments of the industry including programs on inspection, traceability and the SEMI SMT-ELS Standard for SMT automation. Thurston Taylor, marketing expert at Tokyo Electron and Vice Chair of the Americas Chapter, notes that “With increasingly more demanding requirements for bump, assembly and test, smart manufacturing and applied data science are necessary to achieve back-end goals now and in the future.” Also, many companies are implementing smart manufacturing applications and assessing various strategies to increase their smart manufacturing capabilities. Members of the Americas Chapter plan to review and develop self-assessment documents and maturity models that apply to front-end wafer fabs all the way through packaging and assembly facilities. “Moving forward it is imperative for all of us to up the intensity on specific ROI vectors such as quality, cost, productivity, sustainability and safety leveraging our smart manufacturing SEMI framework of Sensing, Connecting and Predicting,” said noted Bobby Mitra, worldwide director of Smart Manufacturing at Texas Instruments and Americas Chapter Chair. “By offering special flagship events, invited talks, ROI case-studies and ROI criteria in maturity models, we’ll bring high value to the smart manufacturing industry.” Chapter members also will begin mapping the skills needed to implement and support increasingly digital manufacturing capabilities, including any new skill sets, to help companies develop their hiring, training and management strategies. The mapping effort aims to support companies in building a strong pipeline of employees who can efficiently manage and operate smart manufacturing facilities. For its part, the Americas Chapter’s Go Green Subcommittee will focus on applying smart manufacturing technology to reducing the electronic industry’s carbon footprint by accurately tracking energy waste improving overall fab efficiency. Stay tuned for details on activities planned for our chapters in Europe, China, Japan, Korea, Southeast Asia and Taiwan. To learn more about each chapter and how to get involved, please visit the SEMI Smart Manufacturing Hub and sign up for our newsletter. Ayo Kajopaiye is senior project coordinator, Collaborative Technology Platforms, at SEMI.

In the first part of this double feature, we looked at the automotive industry’s transition toward a mobility ecosystem and the shifting business model perspective from selling vehicles to miles. At the core of these changing dynamics are four trends represented by the acronym ACES: Autonomous, Connected, Electric, and Shared mobility. Each of these trends is largely enabled by microelectronics through computer processors, sensor units, and communication architectures. Part 2 of this series explores the business opportunities at the transition from automotive to mobility, and the specific role SEMI can play as a natural bridge between the two ecosystems.Electronics and Software as Drivers for Automotive InnovationThe ACES trends represent an acceleration of the shift in automotive from the industry’s traditionally strong focus on mechanics and hardware toward electronics and software. This transition to electronics and software as drivers for automotive innovation already started in the 1970s with electronic fuel injection, anti-lock brakes, trip computers, and many other attributes that are now considered standard features. As a result, there are now hardly any automotive systems that are not computer-controlled. A vehicle without power windows and locks, electronic climate control, or MEMS-reliant airbags are basically unimaginable in many markets.As shown in the graphic[1] depicting the electronics share of total vehicle cost, the numbers paint a clear picture of the continued growth of electronics over time, with a 44% share today expected to grow to 50% by 2030. McKinsey Company estimates the automotive software and electrical/electronic (E/E) components markets combined will grow at a 7% CAGR from USD 238 billion in 2020 to US$469 billion by 2030[2].The assumption of continued and sustained growth presents a promising outlook for semiconductor and sensor content in vehicles over the next decade, which is particularly strong in the electrification space. Hybrid electric vehicles (HEVs) already contain $900 worth of semiconductor content, and battery-based electric vehicles (EVs) contain $1,000 worth of semiconductors – much higher than the average of approximately $450 of content in conventional vehicles[2]. Other business opportunities in the mid-term (3-5 years) include software, battery technology, infrastructure (charging stations, other hardware components, etc.), as well as vehicle-to-vehicle (V2V) and vehicle-to-environment (V2X) communication. These technologies also demonstrate how the industry’s business focus is expanding beyond the confinement of an individual vehicle to increasingly contemplating the evolving ecosystem around it, resulting in real mobility solutions. Image credit: Continental AG This creates significant opportunities for a large number of SEMI members in the semiconductors and sensors business by connecting them with new customers and partners in the automotive and mobility supply chains, primarily vehicle manufacturers and Tier 1 suppliers, and together realizing new business in new automotive applications such as: Autonomy, including ADAS (GPUs, LiDAR, radar, camera, accelerometers...) Connectivity (link to outside infrastructure and in-cabin devices, roadside units...) Electrification (power electronics, battery monitoring, H2 detection in fuel-cell...) Sharing (customizable vehicle interior, trackable mobility devices such as scooters...) In-cabin experience (media systems, displays, VR/AR, occupant detection...) Vehicle architecture (flex-ray, automotive ethernet, diagnostics, smart parts...) Safety and security (HW/SW firewall, parts authentication, upgradability...) In these partnerships, the vehicle manufacturers and component suppliers clearly benefit from leveraging semiconductor capabilities including: Device and system reliability/robustness/quality (“Zero Defect”), which creates opportunities for new SEMI Standards (e.g. wafer-to-device/system traceability) New design architectures for added functionality, safety and security New packaging solutions (automotive OEMs are already participating in the Heterogeneous Integration Roadmap, seeking to collaborate with device manufactures and Original Semiconductor Assembly Test (OSAT) companies to reduce costs and differentiate on automotive-grade solutions Sensors and imaging (cameras) SEMI Smart Mobility Initiative – Connecting Mobility and ElectronicsSEMI launched its Smart Mobility Initiative in 2018 based on the mandate of providing “SEMI members with access to new business opportunities and collaborative platforms in the automotive electronics supply chain.” The initiative is currently focused on synchronizing the automotive and microelectronics supply chains for automotive electronics innovation – in particular semiconductor devices, sensors, and related products manufactured for this space and sold to vehicle OEMs and Tier 1s. To facilitate closer dialogue among stakeholders from this combined ecosystem, SEMI formed the Global Automotive Advisory Council (GAAC) which now has five regional chapters and represents dozens of companies. Collectively, GAAC members discuss and act on a wide range of topics, from Silicon Carbide (SiC) standardization to new design architectures and closing the OEM requirement gap.While continuing to build on the strong automotive foundation, SEMI’s Smart Mobility Initiative is now expanding its reach and scope of activities to broader mobility themes, such as infrastructure and battery technology and Smart City, to infuse SEMI member communities and the GAAC with new stakeholders and new ideas. These are exciting times!Please contact Bettina Weiss, Chief of Staff at SEMI, at [email protected] for further information about SEMI’s Smart Mobility Initiative, the Global Automotive Advisory Council, and how SEMI can help your organization navigate electronics in the automotive industry to drive innovation in the mobility space.[1] see graphic, created with data from NXP / Freescale[2] Source: McKinsey Company, 2019Microelectronics Power the Future of Mobility – Part 1: Autonomous, Connected, Electric and SharedBettina Weiss is Chief of Staff and Global Smart Mobility Lead at SEMI. Sven Beiker is Smart Mobility Consultant at SEMI.

MEMS technology has changed human interaction with electronic devices. Introduced in the 1990s, the first mass-market MEMS devices were used for inkjet printheads and automotive airbag crash sensors. Today, MEMS are ubiquitous, with billions of the tiny devices adding intelligence and interactivity to smartphones, smart speakers, wearables, automobiles, biomedical devices, remote monitoring and event detection systems, and countless other applications. Integrating MEMS with Flexible Hybrid Electronics (FHE) is an important step in the evolution of this miniaturized intelligent sensing technology, paving the way for its use in new classes of flexible, conformal devices.The integration of the two technologies promises to breed new applications in small form factors but also presents challenges inherent to FHE design and fabrication processes. SEMI’s Nishita Rao caught up with Nathan Pretorius, prototyping and automation engineer, NextFlex, to discuss MEMS-FHE device integration challenges and opportunities ahead of his February 26 presentation, Integrating MEMS Devices in FHE, at FLEX|MEMS Sensors Technical Congress (MSTC) 2020, February 24-27, 2020, at the DoubleTree by Hilton in San Jose, California.Join us at FLEX|MSTC to meet Nathan and other industry influencers advancing innovation in FHE and MEMS sensors. Register now to connect with him at FLEX|MSTC or visit him on LinkedIn.SEMI: Why is integrating MEMS devices into FHE systems important? What new use cases might it enable?Pretorius: The main value proposition of integrating MEMS devices into FHE is that it allows MEMS devices to exist in a different form factor than was possible previously, giving us high-quality MEMS sensors on the flexible and conformable platform of FHE.Ease of application, flexibility, lower cost and rapid iteration on a design are just some of the benefits of FHE devices. And because there are few robust FHE sensors that overlap with MEMS’ capabilities, when you combine the two, you get a lot of compelling uses. That’s why NextFlex is working with agencies and companies to evaluate MEMS’ integration, including using bare MEMS die with microfluidics and promoting new ways of attaching and packaging MEMS die for use with FHE. SEMI: Why is FHE an ideal platform for integrating various types of sensors?Pretorius: MEMS integrated with FHE devices are ideal for rapid design and deployment of data-gathering sensor nodes — which we can iterate for specific applications. A few examples include on-body health monitoring devices for bio-fluids analysis, medical pressure sensors for monitoring blood pressure, and peel-and-stick sensors nodes for infrastructure monitoring. In terms of design and production, FHE devices support rapid prototyping, allowing for instantaneous design-iteration cycles. This speeds design-to-production over traditional rigid PCBs and copper flex because the feedback cycle time between design, manufacturing and testing is shorter, accelerating time to market. What’s exciting about FHE technology is that a variety of sensors or components, including MEMS, can be designed into the base system to easily customize it for a specific application. In addition, our experience shows that when compared to a traditional rigid PCB, an FHE board reduces manufacturing steps and device weight by two-thirds and, perhaps most importantly, converts the device to a thin, conformal shape that makes possible products in new form factors. SEMI: What are the primary challenges to integrating MEMS with FHE? What is NextFlex doing to help device manufacturers address these challenges? Pretorius: There are a few challenges, some of which are device-specific. Most recently, I’ve been focusing on inertial and timing devices, including accelerometers, gyroscopes and resonators. There are a few technical challenges involved in the process of getting the devices from the wafer to an FHE substrate. The wafer processing is very important, especially the dicing and thinning steps. After thinning and dicing, the die is placed onto the FHE substrate. The stresses caused by bonding to the substrate have to be understood and characterized. After placing the die, you then have a calibration step, which is normally performed after the device is packaged. With a MEMS die placed onto directly onto an FHE substrate, calibration then must be done.Finally, the device encapsulation is important, since on an FHE substrate the hard-to-soft material transition is very important to mitigate stresses to rigid component interfaces. We have also been looking at how to work with devices that have damping vents. Flexible encapsulants are inherently more permeable to gases and water vapor than hard encapsulants, so studying the encapsulation of MEMS devices on FHE is another area of interest. NextFlex has been working in a supporting role to evaluate best design practices and best attach and integration methods. In addition to our ongoing collaborative programs, NextFlex is developing the FHE manufacturing ecosystem to include system and component manufacturers and designers, product developers, and materials and equipment providers.SEMI: How do we facilitate closer collaboration between the FHE manufacturing ecosystem and MEMS suppliers such as MEMS device manufacturers, product developers, and materials and equipment providers?Pretorius: It’s important to include manufacturers early in the design process so we can identify challenges up front. That’s why NextFlex spearheads technology road-mapping efforts that include representatives from across the manufacturing ecosystem. We use the roadmaps to prioritize challenges that we can address effectively through collaboration, focusing the industry on solving problems through Project Calls that reveal integration challenges and results from real devices and that tell us how the materials and equipment actually perform with a real device.NextFlex keeps the information flowing, holding quarterly project update webinars to share results. As current devices are optimized for the process in which they will be used, we learn a lot from the project performers who make FHE system demonstrators — and we share that information with the member community. SEMI: Can you point to an example of a successful MEMS-FHE device integration?Pretorius: MEMS-FHE integration is still in the early stages, but we are working on several projects including a DARPA Seedling project for which we have integrated MEMS sensors into FHE systems for testing and evaluation. We plan to continue this work by integrating MEMS and FHE devices using methods that support mass production.SEMI: What would you like FLEX|MSTC attendees to take away from your presentation?Pretorius: We would like to see the FHE community work more closely with MEMS device manufacturers. For example, NextFlex often works with manufacturers to gain access to bare die, which is still a significant hurdle in making devices.The best way to speed things along is to get involved. We encourage FLEX|MSTC attendees to join NextFlex. As a prototyping and automation engineer at NextFlex, Nathan Pretorius explores new print methods for prototyping and automation using novel materials and processes. Pretorius currently focuses on how best to apply software scripting and machine learning to streamline FHE processes. Prior to joining NextFlex, he researched the strengths of roll to roll and screen printing on printed electronics designs, including capacitive touch interfaces, FHE passive component design, and antennas. Nathan holds a Bachelor of Science degree in Graphic Communications from Clemson University. FLEX|MSTC is organized MEMS Sensors Industry Group (MSIG) and FlexTech, SEMI technology communities focused on the growth of MEMS sensors and the flexible electronics supply chain, respectively.Nishita Rao is marketing manager for technology communities at SEMI.

New SEMI Taiwan Testing Committee to strengthen the last line of defense to ensure the reliability of advanced semiconductor applications.Mobile, high-performance computing (HPC), automotive, and IoT – the four future growth drivers of semiconductor industry, plus the additional boost from artificial intelligence (AI) and 5G – will spur exponential demand for multi-function and high-performance chips. Today, a 3D IC semiconductor structure is beginning to integrate multiple chips to extend functionality and performance, making heterogeneous integration an irreversible trend. As the number of chips integrated in a single package increases, the structural complexity also rises. Not only will this make identifying chip defects harder, but the compatibility and interconnection between components will also introduce uncertainties that can undermine the reliability of the final ICs. Add to these challenges the need for tight cost control and a faster time to market, and it’s clear that semiconductor testing requires disruptive, innovative change. Traditional final-product testing focusing on finished components is now giving way to wafer- and system-level testing.In addition, the traditional notion of design for testing, an approach that enhances testing controllability and observability, is now coupled with the imperative to test for design, which emphasizes drawing analytics insights from collected test data to help reduce design errors and shorten development cycles. Going forward, the relationship among design, manufacturing, packaging, and testing will no longer be un-directional. Instead, it will be a cycle of continuous improvement.This paradigm shift in semiconductor testing, however, will also create a need for new industry standards and regulations, elevate visibility and security levels for shared data, require the optimization of testing time and costs, and lead to a shortage of testing professionals. Solving all these issues will require a joint effort by the industry and academia. "With leading technologies and $4.7 billion in market value, Taiwan still holds the top spot in global semiconductor testing market," said Terry Tsao, President of SEMI Taiwan. "When testing extends beyond the manufacturing process, it can play a critical role in ensuring quality throughout the entire life cycle from design and manufacturing to system integration while maintaining effective controls on development costs and schedules. Taiwan's semiconductor industry is in dire need of a common testing platform to enable the cross-disciplinary collaboration necessary for technical breakthroughs."The SEMI Taiwan Testing Committee was formed to meet that need, gathering testing experts and academics from MediaTek, Intel, NXP Semiconductors, TSMC, UMC, ASE Technology, SPIL, KYEC, Teradyne, Advantest, FormFactor, MJC, Synopsys, Cadence, Mentor, and National Tsing Hua University to collaborate in building a complete testing ecosystem. The committee addresses common technical challenges faced by the industry and cultivates next-generation testing professionals to enable Taiwan to maintain its global leadership in semiconductor testing.The SEMI Taiwan Testing Platform spans communities, expositions, programs, events, networking, business matching, advocacy, and market and technology insights. For more information about the SEMI Taiwan Testing platform, please contact Elaine Lee ([email protected]) or Ana Li ([email protected]). Emmy Yi is a marketing specialist at SEMI Taiwan.

SEMI met with Gerald Beyer, program manager at imec, to discuss the co-existence of various 3D interconnect technologies and their need for new materials and integration solutions. The two talked in the runup to his presentation at the Advanced Packaging Conference at SEMICON Europa 2018, 13-16, November 2018, in Munich, Germany. To register for the event, click here. SEMI: Can you confirm this trend towards heterogeneous integration and do you think it will be a long-term development trend?Beyer: We consider heterogeneous integration as a scaling booster for functional partitioning and as a fashion method to create systems, which would not be possible or economical on such as a single chip. As you can apply it to numerous systems, we expect it to stay for the long term.SEMI: What are the new critical challenges for the combination of different technologies into one package?Beyer: When you create a complex system, there is usually more than just one challenge. On one side, you need to be able to design such a system. If you disintegrate a large chip, you need to decide how to reconstruct it, i.e. which function goes into which strata. You would like to do that not manually but with a set of tools supporting the designer. Only recently EDA (Electronic Design Automation) and design houses have started to support this idea.On the technology side, interconnections between some strata of such a reconstructed chip will require small pitch interconnects of the order of 1µm pitch and less. Today, wafer-to-wafer bonding technologies have sufficient overlay margins for 1µm pitch. Wafer-to-wafer bonding technologies, however, have a number of constraints such as equal die size and the necessity to realize chip stacking rather in a fab environment than in a traditional packaging house. Die-to-wafer assembly technologies still need to bridge the gap to deep sub 10µm pitch in terms of alignment and cleanliness.SEMI: What kind of new materials or integration solutions do you expect to be developed? Are you working on it already?Beyer: As explained above, die partitioning requires sub 1µm pitch interconnects. We are investigating fine pitch wafer-to-wafer and die-to-wafer (direct) bonding. For the latter, not only new alignment capabilities but also die cleaning and thin die handling technologies need to be developed. To build a complete system with data processing, memories etc., novel integration schemes such as Flip Chip – Fan Out Wafer Level Packaging with high density 2D and 3D interconnect capabilities are being investigated. These new systems differentiate from current ones by high density Through Package Vias (TPV), Si bridges and sub 2µm line/spacing RDL. The new integration approaches push the materials such Temporary Bond Materials (TBM), Wafer Level UnderFill’s (WLUF), photo patternable polymers for fine Line/Spacings to name a few, to the limits. Hence, development of new materials is a key aspect.SEMI: What trends and developments do you expect in the near future and why would you recommend attending the Advanced Packaging Conference?Beyer: The development and commercialization of products using heterogeneous integration is a big effort drawing on resources from EDA vendors, materials and packaging tool suppliers, OSATs, foundries, memory suppliers and IEDMs and academia alike. The agenda of the Advanced Packaging Conference at SEMICON Europa reflects this diversity and I am looking forward to interesting discussions with all participants. Gerald Beyer has been working in the field of 3D Technologies since 2012 as the technology program manager of the 3D System Integration Program of imec. Prior to this role, he was the interconnect program manager and group leader of BEOL integration. He received a PhD in materials science from Imperial College, London and a MSc from Thames Polytechnic, London.Serena Brischetto is a marketing and communications manager at SEMI Europe.

The march to greater precision, efficiency and safety – the lifeblood of high-technology manufacturing facilities – has taken on a new urgency as emerging applications such artificial intelligence (AI), the Internet of Things (IoT) and Industry 4.0 give new meaning to smart factories. Facing fiercer competition and ever more sophisticated fabrication processes, semiconductor fabs are under intense pressure to keep pace with new technologies as they work to upgrade. Nowhere are the stakes higher than in Taiwan, where high-tech manufacturing contributes mightily to the region’s GDP growth. To help Taiwan fabs confront the challenges and opportunities of designing smarter factories, SEMI and its High-Tech Facility Committee hosted the High-Tech Facility Workshop in June. SEMICON Taiwan 2018 High-Tech Facility Pavilion exhibitors gathered to explore how they can build smarter factories by deploying smart surveillance and disaster prevention technologies along with smart communications systems that better use manufacturing data to drive new safety and product quality efficiencies.During the workshop, SEMI High-Tech Facility Committee representatives shared strides it has made upgrading overseas facilities and developing standards to help establish smart factories in Taiwan.SEMICON Taiwan – 5-7 September at Taipei’s Nangang Exhibition Center – is also an important event for advancing smart manufacturing in Taiwan. Nearly 30 leading global manufacturers will exhibit at the SEMICON Taiwan High-Tech Facility Pavilion. The venue covers operational aspects of semiconductor manufacturing vital to becoming smarter including energy savings, nano-contamination control, facility information modeling, precision instrumentation and control, fire protection, mechatronics, and automation control. The pavilion will also feature a series of theme events offering a comprehensive overview of topics including the latest practices for integrating smart facility capabilities from the perspective of an advanced fab designer.At the TechXPOT stage, High-Tech Facility Pavilion exhibitors will also demonstrate the latest technology breakthroughs and cutting-edge smart factor solutions.The September 6th High-Tech Facility International Forum at SEMICON Taiwan will again gather factory experts and thought leaders from industry and academia to examine “Effective Ways to Make a Facility Smart.“ Experts from industry heavyweights in the fields of wafer foundry, LCD, memory and semiconductor packaging including TSMC, UMC, Innolux, ASE, Micron Taiwan, Winbond and VIS will offer insights into key areas of high-tech facilities including facility electricity, machinery, water management, vaporization and automation systems. On the same day as the forum, the High-Tech Facility Get-Together and High-Tech Facility VIP Dinner will bring together industry elites, academic professionals, and government officials to explore partnership opportunities. SEMI Taiwan and the High-Tech Facility Committee share HTF market trends information, technology updates and standards with SEMI members and exhibitors. Founded in 2013, the High-Tech Facility Committee now has 85 corporate members. Dedicated to accelerating industry collaboration through the integration of Taiwan industrial, government and academic resources, the committee each year holds several group meetings focusing on topics including energy savings, earthquake and fire protection, nano-contamination control, and precision instrumentation and control to advance critical technologies and facilitate standardization. The committee also aims to help the industry become more competitive faster by promoting technology standards that boost productivity and reduce production costs.Please visit www.semi.org and www.semicontaiwan.org for more information about SEMI’s high-tech facility initiatives.Iris Tsou is a marketing specialist at SEMI Taiwan.