Qualcomm

Lu Dai, Vice President of Technical Standards at Qualcomm, presented “Converging Chip Design and Manufacturing in the Era of High Integration” at SEMICON West in October 2025, offering an insightful look at how design and manufacturing are collaborating effectively.I had an opportunity to talk at length with Dai and asked him to define collaboration. His thoughtful answers, perspective on industry trends and what it will take for a seamless automated flow between design and manufacturing made for a great discussion.In addition to his role at Qualcomm, Dai, who lives in San Diego, is Chairman of Accellera Systems Initiative, Chairman of RISC-V International and Director of Silicon Integration Initiative (Si2).Smith: Qualcomm is a fabless company. How do you define what collaboration is between design and manufacturing? Dai: When we talk about design and manufacturing collaboration, we need to consider how a design is optimized for a certain manufacturing process. For example, will an advanced manufacturing capability help designers simplify designs or allow them to bypass traditional actions?I compare it to the way software was optimized to hardware because of hardware limitations. We had to make sure the C code was compact and that the variable types we specified wouldn’t waste memory. We also had to write the code in a certain sequence to speed up the execution of the code. As hardware capability grows, we can write dirty code and it isn’t as critical. We understand the manufacturing process capability. That allows us to be more flexible about where to focus the chip design effort based on needs for power, performance, area, and schedule. We want to make sure we know the chip size and how big the silicon space is for certain features. For example, low power is often a key feature of today's designs. As manufacturing process nodes improve, power goes down and area shrinks. We can therefore focus more on optimizing performance.This is the kind of collaboration we use with foundries. Libraries need to be optimized for the design and tweaked for yield. This collaboration is critical for foundries pushing leading-edge nodes in the design house—they have to work closely with the design team.Smith: And how about collaboration with packaging suppliers? Dai: I'm not a packaging expert. Traditionally, packaging is one of the important steps and even more so because of the push toward the use of chiplets. Packaging becomes really important when dealing with multi-chiplet types of design. Traditionally, IP vendors sell a license to use the register transfer level (RTL) code, which is subject to IP theft. With a chiplet approach, they sell a netlist, which often becomes a hard coded chip as a bundled service instead of a single IP. The subsystem sales approach makes more money, creating another opportunity or a new landscape. SoC companies may get into the IP business and conversely, IP companies are getting into the SoC business by selling the bundled subsystem. Smith: The margins are getting blurred. It sounds like there is collaboration and it’s between designers, but also the foundries, process and the packaging.Dai: And partially between EDA tools because both the design side and the manufacturing side are speaking two different languages. EDA is somewhere in between, helping the translation.Smith: What are the trends and challenges that make it hard or even prevent a fully integrated flow?Dai: The extremely high costs of doing the implementation for an advanced node, especially for the first tape out. If we are the first to use the newest node, we know there is a tremendous benefit in the long run. But we are also the pioneers that have to work out the tough challenges. Few companies have the technical capability and deep financial resources to be the pioneers for a new process node. We’re starting to see high-flying semiconductor companies use leading-edge nodes. On the design side, they are challenged and trying to run faster by adopting a newer node. Cost is probably the biggest challenge for this collaboration. If their margins get challenged or they need to be a little bit more careful, they adapt by becoming fast followers.Another challenge comes from more specialized designs. There has been a long period where general-purpose chips are used for many different applications. But, we are now seeing designers increasingly focus on more specialized chips with custom designs.Custom IP and ASICs are becoming trendy. Designers are trying to figure out how to make a general baseline and then differentiate on certain IP and the best possible manufacturing process for the application. Doing a custom chip on an advanced node is quite expensive. We may be challenged if we don’t have sufficient data to clean up a process because every chip and process combination is unique. Lessons learned from this chip may or may not apply to everyone, while a general-purpose design tends to be a good baseline for lessons learned.Smith: How do you envision an integrated automated flow between design and manufacturing? Dai: In today's environment, we would like an RTL design to be fully portable to any kind of manufacturing process or foundry. Based on our architectural and business, we could then pick and choose the fab and the process. How do we port a design into a new process? That's difficult because we need to consider special constraints required by the new process that didn’t apply to the previous process. There's also the reverse case for porting a new design into an old process.Let’s say we have a chip designed for a 3-nanometer process and we want to port it back to a 28-nanometer process. Why would we want to do this? Imagine a COVID type of situation—a supply chain constraint and/or a geopolitical flare up with no access to the advanced fab, but an older local fab is still available. In this case, we need the chip for the feature it provides. Perhaps a car needs that chip and it was designed to be produced in a three-nanometer process but is suddenly unavailable. A 28-nanometer chip that runs at half of the speed might do the job for a few years. Unfortunately, this is somewhat wishful thinking because of the challenge of the flow. We didn’t think about it but we have to do it now and need to consider whether we have sufficient time to work out the challenges.Smith: How do you make that decision for making chiplets? Dai: Porting to another process is not a small job. It's labor intensive going from a same design in one process to another process.The project lead presents a process porting non-recurring engineering (NRE) cost budget to management. The questions span resources and time needed that boil down to how much money will need to be invested to achieve the porting. It should be simple. It’s not. It’s a lot of work.For many companies, the strategy is to offload the porting to a low-cost geographical team with a cheaper NRE that matches management expectations for the costs of process porting. History often shows that the company is not reducing that much time and manpower by offloading the porting. Smith: What about the EDA tool side? Is there typically a team from the EDA vendor? Dai: For advanced nodes, we involve the EDA and in-house EDA experts when certain parts of our design don't work out as expected.Back-end tools need experts involved in the debugging. And if we don't have an in-house expert, we need our EDA vendors to send engineers to work on the project.Smith: I have a generic question about AI. We talked about reporting. Where would it fit in collaboration?Dai: Sooner or later, we're going to be asked for a proper supply chain tracking or hardware bill of materials (BOM). Conceptually easy, but difficult in practice because it goes from logic design to physical design all the way to manufacturing. How do we carry that type of information through each step with EDA tool providers and manufacturing equipment providers? Their credentials need to be registered and they can’t alter any of the existing flow credentials.Supply chain tracking can ensure that if there's any kind of natural disaster or geopolitical issues, the hardware BOM is properly categorized, and the chip can be made. Security is another reason for supply chain tracking. Collaboration between design and manufacturing is important because once a netlist is sent to the foundry, our job is to make sure it is done correctly. We wait for our silicon to come back. Then we do testing. But during manufacturing, the chip comes back and it doesn't work. How do we know if somebody tampered with it? Supply chain tracking could help.Smith: How can you know that someone didn’t tamper with a chip design after it was handed off to manufacturing? This could cause big issues for end markets such as medical, automotive, defense and aerospace applications.Dai: The solution is EDA heavy because EDA tooling can help on the traceability at every step. It’s all automated through some kind of tool. If we need to have a proper format, we need to have proper encryption. And we know when we use this tool to run it, we check to show we are using the real tool not a hacked version that doesn't have the security credentials.Smith: Will this drive supply chain tracking or drive new standards?Dai: I hope so. Once upon a time, there was an initiative by the Department of Defense to track the supply chain. It was a mandate and no one liked it. It’s much better for the industry to proactively come up with a standard for a global economy.A mandate tends to come from one government. It may be a good mandate if we do business only within one country or within a small region. What if we have to do business with another government that may not like our mandate? Say a certain part of our design stage is done in a different country and we need this level of detail. Who's doing the work and what's the tool version? Per local government rule they may not be willing to give the information to us. This might be sufficient. We don't know the details of the risk, but we know there is a risk. We could simply add to our tracking that a portion of design is done in a foreign country with foreign EDA. It's important to have an industry standard and an international standard so that we can procure our tools and the services around the world instead of being limited.Smith: How can we encourage companies and people to want to cooperate and sign on to a project like this?Dai: With lessons learned, we can go deeper. Maybe the first level is a meeting in the U.S. About Lu DaiLu Dai is Vice President of Technical Standards at Qualcomm Technologies, Inc., spearheading semiconductor standards efforts and relationships with industry organizations. Lu was previously Senior Director of Engineering and led Qualcomm’s SoC design verification team and front-end methodologies and initiatives. He was also the Design Verification Lead responsible for multiple generations of premium tier platforms at Qualcomm, including the Snapdragon 8 series and products that power the Mars Perseverance rover and Ingenuity helicopter. Prior to Qualcomm, Lu was the Design Verification Lead for Cisco’s Gigabit Switching Business Unit where he worked on multiple generations of Cat4k ASICs. Lu is the current Chair of Accellera, Chairman of the RISC-V International Board of Directors and serves on the Board of Directors at Si2. Lu holds a Master of Science degree in Electrical Engineering from Cornell, and a Bachelor of Science in Electrical Engineering and Computer Science from UC Berkeley.Robert (Bob) Smith is an independent consultant who has been involved directly in multiple roles in the EDA industry over the past 38 years. His career experience spans analog engineering, marketing, sales, business and strategy development and others including numerous c-suite roles. He holds a Master of Science degree in Electrical Engineering from Stanford University.

Accellera Systems Initiative is a standards organization well-regarded by the EDA ecosystem that’s also served by the ESD Alliance, a SEMI Technology Community. Lu Dai, Senior Director of Technical Standards at Qualcomm, has chaired the Accellera Board of Directors since 2017.

Jay Vleeschhouwer, managing director of Griffin Securities, has followed the EDA industry as a leading financial analyst for 25 years and is a popular speaker at the annual Design Automation Conference. Vleeschhouwer discusses his DAC presentation The State of EDA: A View from Wall Street.

Guido D’hert, High Tech and Semiconductor Industry Europe Lead at Accenture, spoke about challenges semiconductor companies face in meeting sustainability goals and how to apply analytics, new green technologies and circular design, sharing during his presentation at ISS Europe in Brussels, Belgium.

Alameda, Calif.-based Verific Design Automation, a member of the ESD Alliance, made its name in the electronic system design and semiconductor industry supporting companies ranging from startups to billion-dollar industry leaders such as Synopsys, Cadence, Siemens EDA, Xilinx, Microchip, NVidia, Infineon, Qualcomm, Renesas and Samsung. Its software is used as the front end to design automation tools such as synthesis, simulation, debug, and formal verification. I spoke with Verific president and COO Michiel Ligthart about homegrown and open-source EDA tools and other recent trends in chip design. Smith: What trends are you seeing in chip design? Ligthart: Semiconductor companies are starting to build a portfolio of intellectual property, including homegrown electronic design automation (EDA) tools, that they want to keep secure and differentiated from their competitors. The increased interest in internally developed and supported EDA tools is a trend we started to see about two years ago. It’s not simulation, synthesis or place and route (P R). Instead, it’s pieces of a chip design flow optimized for a company’s specific needs. In the past, a semiconductor company would either standardize on one EDA company’s chip design flow or mix and match best-in-class tools from different vendors. The common denominator was that they used off-the-shelf products. If they had a specific requirement, they went to the EDA provider for assistance. In today’s competitive landscape, semiconductor companies are figuring out ways to diversify themselves and their design flow became a way to do so. They may not build their own P R tool, but they will look at building their own power domain approach, for example. Is this a widespread trend? It could be. We hear about it within end-user applications ranging from 5G and AI to data center processors and there are probably others we don’t hear about. Power optimization is an example of the kind of specific internal need being addressed. Smith: What are your thoughts about open-source EDA tools? Ligthart: Our industry supports open source already with language reference manuals (LRMs) for VHDL, SystemVerilog, Unified Power Format (UPF) and the RISC-V Instruction Set. The LRMs and the instruction set are free. Moving to the development of actual tools becomes a question of who will implement, support and maintain the tools. Implementation is expensive. The Big Three (Cadence, Siemens EDA and Synopsys) invest about 35 to 40% of top-line revenue into R D. For smaller EDA companies, this number is even higher. The industry may come up with a business model that will have open-source components as well as a way to fairly reimburse companies that make these tools freely available. I have not seen it yet. Smith: Business Insider reports that Verilog HDL is among the top 10 tech skills that companies are desperate for their employees to learn right. Does Verific get asked about Verilog training? Ligthart: No. Our customers are experienced users. Nonetheless, it was great to read that article and it suggests the semiconductor industry is healthy, growing and hiring talented engineers. Smith: If an entrepreneur asked you for advice about starting an EDA or IP company, what advice would you provide? Ligthart: I would tell the entrepreneur to focus on the problem the startup is solving. Stick to the company’s core competency and try not to build in-house what can be purchased from a reputable supplier. In the end, it will save time and jump-start the development effort, and the engineering budget can be allocated to the startup’s core competency. The external supplier presumably has years of product validation, which brings a major QA gain. About Michiel Ligthart Michiel Ligthart, president and COO of Verific Design Automation, has an extensive background in engineering, product marketing and general management. Prior to joining Verific, Ligthart was vice president and general manager of West Coast operations for Theseus Logic, a startup in asynchronous logic. Before that, he spent eight years with Exemplar Logic in engineering and marketing roles. Ligthart started his career with Philips Research Labs in California and was a visiting scholar at the Center for Integrated Systems at Stanford University. He has a Master of Science degree in Electrical Engineering from Delft University of Technology, the Netherlands. Robert (Bob) Smith is executive director of the ESD Alliance, a SEMI Technology Community.

Today, AI algorithms are primarily run at large data centers-- in the cloud. For this intelligence to be used at the edge, data must be transmitted to the cloud, analyzed there, and the results transmitted back to the field of operation, such as a mobile phone, medical implant or autonomous vehicle.

Tracking and quickly diagnosing COVID-19 infections, working from home and telemedicine recently came into sharp focus as technology executives and other subject matter experts from microelectronics heavyweights recently gathered for the first-ever virtual SEMI CTO Forum to explore how the microelectronics industry and their own companies can leverage future technology trends to drive growth. Themed Intelligent Medtech and Wearable Technologies, the forum drew CTOs from ARM, Babblelabs, Brewer Science, Dell, Dow/Dupont, E-Ink, Hewlett Packard Enterprise, Intel, Lam Research, KLA, Microchip, ON Semiconductor, Qualcomm, Tokyo Electron, Ulvac, Veeco and Xilinx. The event is designed as a strategic driver of pre-competitive innovation. Following are key takeaways from the forum. Microfluidics Promises to Speed COVID-19 Diagnosis More than 240 companies worldwide are developing microfluidics solutions to improve diagnosis and treatment of COVID-19 and other conditions, said forum speaker Dr. Kurt Petersen, a member of Band of Angels, Silicon Valley's oldest angel investment group, with an illustrious background1 in technology. And their innovations are bearing fruit. Cepheid, a company founded by Dr. Petersen, has developed a disposable microfluidic cartridge, Xpert Xpress SARS-CoV-2, used by doctors to swab the inside of a patient’s mouth. Highlighting the vital role of MEMS in medical electronics, the tiny powerful devices are behind a test that can detect COVID-19 infection in under 40 minutes. Dr. Petersen also cited a few examples of implantables and injectables under development, including: In vivo chemical sensing: Profusa developed a continuous glucose monitoring sensor via an optical patch. Glaucoma pressure monitors: Injectsense built a silicon chip the size of a grain of rice that is embedded in the eye to measure eye pressure. Retinal implants: Second Sight implanted a 60-electrode array chip that projects images onto the retina to improve vision. Microelectronics Takes Aim at Battling COVID-19 The event’s CTO roundtable, a platform for discussing societal and technology issues, revealed microelectronics technology will likely give rise to solutions for combatting pandemics and new business opportunities both in the short and long run. Areas of the greatest interest included: Tracking and Security: Infection tracking accuracy is key to limiting the spread of viruses yet comes with inherent privacy and security challenges. The consensus view of the executives was that developing trusted hardware capabilities is critical for adoption of accurate infection-tracking technologies. Remote Operation: Executives expect working from home or the use of telehealth to continue building momentum long after pandemic. To give staying power to the remote communications at the heart of these trends, microelectronics ecosystems will need to boost compute performance, both at the edge and in the cloud, while increasing bandwidth to enable applications such as augmented reality/virtual reality (AR/VR), artificial intelligence (AI), machine learning and advanced data analytics. Edge intelligence: The challenge of remote communications spans both people and the Internet of Things (IoT). Questions persist about how hundreds of billions of sensors will connect to the cloud and how much power they will consume. The need to push computing to where data is generated – at the edge – is rising and the necessary underlying technologies will only come by combining various forms of distributed computing and analytics. The microelectronics industry’s ability to seize these opportunities will only be possible with huge strides in innovation, raising concerns among the CTOs about the financial viability of cutting-edge devices because of increasing device complexity and R D costs. Technology partnerships and collaborations – an area where SEMI is contributing and will continue to expand its efforts as it works with the CTO community – will be critical to containing R D costs. SEMI will help the executives identify and mobilize the resources key to future innovation. Improving Home, Work Productivity and Experiences Key to AR Adoption Smart wearables also offer great promise. In just over a decade, AR and VR have grown from science fiction to practical uses such as AR applications for smart contact lenses, said Dr. Mike Wiemer, Co-Founder and CTO of Mojo Vision2. Dr. Wiemer said that while many AR applications remain under development, the technology will only see widespread adoption once it starts to improve productivity and efficiency at home and work and the quality of other experiences. The smart augmented reality contact lens developed by Mojo Vision is a step in that direction. The product’s built-in display gives users timely information about everything they see while remaining invisible by packing 70,000 pixels into a space smaller than a half a millimeter across, making it the smallest and densest dynamic display ever made. The contact lens is powered by an ARM-based processor, with later versions adding an image sensor, eye-tracking sensors and a communications chip. SEMI thanks EMD Performance Materials and Telit for sponsoring the CTO Forum. For more information on the CTO Forum and SEMI’s Smart Data-AI initiative, please sign up on our webpage. 1 Dr. Kurt Petersen is a member of the National Academy of Engineering, an IEEE Medal of Honor winner, and a Life Fellow of the IEEE for his contributions to the commercialization of MEMS technology. 2 Dr. Wiemer also co-founded Solar Junction, where he led technical teams to two world records in solar cell efficiency (43.5% and 44%). He also has patents and papers in Semiconductor Devices Applications, Silicon Photonics, Materials Integration, Lasers, Solar Cells, Solar Systems, and Analog Circuits. Tom Salmon is Vice President of Collaborative Technology Platforms at SEMI. Pushkar P. Apte, Ph.D., is Strategic Technology Advisor for the Smart Data AI Initiative at SEMI.

Companies around the world are increasingly turning to mergers and acquisitions, research and development, and corporate venture capital (CVC) investment to sustain growth. For many years, global semiconductor companies including Intel, Qualcomm and Samsung have been active CVC investors. However, the economic fallout from the COVID-19 pandemic has forced many venture capital (VC) and CVC investors to rethink their investment strategies as they look to an uncertain future. To help provide SEMI members with the latest market trend information, SEMI Taiwan held the webinar Challenges and Opportunities in Corporate Venturing during the Global Pandemic Crisis on April 28th. Featured speaker James Mawson, founder and editor in chief of Global Corporate Venturing, provided an analysis of the pandemic’s impact on deal flow, capital movement, sentiment and strategies among CVCs. CVC takes larger role in past decadeCorporations have been increasingly active direct and indirect venture investors over the past decade. From 2011-2019, more than US$1.3 trillion of venture capital was invested globally, with corporations accounting for more than half that total, according to data from Pitchbook/GCV Analytics.Semiconductor companies that have been active in corporate venturing include Intel, Samsung, Nvidia, ARM, AMD, SK Hynix, Broadcom and Qualcomm. Pure-play semiconductor and chip companies tend to make few investments in their start-up counterparts because sector saturation of powerful incumbents leaves little opportunity for growth, James said. “While it is hard to find entrepreneurs wanting to be engaged in pure play S C, once they do, they can be very valuable and often be able to bring disruptive forces to the whole ecosystem,” James said.S C corporate investors focus on chip applicationsSemiconductor companies looking beyond pure-play S C start-ups for investment opportunities often target applications or developers that require the additional data, processing power, and memory their chips provide. “There is lots of interest by the big chip companies such as Intel, Qualcomm, and Samsung in developing some of those chip applications, getting them used more and creating a whole ecosystem,” James said.For example, Intel Capital, based on its data-centric theme, has focused on areas like autonomous vehicles, data centers and artificial intelligence (AI) because of the sheer amount of data and processing power they require. In another notable trend, non-traditional S C players such as Apple and Alibaba are leveraging investments in start-ups to develop their own chips for competitive advantage, James said.March deal flow down 20% With COVID-19 slowing the global economy, James expects semiconductor and chip companies to scale back direct investments this year due to rising pressure on their balance sheets. Deal flow in March was down roughly 20% from February.James is hopeful corporates will focus on investing in innovation over the long term rather than target share buybacks to boost near-term earnings. James pointed out that investors can uncover opportunities by identifying future problems to be solved in areas such as quantum computing, biotech, energy, healthcare, communications and ICT. Still, in the near term, where there is a crisis, there is opportunity. While the pandemic hit some sectors hard, it benefits start-ups in industries including gaming, education and telemedicine. This time is different?James said corporates need to rethink the investment model they want to follow. One option is the approach taken by General Electric, which divested its investment team and sold all its portfolio companies last year. Another is to focus on the long term. For example, Intel Capital has been dedicated to investments in innovation for nearly 30 years and continues to invest during downturns.Compared with the internet bubble and global financial crisis, today there are more experienced and mature CVCs that better know how to negotiate a crisis. James also pointed out investors are interested in backing CVCs with sector investing experience. There are now more than 600 CVCs with a 10-year-plus track record.James expects a variety of funding models to emerge over the next decade as pressure on corporate balance sheets encourages corporate investors to consider models that allow third-party capital to effectively leverage their CVC units. Corporate investors are also open to other ways to efficiently deliver financial returns.For more information about the SEMI Taiwan Corporate Growth and Innovation Community, please contact Irene Lin at [email protected]. For GCV’s latest news and event, visit its website.Jo-Ann Su is senior director of the Corporate Growth and Innovation Community at SEMI Taiwan.

John Smee, VP Engineering, Qualcomm Technologies Inc., will share insights on 5G – which is evolving to enable more reliable connectivity with higher performance in and beyond the era of Internet of Things (IoT) – in his keynote at MEMS Sensors Executive Congress, October 22-24, 2019, in Coronado, Calif.SEMI’s Maria Vetrano caught up with John to give MSEC attendees a preview of his talk.SEMI: Why should MEMS and sensors suppliers stand up and take note of the evolution in 5G, particularly 5G NR?Smee: 5G is the unifying fabric that will connect virtually everything around us. 5G New Radio (NR) is the global standard for a unified, more capable 5G wireless air interface. It will deliver significantly faster and more responsive mobile broadband experiences to users. It will also extend mobile technology to connect and redefine a multitude of new industries, including the IoT.As tens of millions of MEMS and sensors are the core components providing intelligence and interactivity to IoT devices, suppliers need to understand the capabilities and efficiencies that 5G will bring to connect the wide range of MEMS and sensors.We should also recognize that we are at the beginning of the 5G era, and 5G technologies will continue to evolve and expand in the coming years to connect new types of devices in increasingly efficient ways.SEMI: What’s special about the upcoming release of 5G NR, 3GPP Rel-16?Smee: While the first 5G NR release, 3GPP Rel-15, focused primarily on enhanced mobile broadband (eMBB), it also established a solid technology foundation for continued evolution in Rel-16 and beyond.With Rel-16, we are seeing 5G NR’s expansion beyond eMBB to address new tiers of IoT services such as industrial IoT (e.g., automation) with ultra-reliable, low-latency communication (URLLC) and cellular vehicle-to-everything (C-V2X) for more advanced use cases, such as autonomous driving. MEMS and sensors are critically important to both types of use cases as they collect the raw information of the physical world, and 5G is the connectivity of these sensors to the network. This makes the technologies inextricably linked.MEMS and sensors are equally integral to the development of more efficient low-complexity massive IoT devices (MIoT) with in-band 5G NR deployments of enhanced machine-type communication (eMTC)/narrowband Internet of Things (NB-IoT) and the use of the new 5G Core Network. In practical terms, devices that enable smart city use cases – such as smart utility monitoring, connected parking meters, and smart street lighting solutions that support 3GPP Rel-16 – are MIoT devices that will delight city administrators and dwellers with their improved coverage and efficiency. SEMI: In addition to low-complexity MIoT devices, what other markets will benefit most from the evolution in 5G NR?Smee: We continue to enhance 5G NR to support the high-performance IoT, including URLLC.URLLC is one of the many new 5G capabilities that wasn’t possible with the previous generation of cellular technologies, such as LTE. Because it delivers services at very high reliability (i.e., 99.9999%) and ultra-low latency (i.e., sub-1ms), URLLC literally opens up new use cases that that only wired communication could serve in the past. Industrial IoT applications that require a mix of high reliability and low latency, such as robotic arm command and control, are foremost among these new URLLC use cases.Another example of IoT taking advantage of URLLC is smart grid, where faults in the electricity distribution network require immediate protection and control to ensure safety and avoid equipment damage.SEMI: How is Qualcomm building on the eMTC/NB-IoT for low-power wide-area IoT (LPWA) – and how will this influence IoT connectivity?Smee: We continue to evolve eMTC/NB-IoT beyond its initial 3GPP release in Rel-13, making these foundational LPWA IoT technologies more capable and efficient as they become the basis for 5G massive IoT.The most significant updates to eMTC/NB-IoT include multi-cast and positioning support in Rel-14 and improved spectral/power efficiencies in Rel-15. Multi-cast can help service providers to deliver firmware updates over the air with greater efficiency, which speeds deployment of new features. Positioning can create new values, which can inform end users where their assets/packages are located, potentially safeguarding assets in transit. Improving spectral/power efficiencies offers more power-efficient transmissions, which takes less toll on battery-operated devices.With Rel-16, we have further optimized eMTC/NB-IoT, which is supported by the new 5G Core Network and is also deployable in 5G spectrum in-band with other 5G NR services.The evolutionary path ahead for eMTC/NB-IoT enables support for an even wider range of 5G massive IoT devices. New enhancements in the pipeline, such as grant-free uplink and multi-hop mesh, will boost efficiency and coverage area that much more.SEMI: Where do mobile broadband devices such as ultra-high-definition (UHD) security cameras fall within Qualcomm’s realization of 5G-NR?Smee: Mobile broadband is at the core of 5G NR. We see it both powering the new generation of 5G smartphones and expanding beyond traditional devices (including always-connected PCs and tablets) to address the needs of high-performance IoT devices such as UHD security cameras.It’s actually an important part of our vision for 5G to have an industrial network that requires all types of 5G connectivity for devices spanning eMBB (e.g., cameras, laptops), URLLC (e.g., machines) and MIoT (e.g., sensors).SEMI: What can the MEMS and sensors industry do to prepare for the 5G wave?Smee: Because 5G can evolve to deliver even better performance and efficiency for connecting sensors in the 5G world, we will see even more widespread adoption of MEMS and sensors into larger numbers of connected applications. MEMS and sensors suppliers, therefore, need to get ready for the 5G wave by preparing to support 5G connectivity in their devices, which will ultimately help to realize the 5G vision of connecting virtually everything in the world around us.John Smee, Ph.D., is vice president of engineering at Qualcomm Technologies Inc., where he is the 5G R D lead responsible for overseeing all 5G research projects, including end-end systems design and advanced RF/HW/SW prototype implementations in Qualcomm’s wireless research and development group. He joined Qualcomm in 2000, holds over 100 U.S. Patents, and has been involved in the design, innovation, and productization of wireless communications systems such as 5G NR, 4G LTE, 3G CDMA, and IEEE 802.11. He also leads Qualcomm’s companywide academic collaboration program across technologies including wireless, semiconductor, multimedia, security and machine learning. John was chosen to participate in the National Academy of Engineering Frontiers of Engineering program and received his Ph.D. in electrical engineering from Princeton University and also holds an M.A. from Princeton and an M.Sc. and B.Sc. from Queen’s University.Smee will present Evolving 5G NR to Connect the Internet of Things on Wednesday, October 23, 2019, at MEMS Sensors Executive Congress, Coronado Island Marriott Resort Spa in Coronado, Calif.Register today to learn how 5G NR will transform the user experience with MEMS- and sensors-enabled devices in IoT, automation and beyond.Interested in engaging with the MEMS and sensors supply chain? MEMS Sensors Industry Group is a SEMI technology community that enables the MEMS and sensors industry to innovate, address common challenges and accelerate business results.Maria Vetrano is a public relations consultant for SEMI.

For medtech applications to flourish, sensors need a supporting infrastructure that translates the data they harvest into actionable insights, says Qualcomm Life director of business development Gene Dantsker, who will speak about the future of digital healthcare in the Medtech program at SEMICON West. “Rarely can one device give a complete diagnosis,” he notes. “What’s missing is the integration of all the sensor data into prescriptive information.” The maturing medtech sector has developed to the point where sensors can now capture massive amounts of data, conveniently collected from people via mobile devices. The sector now has higher compute capacity to process the data, and improving software can produce actionable insight from the information. The next challenge is to seamlessly integrate these components into legacy medical systems without disrupting existing workflow. “Doctors and nurses don’t have time for disruptive technology – a new system has to be invisible and frictionless to use, with one or fewer buttons, no training and truly automatic Bluetooth-like pairing,” he says. “So device makers need to pack all system intelligence into the circuits and software.”Getting actionable healthcare information from sensors requires integration into the existing medical infrastructure. Source: Qualcomm LifeOne interesting example is United Healthcare’s use of the Qualcomm Life infrastructure to collect data from the fitness trackers of 350,000 patients. The insurance company then pays users $4 a day, or ~$1500 a year, for standing, walking six times a day and other behaviors that clinical evidence shows will both improve patient health and reduce healthcare costs. “It’s a perfect storm of motivations for all stakeholders,” he says.Next hot MEMS topics: Piezoelectric devices, environmental sensors, near-zero power standbyWith sensor technology continuing to evolve, look for coming innovations in MEMS in piezoelectric devices, environmental sensors and near zero-power standby devices, says Alissa Fitzgerald, Founder and Managing Member of A.M. Fitzgerald and Associates, who will provide an update on emerging sensor technologies in the MEMS program at SEMICON West.Piezoelectric devices can potentially be more stable and perhaps even easier to ramp to volume than capacitive ones, with AlN devices for microphones and ultrasonic sensors finding quick success. Now the maturing infrastructure for lead zirconate titantate (PZT) is enabling the scaling of production of higher performing piezo material with thin film deposition equipment from suppliers like Ulvac Technologies and Solmates and in foundry processes at Silex and STMicroelectronics, she notes.In academic research, where most new MEMS emerge, market interest is driving development of environmental sensors and zero-power standby devices. With demand for environmental monitoring growing, much work is focusing on technologies that improve the sensitivity, selectivity and time of response of gas and particulate sensors. Research and funding is also focusing on zero or near-zero power standby sensors, using open circuits that draw no power until a physical stimulus such as vibration or heat wakes them up.MEMS, however, likely won’t find as much of a market in autonomous vehicles as once thought. “While the automotive sensor market will need many optical sensors, MEMS players are competing with other optical and mechanical solutions,” says Fitzgerald. “And here the usual MEMS advantage of small size may not matter much, and the devices will have to meet the challenging automotive requirements for extreme ruggedness.”Paula Doe, SEMI