Verific
Member Since
Apr 1, 2018
Member ID
275045
Website
Location
1516 Oak Street
Suite 115
Alameda
CA
94501
United States
Primary Industry
Semiconductor
Primary Product Category
Fab Infrastructure and Services
Primary Product Sub Category
Design Software (EDA)
Company Profile
Verific Design Automation builds SystemVerilog, VHDL, and UPF Parser Platforms which enable its customers to develop advanced EDA products quickly and at low cost.
Verific's Parser Platforms are distributed as C++ source code and compile on all 32 and 64 bit Unix, Linux, Mac, and Windows operating systems. Verific's Parser Platforms are in production and development use today at numerous companies worldwide, from EDA start-ups to established Fortune 500 semiconductor vendors.