Ann Wu is CEO of EDA startup Silimate, developer of a co-pilot (chat-based GenAI) for chip and IP designers to find and fix functional and power, performance and area (PPA) issues in their designs. Rick Carlson is Vice President of Sales at ESD Alliance member company Verific Design Automation, provider of front-end EDA platforms to a range of small and emerging EDA companies like Silimate and larger EDA vendors.
I recently talked with Ann and Rick who represent EDA’s new and old guard. I found them to be bullish about the emerging EDA space called AI EDA that uses GenAI and large language models as the foundational tools and the swelling numbers of well-funded startups entering this space.
Smith: Ann, you were an Apple hardware designer. What encouraged you to leap into entrepreneurship using AI as the foundational technology?
Wu: It was always my goal. Apple afforded me the opportunity to understand how one of the best companies producing some of the most cutting-edge chips in the world operates. It also gave me the opportunity to work with some of the most brilliant engineers and operators.
My plan was then to go back to Stanford to explore and start a compelling venture with another similarly motivated friend, Akash Levy. That was the genesis of Silimate.
The drive for leaping into entrepreneurship then ultimately stemmed from my frustrations with the existing chip design process. I sensed there was an opportunity to apply AI technology to solve some of these limitations of the existing approaches to chip design.
Smith: What made you think that AI would be applicable to the EDA challenges that designers face?
Wu: AI provides a compelling solution to some of the intractable problems that have existed in EDA. Traditional EDA solutions solve isolated problems through heuristic algorithms. There’s a high volume of gray area between the well-defined boxes of inputs and outputs that had previously been unsolvable.
Now with AI, there is finally a way to sift through and glean patterns, insights, and actions from these gray areas.
That’s the macro reason why there's so much excitement and appetite around the application of AI for EDA.
Smith: It sounds like productivity enhancement. What are some other key words or selling points to use to convince a designer of AI’s potential for EDA?
Wu: I would say "speedup" is one of those keywords. Ultimately, the designer is trying to meet or even shorten the time to tape out while hitting their design spec. That's driving all decisions, whether to throw more headcount at closing a certain block or to defeature something that's going to cause the team to miss the shuttle. It all comes down to whether a fully featured and functional design gets to tape out and gets to market ahead of competitors.
Productivity as a keyword is not compelling. It’s hard to translate how saving minutes or hours of an engineer's time connects back to the bottom line. The bottom-line decisions are driven by the project’s timeline as time to market is everything.
What’s needed is a way to sift out and resolve real design problems 100x faster, which ultimately results in real speed up on a project’s schedule. For example, processing large amounts of data with AI to find issues actively helps the designer converge their design to their target.
Finding and resolving issues in a design within minutes instead of days or weeks instead of months is the kind of impact that directors, VPs, and managers want for adopting new tools.
Smith: What is driving hardware designers into this EDA space?
Carlson: The thing that's most intriguing is large language models, neural networks and AI. It seems like an “aha” moment when startup founders believe they can do something that's dramatic for the first time.
When I look back over my photobook of moments in my time in the EDA industry, there's the wonderment. The things that can be brought to bear with iterative versions of new technology from companies like Ann's will offer multiple “aha” moments. This is game changing.
Smith: Are venture capitalists investing in EDA again?
Carlson: Yes. Some venture capitalists haven't invested in EDA for decades. These are smart people. They have plenty of good people that can do good due diligence.
The amount of money that's being invested is significant. It's not just a little bit of seed funding. One startup’s first round was $3 million. They're now raising $20 million in the next round. They're saying that their pre-money has to be $50-$60 million. They're just coming out and there's a huge amount of interest.
We're going to be looking back in a year and say we just couldn't believe how much money is pouring into this. It has a huge impact on the world stage.
This is an amazing time to be doing anything in and around the design of computer chips.
Smith: Y Combinator (YC) invested in Silimate.
Wu: Yes, that's right. It's an honor to be the first EDA company that YC had invested in. The semiconductor and EDA space had been under the radar until recently—it’s such a critical piece of our technical infrastructure.
The semiconductor industry hasn't been headline news in past years. Now every other day, the Wall Street Journal runs some semiconductor chip-related article. People are realizing this is a fundamental piece of our world's tech stack, and the software that drives this tech stack is equally important and there are investments to be made.
Learn more about Verific and Silimate during the 62nd Design Automation Conference (DAC).
Verific will exhibit in Booth #1316 at the Moscone Center in San Francisco from June 23-25.
Silimate’s Akash Levy, Founder and CTO, will participate in a panel titled “AI-Enabled EDA for Chip Design” at 10:30am on Tuesday, June 24, 2025.
Robert (Bob) Smith is executive director of the ESD Alliance, a SEMI Technology Community.
