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Yield Enhancement / Yield Methodologies 

Chairs: Ishtiaq Ahsan, IBM Research; Janay Camp, KLA; Gary Green, Green Technology Consulting; Dieter Rathei, D R Yield; Sagar Kekare, KLA; Reshmi Mitra, Samsung Austin Semiconductor; Larry Pulvirent, SkyWater Technology 

Session 1 - Yield Enhancement / Yield Methodologies

1.1   Simulated CWAC to Eliminate 1st Wafer Effect and Improve Process Capability 
Kunal Raghuwansi, John LeClair, Dmitry Zhernokletov, Samsung Austin Semiconductor 

1.2   Middle of Line (MOL) Process Investigation in Ring Oscillator Failure 
Victor Chan, M. Bergendahl, S. Choi, A. Gaul, J. Strane, A. Greene, J. Demarest, J. Li, L. Jiang, C. Le, S. Teehan, D Gao, IBM Research 

1.3   Characterization of Doped Oxide Films PSG/BPSG/FSG via DSIMS in Order to Eliminate Nonzero Kilometer Failures from Semiconductors Used in Automotive Industry
Thanas Budri, Jeffrey Klatt, Texas Instruments 

1.4   Qualifying Inline Xe Plasma FIB - Returning Milled Wafers Back to Production 
Franz Niedermeier, Rolf Kammerer, Wolfgang Kipferl, Stephan Henneck, Infineon; Haim Pearl, Applied Materials 

1.5   Middle of Line: Challenges and its Resolution for FinFET Technology 
Shiv Kumar Mishra, Erik Geiss, Aditya Kumar, Arkadiusz Malinowsk, Gao Wen Zhi, Wenhe Lin, Bangun Indajang, Dustin Slisher, GLOBALFOUNDRIES 

Session 10 - Yield Enhancement

10.1   In-situ Preclean Run Path Impact on Selective Cobalt Cap Deposition and Electromigration 
Matthew Shoudy, Hosadurga Shobha, Huai Huang, Son Nguyen, IBM Semiconductor Technology Research; Chao-Kun Hu, IBM T.J. Watson Research Center 

10.2   Machine Learning Assisted Prototyping 
Andres Torres, Ivan Kissiov, Richard Gardner, Ken Jantzen, Martin Niehoff, Mohamed Essam, Mentor, A Siemens Business; Stefan Schueler, Carsten Hartig, GLOBALFOUNDRIES 

10.3   A Systematic Study on BEOL Defectivity Control for Future AI Application 
James H.-C. Chen, Fee li Lie, Scott DeVries, Carol Boye, Sanjay Mehta, Thamarai S. Devarajan, Mary-Claire Silvestre, Wei-Tsu Tseng, and Massud A. Aminpur, IBM Research 

10.4   Uniformity and Yield Optimization for a Highly Diverse Product Mix
Raymond Van Roijen, Mark Lucksinger, Matthew Fields, Robert Baiocco, Min S. Oh, Derek Stoll, GLOBALFOUNDRIES 
 

Session 5 - Poster

5.30  A System for Wafer Pattern Matching & Classification at Scale
Peter Shaw, Nico Rode, TIBCO Software; Aditi Goswami, Andal Jayalakshmi, Nihal Mahajani, Ahmer Srivastava, Senthil Subramanian, Western Digital

5.33  Using GAN to Improve CNN Performance of Wafer Map Defect Type Classification
Yongsung Ji, Samsung Electronic; Jee-Hyong Lee, Sungkyunkwan University

5.34  Yield improvement by measuring: We need to know where the particles come from - use SEMI F70.1
Max van den Berg MSc, Festo SE & Co. KG

 

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