2nd Generation 3D V-CacheTM Enablement
ABSTRACT
This presentation will discuss hybrid bonding 3D stacked heterogeneously integrated product by AMD.
BIOGRAPHY
Arsalan Alam is a Member of Technical Staff (MTS), 3D Stacking Technology, in the AMD Packaging Group in Austin, Texas. He completed his PhD in Electrical and Computer Engineering with the Center for Heterogeneous Integration and Performance Scaling (CHIPS) group at the University of California, Los Angeles, in 2021. He received his Master’s degree in Microelectronics and VLSI from IIT Roorkee, India and his Bachelor’s degree in Electronics and Communication Engineering from the ZHCET, India. His research interest is in advanced packaging, including FOWLP, 2.5D, and 3D. He holds about 20 publications and 5 patents with multiple patents pending. He was the winner of the IEEE EPS Packaging Vision Award, 2020 and recipient of the Broadcom Foundation Fellowship, 2017-2018.