photonics

Every time a transistor switches, it generates heat. Pack enough transistors together and you hit a wall: the chip melts before it computes. This thermal ceiling is why Splunk notes that "as physical and economic limitations are reached, the pace predicted by Moore's Law is slowing."Light solves this problem. Photons carry information without generating heat. Semiconductor Engineering details how heat dissipation and bandwidth bottlenecks make optical solutions the only viable path forward.But photonics introduces a different problem. Silicon has an indirect bandgap, which means it cannot emit light efficiently enough to produce lasers. Building photonic systems requires III-V compound semiconductors like indium phosphide (InP) and gallium arsenide (GaAs). These materials come with manufacturing constraints: InP substrates remain limited to 150mm, and GaAs wafers top out at 150mm, while silicon runs at standard industrial diameters of 200mm or 300mm. You cannot build a complete photonic system on silicon alone, so heterogeneous integration becomes mandatory. The result is that chief technology officers (CTOs) now manage two incompatible material systems, doubling technical complexity and supply chain risk.How Different Regions Are RespondingUnited States Intel has shipped 8 million photonic chips with 32 million integrated lasers. But the move that matters most is NVIDIA adopting TSMC-Broadcom co-packaged optics in its 2025 GB300 chips. When the dominant AI hardware company makes an architectural choice, competitors either follow or lose relevance.EuropeEuropean companies are solving their scale problem through consolidation. The market grew from €124.6 billion (2022) to a projected €175 billion (2027). Between January and June 2025, EPIC recorded 125 transactions worldwide, with European companies leading 50 of them. ZEISS established a new strategic business unit with €200 million in annual revenue across 6 countries. The strategy is to build on existing strengths in materials science and precision manufacturing.ChinaChina is building a parallel system designed for self-sufficiency. CHIPX produces 6-inch lithium niobate wafers with 110 GHz bandwidth, built despite U.S. export controls. This aligns with national policy: Xi Jinping chaired a February 2023 Politburo session focused on "basic research for self-reliance in science and technology." Optics Valley now hosts 5,000+ high-tech companies, targeting self-sufficiency within 4 years.Asia-PacificJapan, Taiwan, and India are combining strengths rather than building everything domestically. Japan committed $25.7 billion to semiconductor development between 2022 and 2025, and TSMC opened its first overseas R D facility there. India offers up to 50% capital support for photonics fabs and contributes 20% of global chip designers.The Next DecadeMarket projections vary wildly because the category spans everything from mature LED lightbulbs to emerging quantum computing systems. Mordor Intelligence projects growth from $1.75 trillion in 2025 to $2.39 trillion by 2030, while MarketsandMarkets forecasts $1.09 trillion to $1.48 trillion. This uncertainty matters because executives must commit billions in capital to technologies with decade-long development cycles.2025-2026The near-term focus is power efficiency. Traditional pluggable optical modules create 22 decibels of signal loss, requiring 30W per port to compensate. Co-packaged optics cuts power consumption by 3.5x. Ayar Labs' TeraPHY will deliver 8 Tb/s using UCIe standard packaging. In automotive, entry-level LiDAR drops to $200.2027-2032Quantum photonics moves from laboratory to commercial deployment. The market grows from $850 million in 2025 to $3.78 billion by 2030, with PsiQuantum partnering with GlobalFoundries to develop million-qubit systems by 2027. Unlike superconducting qubits requiring near-absolute-zero cooling, photonic qubits function at room temperature.2032-2035+The quantum market reaches $17.4 billion by 2035. Architectures combining analog, digital, quantum, photonic, and neuromorphic computing will require new transducer technologies, which means CTOs can no longer specialize in a single computing paradigm.Energy demand accelerates all of this. Data center electricity consumption will reach 945 TWh by 2030, and photonics can reduce that by over 50% by 2035.What This Means for LeadershipEach executive role faces a distinct version of the same problem: making decisions now about technologies that won't mature for years.Chief Executive OfficersCEOs face timing decisions with no clear answer. Adopt co-packaged optics in 2025-2026 and risk immature technology. Wait until 2028 and watch competitors capture market share. Japan's $25.7 billion commitment means smaller firms now compete against sovereign capital.Chief Technology OfficersCTOs must hold technical depth across incompatible domains. Silicon photonics, III-V materials, and thin-film lithium niobate each require different knowledge bases and supply chains. Most engineers specialize in one; photonics CTOs need working knowledge of all three while balancing 15-year development cycles against 2-year product roadmaps.Chief Financial OfficersCFOs must model returns on infrastructure that doesn't exist yet. The 50% power reduction from photonics changes total cost of ownership calculations, but boards need convincing before savings materialize.Corporate Boards Boards face a knowledge gap that affects governance quality. Most members don't understand why quantum-neuromorphic-photonic convergence matters at the business level. Leadership transitions signal consolidation is underway: IPG Photonics replaced its CEO in June 2024, Lumentum in February 2025.The Leadership ProblemFinding people who can run photonics companies is difficult because the field barely existed a decade ago. The technical knowledge lives in research labs. The business experience lives in traditional semiconductors. The people who combine both are rare.The broader market reflects this scarcity: over 330 R D vacancies appeared in the first half of 2025 alone. When technical roles are that hard to fill, executive searches require a global reach that most firms lack. In our searches, we regularly build single leadership teams by recruiting across China, Romania, Russia, the U.S., Germany, France, the UK, and India.The companies that figure out leadership first will have an advantage that compounds over years.About the AuthorsJan-Bart Smits is a Managing Partner at Stanton Chase Amsterdam. He serves as Global Subsector Leader for the Semiconductor industry and holds an M.Sc. in Astrophysics from Leiden University. David Harap is a Managing Director at Stanton Chase Austin with over 25 years of executive search experience. A Cornell University graduate and Father Kelly Scholar, he lectures at the University of Texas at Austin.

Integrated photonics offers the semiconductor industry a new way to increase the speed and capability of classical compute functions, as well as enabling quantum computing. The III-V Summit, hosted by SEMI Europe in partnership with Photon Delta at SEMICON Europa, opened with a compelling question: why is a photonics summit taking place in the middle of a semiconductor event? Ajit Manocha, President and CEO of SEMI, highlighted the growing convergence of the semiconductor and photonics industries, stating, “It is my firm belief that a boost to Moore’s Law will come from the III-V world.” Declaring that the rate of growth in integrated photonics is set to pick up substantially, Manocha assured, “I will be your ambassador to make sure that the III-V technologies gain far greater visibility than they have today.”Ajit Manocha, President and CEO, SEMIThe promise of new III-V technologies is generating significant excitement within the semiconductor industry. Abdul Rahim, Ecosystem Manager at PhotonWorld, acknowledged the reality that today’s III-V device industry operates in a limited sphere, stating, “The III-V world is still at the interface of industry and academia. There is one main application for III-V devices – transceivers for data centers.” Abdul Rahim, Ecosystem Manager, PhotonWorld Carlos Lee, Director General of the European Photonics Industry Consortium (EPIC), echoed this message, “Photonics is not so much an industry today; it’s an ecosystem. It lacks the standards, roadmaps, and market data that a full-fledged industry needs – but we are getting there.” Carlos Lee, Director General, European Photonics Industry Consortium (EPIC)However, Rahim pointed to a number of trends that are driving the growth of III-V technology for integrated photonics. One key development is large-scale integration, “over the years, the number of devices in one photonics integrated chip (PIC) has been growing fast, reaching tens of thousands of components on-chip,” Rahim explained. Additionally, the widening frequency range supported by III-V devices is unlocking new applications beyond the telecom sector. Broad Scope of Research into III-V Technology for Integrated PhotonicsResearch into III-V technology spans an impressive range of materials, processes and applications. Nick Singh, CTO at Compound Semiconductor Applications (CSA) Catapult, a government-backed technology incubator, described in detail the most important fields of research that are driving innovation in integrated photonics. “III-V materials are special because they can be engineered,” Singh explained. Highlighting their potential role in advancing quantum computing, Singh added, “The ability to use new materials is crucial to reducing the reliance on algorithmic compensation for errors and non-linearity in hardware.” Nick Singh, CTO, Compound Semiconductor Applications Catapult However, Singh emphasized the need for the photonics industry to address structural challenges that could hinder progress. “Collaboration is crucial to standardize process development kits (PDKs) for photonics device fabrication processes—it’s like the Wild West in PDKs right now,” Singh remarked. “Additionally, the availability of raw materials presents a significant challenge.”The truth of this warning was confirmed by Diane Scott, Vice President of TECHCET, stating, "The US has deemed gallium to be the number one supply chain risk among a list of 50 raw materials, and the European Union (EU) has identified gallium as a critical raw material."Diane Scott, Vice President, TECHCETSuch geopolitical concerns have done little to dampen the intensity of research in III-V technology. One of the powerhouses of integrated photonics research is IBM, and Heike Riel, a Fellow at IBM Research with a special interest in quantum computing, revealed promising avenues that IBM is exploring. “IBM has developed local III-V-on-silicon heteroepitaxy, “Riel explained. “Using a direct growth method, we can grow vertical, lateral, and even 3D structures in III-V, such as stacked GaAs structures.” Riel highlighted the potential applications of this technology in emerging processor designs, including the Artificial Intelligence Unit (AIU) and analog computing devices with in-memory logic. “Here, we can deploy GaAs as a photorefractive material, used as a grating, to perform the same function as conventional electronic non-volatile memory in an analog computer chip,” Riel noted. Heike Riel, IBM Fellow, IBM ResearchAlso at the forefront of photonics integration is Black Semiconductor, a start-up company based in Aachen, Germany, which is developing devices using graphene. Cedric Huyghebaert, CTO of Black Semiconductor, shared the company’s vision, “We want to use electronics to compute, and photonics to transfer data, and bring both functions together on the same chip.” Black Semiconductor’s mission is to become the first foundry to offer integrated graphene technology. “Our ambition is to integrate graphene in line with semiconductor standards using semiconductor tools – avoiding the need for exotic processing technologies,” Huyghebaert explained. “We also aim to demonstrate co-integrated photonics on a 300mm wafer system, regardless of the process node. In doing so, we want to prove that deep technological innovation of this kind is possible in Europe.”Cedric Huyghebaert, CTO, Black Semiconductor GmbH Bringing Integrated Photonics to the MassesAs III-V technology develops to enable a broader range of integrated photonics applications beyond the telecom market, experts are recognizing the need for it to become more accessible if it is to be adopted by a wider range of manufacturers. Joni Mellin, manager of the photonics business line at the X-Fab Group, emphasized, “As an industry, we need to bring electronics design automation (EDA) tools up to a level of capability that matches that of the silicon world, so that you do not need a PhD to do product design – we need to make it accessible to ordinary electronics engineers.” Joni Mellin, BL Manager Photonics, X-FAB GroupAdoption of the technology also requires access to production capacity. Peter Maat, Senior Product Manager at SMART Photonics, an open foundry for indium phosphide (InP) programmable interface controllers (PICs), highlighted the challenges in this area. Maat explained that the availability of the foundry as “not a trivial capability,” because many InP fabs are run by integrated device manufacturers, and are closed to other users. The SMART Photonics business model aims to provide a comprehensive enablement service for fabless manufacturing of PICs. “Our responsibility is to produce stable, manufacturable building blocks that we make available to designers and to provide a platform which enables our circuit building blocks to be combined into an integrated photonics circuit,” Maat said.Peter Maat, Senior Product Manager, SMART Photonics Jayakrishnan Chandrappan, Head of Advanced Packaging Technology at CSA Catapult, also emphasized the importance of access to production capability. “The CSA Catapult has one of the world’s only sub-10micron hybridization facilities for advanced packaging that is open to third-party users,” Chandrappan noted.Jayakrishnan Chandrappan, Head of Technology, Head of Technology - Advanced Packaging, Compound Semiconductor Applications CatapultPromising Future for Integrated PhotonicsAs the summit concluded, the atmosphere was charged with optimism about the future of integrated photonics. The discussions highlighted how III-V materials, combined with advanced packaging, are set to play a pivotal role in shaping next generation technologies. A recurring theme throughout the event was the profound impact III-V materials will have, as they poised to become a corner stone of virtually every emerging technological advancement. SEMI ContactLaith Altimime, President of SEMI EuropeEmail: [email protected]

Focusing on applications that help assist movement in people with neuromotor disorders & aging muscle, Georgia Tech is developing a flexible system that uses sensory feedback through EMG to assess muscle and motor neuron health and augments strength through pneumatically actuated artificial muscle.

Atomic Layer Deposition (ALD) players are poised to seize a new growth opportunity after the chip shortage pushed manufacturers to announce fab capacity expansions worldwide. Driven by the wafer production volume increase, ALD solutions are now expected to grow and enter the MtM devices market.

SEMI spoke with Dr. Mikko Söderlund, sales director for Beneq’s semiconductor business, about trends in Atomic Layer Deposition (ALD) applications. Söderlund shared his views ahead of his presentation at SEMI MEMS Imaging Sensors Summit, 25-27 September, 2019, at the WTC in Grenoble, France. Join us at the event to meet Beneq and other key industry influencers. Registration is open.SEMI: The Backside Illuminated (BSI) CMOS Image Sensors (CIS) market continues to experience steady growth. Which applications are currently driving market growth?Söderlund: BSI CMOS Image Sensor market continues to be driven by mobile, security, automotive and Internet of Things (IoT) applications – so there seems to be plenty of opportunities for BSI CIS market to grow further.SEMI: What is critical for advanced thin-film deposition methods to extract best electrical performance?Söderlund: It is critical to control the material properties of the deposited layer (such as charge density, resistivity or barrier property) and of course, film uniformity and conformality. Furthermore, controlling material interfaces is also important, especially for sensitive III-V materials. {% video_player "embed_player" overrideable=False, type='scriptV4', hide_playlist=True, viral_sharing=False, embed_button=False, width='350', height='197', player_id='12721134435', style='margin: 0px auto; display: block; float: right; margin-left: auto; margin-right: auto; width: 350px;' %} Coatings and material features based on existing standard techniques can be very expensive, or not feasible at all. What does Atomic Layer Deposition (ALD), as a thin film coating method, offer in particular?Söderlund: ALD offers dense, highly conformal and pinhole-free best-in-class functional layers for dielectrics, passivation, encapsulation and much more. As a gentle and precise layer-by-layer method, ALD is extremely well-suited for deposition of such performance critical layers over large surface areas such as a cassette of wafers.SEMI: Please describe the Atomic Layer Deposition (ALD) coating process. Söderlund: ALD is based on a self-limiting surface reaction controlled thin film deposition. During coating, two or more chemical vapors or gaseous precursors react sequentially on the substrate surface, producing a solid thin film (see schematic below). Most ALD coating systems use a flow-through traveling wave setup, where an inert carrier gas flows through the system and precursors are injected as very short pulses into this carrier flow. The carrier gas flow takes the precursor pulses as sequential waves through the reaction chamber, followed by a pumping line, filtering systems and, eventually, a vacuum pump.SEMI: What are the two leading edge ALD applications?Söderlund: Today’s leading-edge ALD applications are in logic (high-k/metal gate, multiple patterning) and memory (DRAM capacitor, 3D NAND). Within the More-than-Moore (MtM) markets, CIS and MEMS (actuators and sensors, RF) have been early adopters of ALD, and we also see ALD being introduced in GaN Power and RF, as well as photonics.SEMI: Give us one prediction about the opportunities offered by advanced imaging applications.Söderlund: The large diversity of imaging applications will continue to drive growth and innovation. For example, machine vision is expected to transform the imaging landscape. We see this as a big opportunity for advanced thin-film deposition methods such as ALD, provided that the tools are versatile enough to address the diverse manufacturing requirements.SEMI: What are your expectations for SEMI MEMS Imaging Sensors Summit and why do you invite your peers to attend? Söderlund: The summit brings together all key RF stakeholders in the MEMS and imaging sensors industry, and we are looking forward to a great event. It’s a special event for us as we are officially launching a new ALD cluster tool product specifically engineered for the MtM applications – so this brings great excitement that we want to share with the attendees.Dr. Mikko Söderlund is Sales Director for Beneq’s semiconductor business. He has more than 20 years of experience in product development, product management, technical sales and business development across the photonics, OLED, and semiconductor industries. Mikko received his Ph.D. in Micro- and Nanotechnology from the Helsinki University of Technology. Serena Brischetto is a marketing and communications manager at SEMI Europe.

New system-on-chip (SoC) devices are driving new memory architectures and photonic interfaces, while specialized new intellectual property (IP) requires analysis down to the nanometer and atomic levels because of single nanometer process nodes. According to Babak Taheri, CTO and EVP of products at Silvaco, a leading EDA Software, semiconductor IP company, a member of SEMI and the ESD Alliance, a SEMI Strategic Association Partner, design technology co-optimization and proven IP are required for this analysis.Taheri recently discussed atoms to systems in next-generation SoC designs with Nanette Collins ahead of ES Design West, co-located with SEMICON West, July 9-11 at the Moscone Center in San Francisco.ESD Alliance: For years now, the assumption is that each new chip design is more complex than the last. Why are the latest SoC designs even more complex than before?Taheri: New SoC devices for mobile phones, automobiles, intelligent edge nodes, big data compute and storage are adopting artificial intelligence and machine learning technologies. This is driving new compute, data flow, as well as memory architectures that are bandwidth-limited and some require photonic interfaces.One common denominator in present SoC design are the numerous blocks of IP. On average, over 85% of these blocks are reused. It’s cost-prohibitive to make these chips over and over again with new IP. According to some estimates, 90% of IP used in an SoC design by 2025 will be reused – only 10% is new technologies. That 10% is significant.ESD Alliance: How so?Taheri: Complex new technologies including flash memory, other advanced non-volatile memory technologies such as MRAM, RRAM and SoCs such as NVIDIA’s Xavier and Apple’s A12 use and reuse design IP at the architectural level.New technologies mean new materials and new processes. Single nanometer process nodes require specialized new IP that needs to be simulated and analyzed down to the nanometer and atomic levels.ESD Alliance: Does the atomic level changes the design equation?Taheri: Yes, it does. Designers need to be able to simulate at the atomic level and understand properties of these materials, and how they behave in at-process and at-device levels. They need be able to simulate the material's nanometer geometries, how molecules behave and how they interact for device operations. When they put together a process and a device, they need to know how the pieces behave and simulate before production.In other words, they run quite a few design experiments and quite a bit of simulation before they finalize the circuits and devices to silicon to save money.ESD Alliance: It’s obvious design automation will continue to have a vital role in design.Taheri: Yes, absolutely. Design technology co-optimization (DTCO) using TCAD solutions and proven design IP are needed to address the span from architecture to device and process physics. The importance of simulation, emulation and design technology co-optimization, along with fully verified and proven IP for SoC design, cannot be overstated. As designers generate devices and processors, they take that up to circuit-level simulation and high-level simulation, schematic capture, extractions and back annotation. They can go from atoms to simulating systems to the ability to do that under the same umbrella in order to get better chips, better yield and lower cost.Taheri’s talk Next Generation of SoC Design: From Atoms to Systems will be part of the Meet the Experts More than Moore session Tuesday, July 9, at 11:30 a.m. at the ES Design West SMART Design Pavilion. SEMICON West attendees are invited to Moscone Center’s South Hall to learn more about electronic system and semiconductor design and its links to the electronic product manufacturing and supply chain. Register for ES Design West or SEMICON West.Babak Taheri is Silvaco’s CTO and EVP of products, has more than 25 years of design experience. His current role managing Silvaco’s Technology CAD (TCAD), electronic design automation (EDA) and IP product divisions makes him an expert on what’s needed for the design of next-generation system-on-chips (SoCs). Previously, he was the CEO and president of IBT working with investors, private equity firms, and startups on M A, technology and business diligence. Babak received his Ph.D. in biomedical engineering from the University of California Davis with Bachelor of Science degrees in Electrical Engineering and Computer Science and Neurosciences. He has published more than 20 articles and holds 28 issued patents.Nanette Collins is a public relations representative for the Electronic System Design Alliance.

According to market research and strategy consulting firm Yole Développement (Yole), the total market size of MEMS, sensors and actuators will double from $48 billion in 2018 to $93 billion in 2024.[i] The consumer market will continue to drive volume, with applications such as smartphones making up for in volume what they lack in average selling price (ASP). Stronger demand in automotive, biomedical/health, industrial, and voice-first applications (such as smart speakers) will support this upward trajectory. With so much growth ahead of us, how will the design and manufacture of MEMS keep pace with industry demand for higher levels of innovation and integration, lower cost and lower power, smaller footprints, and faster design cycles — all while meeting acceptable price points?We turned to a handful of MEMS manufacturing experts from SEMI-MSIG who will join us at SEMICON West 2019, July 9-11 at the Moscone Center in San Francisco, to explore the complexities of keeping pace with market demand for MEMS over the next decade.Address the Design GapMentor GM, ICDS Division Greg Lebsack and SoftMEMS President Mary Ann Maher see tremendous progress in the manufacturing supply chain for MEMS. At the same time, they acknowledge the significant gap that still exists in design capability for creating the billions of interconnected sensors required for future applications. Greg and Mary Ann will dive into the standards, ecosystem requirements and collaborative design solutions that will allow the micro-sensors industry to meet demand for next-generation wearables, Internet of Things (IoT) products and medical devices.Get Collaborative with Greg and Mary Ann: Addressing the Design Gap to Enable Next Generation Sensor-Based Products, SEMICON West, TechTALKS South, Thursday, July 11, 2019, 10:35-11:00 a.m. Register today.Get to a Really Big NumberFrom thousands of sensors and actuators in a single airplane to hundreds in a single car or a piece of factory equipment to the twenty-plus that ship in each of the hundreds of millions of the world’s smartphones, we aren’t even close to reaching the saturation point for these intelligent devices. SPTS Technologies EVP GM David Butler isn’t living on the Spaceship Enterprise (or the Millenium Falcon, come to think of it) when he says that we are going to get to a trillion sensors. It is going to happen. The questions are: how and when?Connect with David: Enabling the Age of a Trillion Sensors, SEMICON West, TechTALKS South, Thursday, July 11, 2019, 11:00-11:25 a.m. Register today.Shift to Automotive-GradeDemand for optical sensing technologies such as LIDAR is shifting sensor manufacturing requirements from consumer- to automotive-grade, with its enhanced lifetimes, temperature cycling and higher performance specifications. To meet demand, manufacturers are turning to wafer-level processing, since it complies with the hermetic sealing and dew-point control required for the more rigorous automotive-grade applications. EV Group Business Development Director Thomas Uhrmann, Ph.D., will provide an overview of the steps for manufacturing optical elements, including integration with CMOS circuitry, as he offers a window into the future of automotive packaging for sensors.Tune in with Thomas: Future Manufacturing Requirements for Automotive and Photonics Sensing, SEMICON West, TechTALKS South, Thursday, July 11, 2019, 11:25-11:50 a.m. Register today. Measure Twice, Cut OnceFaster time-to-market, improved device yield, and greater productivity in high-volume manufacturing are increasingly critical requirements for MEMS manufacturers. When a single manufacturing error can cost hundreds of thousands if not a million or more dollars — as well as months of development time — designers can save both time and cost by employing an integrated approach to MEMS design. Lam Research Sr. Director of Strategic Marketing David Haynes will explain how simulation, verification and process modeling can address MEMS-specific engineering challenges such as multi-physics interactions, process variations, MEMS + IC integration, and MEMS + package interaction. Using the right tools before committing to actual fabrication can make or break a project.Get Conceptual (and Practical) with David: Enabling Better MEMS from Concept to High-Volume Production, SEMICON West, TechTALKS South, Thursday, July 11, 2019, 11:50 a.m.-12:15 p.m. Register today.Navigate a Dynamic Foundry LandscapeWe’re still living in a one product-one process world when it comes to MEMS manufacturing. This makes bringing a new device to market both time-consuming and expensive. These challenges aside, the functional capabilities of MEMS, combined with small-footprint and low-power options, have made MEMS increasingly popular. How are market dynamics in MEMS manufacturing evolving to accommodate both demand for high-volume, lower-cost products such as MEMS microphones as well as high-value, lower-volume products such as biomedical devices, IoT products and industrial sensors? Rogue Valley Microdevices Founder CEO Jessica Gomez will explain how foundry consolidation through acquisition, collaboration with other ecosystem players, and specialization in vertical markets such as biomedical or optical are some of the approaches that are transforming the MEMS foundry landscape.Join the Evolution with Jessica: Consolidation, Collaboration, Specialization: How Will MEMS Fabs Manage Changing Dynamics, TechTALKS Stage South, Thursday, July 11, 2019, 12:15-12:40 p.m. Register today.i“Status of the MEMS Industry report,” Yole Développement (Yole), 2019 Edition.Maria Vetrano is a public relations consultant at SEMI.

SEMI met with Erez Halahmi, vice president at 0eC SA, to discuss a new way to transfer information not only between chips but also between servers to reduce power consumption while boosting performance. The two spoke ahead of his presentation at the 3D Systems Summit, 28-30 January, 2019, in Dresden, Germany. To register for the event, please click here.SEMI: What is Zero energy connection’s (0eC) mission and vision and your role within the company?Halahmi: Prof. Naaman of the Weizmann institute of Science (Israel) and I founded OeC SA and invented the Zero energy connection (0eC) technology. OeC SA offers a completely new and innovative solution for interconnections, which dovetails with the current technological trend of “less is more.” In fact, we constantly search for a reduction in energy consumption in favor of capacity, all while simplifying manufacturing processes. We try to look at things differently. This is why our technology is so out of the box. It is a completely new way to transfer information, not only between chips but also between servers.SEMI: What projects are you currently working on that you think will make a difference in 2019?Halahmi: I am working on several diversified exciting projects including the development of a planar field emitter and a rechargeable battery with energy density higher than 1KWh/Kg. Planar field emission is a field emitter made with standard FAB processes that enable a pixelized matrix of emitters at the resolution of photolithography. The rechargeable battery is a novel battery type that delivers unprecedent energy density.SEMI: Your presentation at the 3D Systems Summit will focus on a new way to transfer data. Why is this a key topic?Halahmi: Metals have been used to transfer data since the realization of the first integrated circuit by Jack Kilby in 1958. What happened next? Photonics slowly entered the market supported by huge investments, and the global market grew over the years. However, even with such enormous growth, photonics is not easily integrated with CMOS processes and the market also faces the conversion energy issue on top of the rising costs of process change. Integrating photonics with CMOS requires converting an electrical signal to a photonic signal and back. This costs energy and adds circuitry complexity. What to do? We identified a need to create something out of the box – on one hand using the same CMOS processes without conversion, and on the other hand significantly increasing performance. More details will be released at my presentation at the 3D Systems Summit in Dresden. I am certain that you will find our invention very intriguing. SEMI: What do you think will be the main focus in the future?Halahmi: My belief regarding many aspects of our life is that history repeats itself. Look for example at the comparison Gallium Arsenide (GaAs) versus Silicon (Si). GaAs was never able to defeat the simplicity of Si. The same applies to data transfer. However, for a solution to overtake the metal interconnect, it is not enough to offer many advantages, but the same order of production simplicity should apply. Consequently, big companies will continue to focus on metal solutions for transferring data, though some smaller companies might adopt our technology due to its relative simplicity of production and great benefits.SEMI: What are your expectations for the summit in Dresden, and why do you recommend other industry leaders to attend the 2019 3D Systems Summit?Halahmi: The summit is a great opportunity to learn about new technologies and meet the people behind these innovations. It is a unique chance to meet and question the inventors themselves and learn more about your competitors. See you soon in Dresden!Serena Brischetto is a marketing and communications manager at SEMI Europe.