downloadGroupGroupnoun_press release_995423_000000 copyGroupnoun_Feed_96767_000000Group 19noun_pictures_1817522_000000Member company iconResource item iconStore item iconGroup 19Group 19noun_Photo_2085192_000000 Copynoun_presentation_2096081_000000Group 19Group Copy 7noun_webinar_692730_000000Path
Skip to main content
Default Banner Image

Internet of Things

In the early 1990s, engineers of varying degrees of skill with a powerful PC set up shop designing and selling blocks or libraries of reusable components with a defined interface and behavior. These blocks, known as intellectual property, or IP, were then (and still are) integrated into a larger design. While the new market segment created excitement and new opportunities, it also was untested and created uncertainty. Many fledgling companies failed. It’s a different story today. Arm, as well as Cadence and Synopsys, are silicon IP suppliers and the segment’s yearly revenue tops $4 billion, a long way from those early garage startup days. ESD Alliance member CAST, a silicon IP provider since 1993, participated in the remarkable growth and impact on the semiconductor industry. Nikos Zervas, CAST’s CEO, and I discuss those early days of the IP business and what’s ahead. Smith: What were the early days of silicon IP like? Zervas: In those early Wild West days of IP, vendors and customers both wanted to benefit from IP, but nothing was standardized, and people just tried things to see if they worked. The perceived barrier to entry was low: hundreds of IP companies sprang up thinking they only needed RTL coding skills and tools, an FPGA to prototype, and a few thousand dollars to invest. IP deliverables, quality standards, and business practices varied from vendor to vendor and over time. Risk was high, and there are many horror stories of re-spins or market failures due to faulty IP cores. Smith: How has the silicon IP market changed from its early days? Zervas: Firms delivering high-quality IP and providing outstanding customer support survived. Others disappeared. Eventually the industry centered around a reasonably common sense of IP requirements and quality and a consistent set of business practices. IP product complexity has driven upwards as SoCs have grown. The largest ASICs used to approach a few million gates; today they’re hundreds of millions, and the granularity of IP has evolved from small functions to pre-integrated subsystems. Early on, a designer doing image processing might license individual functions like a Finite Impulse Response (FIR) filter or a Discrete Cosine Transfer (DCT) block. Today, instead they would license a complete JPEG compression core containing those functions and more, or even a complete black box subsystem streaming processed, stabilized, compressed video over Ethernet. IP selection criteria have also changed. Early IP was handcrafted to eliminate every extra gate, as being a few thousand gates smaller was a killer advantage in the era of 180nm ASIC processes. Today, at 7nm or 5nm process, tens of thousands gate differences are just noise, and it’s usually the reliability, functionality, and performance of an IP core that matter most. Smith: When did the silicon IP market start to take off? What was the driving force? Zervas: By the early to mid 2000s, uncertainty about what IP was and how best to use it – and the early wave of less-than-great providers – were being replaced by increasing acceptance and emerging best practices. The introduction of smartphones, the wild growth of Internet of Things applications, growing automotive system sophistication, and other advances fueled the explosion of the IP market in the late 2000s. In fact, according to the ESD Alliance Electronic Design Market Data Report, revenue from IP licensing today has surpassed the license revenue from front-end EDA tools. This would have been unimaginable in the late 1990s. Smith: How has silicon IP changed chip design? Zervas: Designers today must develop massive, complex systems with an even tighter time to market. Only the higher level of design abstraction and the distributed expertise that silicon IP provides make this possible. But IP also increases the challenge of differentiation: With the same IP available to everyone, how do you design a product that stands out in its market? The answer to differentiation today lies mainly in clever SoC architecture. Delivering better features with superior performance, lower power consumption, or other winning characteristics now depends not so much on perfecting each separate IP block but rather from selecting the best IP for the system’s requirements, integrating those IP cores for clean communication and efficient resource sharing, and other smart system-level decisions. It’s similar to modern building design: Every firm has access to the same materials and tools – concrete, glass, etc. – but only a few produce exceptional buildings. Smith: It seems that are several different business models for IP licensing, such as up-front license fees, subscriptions, royalties, or a combination of these. Do you think the IP market will gradually align around one basic model, or will it continue as is with a variety? Zervas: Different models serve different needs. For example, commodity IP like a SPI interface can’t demand royalties, but unique, leading-edge IP – like a 112Gbps SERDES – still can. I believe the market will continue with different business models, though the number of different models may shrink and their terms begin to align. About Nikos Zervas Dr. Nikos Zervas is the chief executive officer of CAST, Inc. He co-founded image and video compression IP developer Alma Technologies in 2001, and led the bootstrapped firm as chairman and CEO for nine years before joining CAST. He was a founding member of the Hellenic Semiconductor Industry Association and served on its board for several years with responsibility for strategic planning. He is a senior IEEE member and member of the Technical Chambers of Greece, had contributed to the GSIA's IP Working Group, and has published multiple technical papers on data compression design and related topics. Robert (Bob) Smith is executive director of the ESD Alliance, a SEMI Technology Community.
Read More
Spend any time with Ansys’ John Lee, Rich Goldman or Marc Swinnen and you’ll hear plenty of optimism about the semiconductor industry even though they tick off a long list of looming design challenges. The need for reliable and effective electronic systems, they emphasize, is great and runs through high tech, aerospace and defense, automotive, IoT and 5G with communications being a common denominator. The three are especially bullish these days on changing market dynamics brought on by systems companies building company-specific bespoke, or custom, silicon. These systems companies are building chips with a different perspective and a fresh look at silicon design, a move away from the more traditional segment-specific silicon due to much more complexity. Ansys, a member of the ESD Alliance, a SEMI Technology Community, is a 4,100-employee company with a comprehensive portfolio of multiphysics engineering simulation software for product design, testing and operation products and services. John, Rich, Marc and I focused on Ansys’ semiconductor and electronics segment for our conversation. Smith: When did you notice the move by systems companies to build their own chips? What drives this trend? Lee: The inflection point was about three years ago when hyperscale data center and system companies recognized they needed an enterprise system design platform. They are designing bespoke silicon, driven to do this for cost efficiencies and to avoid relying on outside suppliers. They also want differentiation based on their specific platform needs so they can optimize compute power to their specific needs. Smith: What is driving the trend for multiphysics experience to ensure effective and reliable electronic systems? Lee: The increasing need for multiphysics analysis is acute. The physics of 3D IC, for example, brings in mechanical engineering with the convergence of mechanical and electrical as 3D emerges at the intersection of IC and System. As a result, physics becomes a necessity to analyze the stability of the chip in the package. Goldman: As well, the move to stacked chips, 3D IC and wafer-on-wafer requires thermal, electromagnetic and mechanical analysis in addition to the traditional analysis for function, performance and power. They all need to be analyzed together, not serially. It becomes multiphysics, not multiple physics. Smith: Two distinctly different disciplines – multiple physics and multiphysics – are needed for semiconductor design. How are they different? Why the need now? Swinnen: Multiple physics refers to the sheer breadth of physics that is now needed to analyze from the IC up to the largest system whereas multiphysics refers to the capability to analyze several physical effects concurrently, accounting for their impact on the design and interactions between various physics. Multiphysics are necessary to analyze the full context of the system environment – from nanometers to kilometers – for multi-chip packaging, chip-to-package-to-silicon and systems with multi-domain guidance. Goldman: A self-driving car, as an illustration, includes AI systems-on-chip, solid-state sensors, infotainment systems and radar/lidar detectors that must all work in the rain, the heat and the bitter cold. Smith: Why are design groups being reorganized to include expertise in mechanical and electromagnetic issues? Swinnen: Complexity has exploded, driven by a long list of technical requirements and, perhaps, mischaracterization. Goldman: Just consider the system on chip, mischaracterized by the semiconductor industry. The chip is never a system by itself. Rather, it is a complex component in a larger system and must be analyzed in that context. 3D IC is where this comes together and forces a recognition of physics outside the traditional scope of SoC design. 3D IC chips are much closer together on the board and it takes multiphysics embedded into the workflow of semiconductor design, packaging, system design and 3D IC to ensure they work reliably and efficiently. Smith: What is the solution? Goldman: It’s clear a specialized digital thread is necessary to move disparate groups with expertise in systems, physics and silicon together. Today, these groups or disciplines might not exist in the same company, whether it be a foundry, fabless or outsourced semiconductor assembly and test (OSAT) company. Lee: In order to unify the entire system design environment, a cloud-based, open and extensible heterogenous enterprise compute platform is required. It is similar to the SaaS-based business model and known as Simulation-as-a-Service (also SaaS). While vertical integration of design groups is already taking place at leading system design houses, there have also been advances in electronic design tools. These are starting to offer more comprehensive multiphysics capabilities including thermal, fluid dynamics (CFD), mechanical stress and reliability analysis in a single analysis cockpit. Today’s system designers face two platform challenges: First, they need an environment that is open enough to accept analysis results from multiple sources so that they can be overlapped and cross-analyzed. Second, the design platform must have the capacity to handle the enormous amounts of data generated by the latest 3-nanometer chips and 3D IC systems, and this implies an intimate coupling to elastic cloud computing. The days of an engineer writing Perl scripts and handing it off to someone else are gone. We believe that the industry is responding to this challenge with a new generation of design platforms that a cloud-native, open and extensible to allow heterogenous enterprise design. We are definitely at an inflection point in electronic design today, but the electronic industry has faced these before an we are confident it will master these challenges as well. About Rich Goldman Rich Goldman is director of marketing for the Electronics and Semiconductor Business Unit of Ansys. He holds a Bachelor of Science degree from Syracuse University and an MBA and Master of Science degree in Engineering Management. Moscow Institute of Electronic Technology (MIET)’s first honorary professor, he is also the recipient of honorary PhD degrees from Russian-Armenian (Slavnoic) University and State Engineering University of Armenia for contributions to the advancement of Armenia’s high-tech education and economic ecosystem. Rich served on EDAC’s board of directors. About John Lee John Lee is general manager and vice president of the Ansys Electronics and Semiconductor Business Unit. Lee co-founded and served as CEO of Gear Design Solutions (now Ansys), developer of the first purpose-built big data platform for integrated circuit design. He cofounded two other startups (Mojave Design and Performance Signal Integrity), which successfully exited into companies now part of Synopsys. He holds undergraduate and graduate degrees from Carnegie Mellon University. About Marc Swinnen Marc Swinnen is director of product marketing for the Electronics and Semiconductor Division of Ansys. He holds Master degrees in Electronic Engineering and Industrial Management from KU Leuven, Belgium, as well as an MBA from San Jose State University. About Bob Smith Robert (Bob) Smith is executive director of the ESD Alliance, a SEMI Technology Community. He is responsible for the management and operations of the ESD Alliance, an international association of companies providing goods and services throughout the semiconductor design ecosystem.
Read More
U.S. consumers are flush with cash, the American economy is hurtling back from the depths of the COVID-19 pandemic, and the semiconductor industry is flying high on skyrocketing chip demand, with chip equities soaring since the initial outbreak in early 2020 as virus outbreaks worldwide supercharged demand for the digitization of everything from factories to home offices. “Wow, what a difference a year makes,” said Jennie Raubacher, Global Head of Semiconductor Electronics Investment Banking at Wells Fargo, speaking at a recent SEMI webinar. The two rounds of government stimulus payments in 2020 and 2021 gave many U.S. households the safety net to withstand the heaviest blows dealt by the COVID-19 pandemic and stoked consumer spending that has helped lift a hobbled economy. Durable goods spending in the U.S. has also seen a sharp rebound, surging more than 60% from its April 2020 trough, Raubacher said. The twin forces have driven a blistering U.S. economic recovery after GDP shrunk about 10% by the second quarter of 2020 only to bounce back in the first quarter of this year to roughly $19 trillion, regaining the lost ground to match the GDP charted at the end of 2019. With the U.S. economy continuing to gain steam, inflation has, as expected, edged higher, with price increases particularly acute in used vehicle and lumber markets. Despite surging prices, Wells Fargo sees inflation moderating as durable goods demand slows, easing pressure on interest rates, Raubacher said. Equity Valuations at Record Highs Heady semiconductor stock prices are not new. Over the past 15 years, equity prices of chip companies in the S P 500 have grown more than 460%, outpacing the 230% jump in value of the S P 500 index overall, Raubacher said. And chip stocks continue to shine. Since early 2020, when the spread of COVID-19 hit its rapid clip, the recognition of the growing importance of chips to economies around the world has exploded. That dynamic joined secular technology trends including autonomous driving development, industrial and factory automation, 5G infrastructure buildouts, data center expansions, and smart city and smart home innovation fueled by the Internet of Things (IoT) as key drivers of semiconductor stock valuations. With its price/earnings (PE) ratio now at more than 21x, the S P 500 is well above its historical average of 15x PE. “The S P 500 valuation is at record high any way you look at it, and valuation multiples across the board, currently at 3x Next Twelve Months revenue, have increased dramatically from historical averages,” Raubacher said. Semiconductor stock valuations are on similar trajectory, with the SOXX index now at 15x Next Twelve Months EBITDA (earnings before interest, taxes, depreciation and amortization). “While semiconductor stocks may seem highly valued compared to historical levels, the chip industry has grown faster and expanded profitability by a wider margin than S P 500 companies,” Raubacher said. With that differential, “semiconductor equities are not as expensive as they may seem at first glance.” Earnings expansion and valuation multiple increases for the chip industry over the past 15 years have translated into a more than 500% jump in market capitalization, compared to a 300% increase for the S P 500 excluding chip companies, she said. Chip company revenue growth in the first quarter of 2021 was predictably low due to seasonality, dipping 2.4%, though dropped less than the historical average, Raubacher said. Second-quarter revenue growth for the industry is expected to hew to the historical average of 6%. Semiconductor growth forecasts by market analysts for 2021 range widely from 6% to 17% year-over-year, she added. Chip Companies Raise Capital at Record Pace In 2020 and 2021, semiconductor companies have raised an unprecedented $82 billion in capital to finance maturing debt and acquisitions, a wave that will “likely catalyze further consolidation in the sector,” Raubacher said. None of the financing has stemmed from liquidity crunches. Since Raubacher joined Wells Fargo 10 years ago to lead its semiconductor practice, the group has executed more than 175 transactions including $40 billion in mergers and acquisitions and $360 billion of financing for its semiconductor industry clients. “With a strong macroeconomic backdrop and demand environment, relatively low interest rates, semiconductor companies showing strong business fundamentals and robust valuations, we expect a pickup in M A activity,” she said. Growth Forecast Across Most Semiconductor Applications The next four years will see the chip industry grow across most applications including wireless communications, consumer electronics, transportation and medical. Automotive and industrial/aerospace will lead the way, expanding at an expected compounded annual growth rate of 14% and 10%, respectively, from 2020 to 2025 to “drive a significant portion of the TAM expansion during that period,” Raubacher said. Across all applications, the semiconductor industry is expected to grow at a 6.8% CAGR from 2020 through 2025, adding $183 billion in revenue by the end of the forecast period, she said. ESG Rises in Importance For their part, investors now focus on more than pure business performance when valuing individual companies. The ability of businesses to reduce their carbon footprint, promote workplace diversity and take other steps to serve the greater good as part of Environmental, Social and Governance (ESG) programs are carrying more weight in valuation models. “Investors are paying more and more attention to ESG initiatives and targets,” Raubacher said. “On the debt side, we’re seeing things like green bonds and interest rate reductions tied to ESG targets. Only a few semiconductor companies have incorporated ESG measures into their financing, so it’s still early days. It really comes down to the metrics you can track in your companies and the goals and targets you can commit to. It will be a very company-specific approach rather than an industry standard.” In the chip industry, Raubacher noted that ESG targets are geared not only to manufacturing equipment and processes in fabs and other semiconductor facilities throughout the supply chain, but increasingly also to chips themselves. As technology innovation continues to spur the development of chips to power more electronics for consumers and businesses, their proliferation comes at a cost: greater energy consumption. The upshot is that semiconductor makers are becoming more focused than ever on power-efficient designs to bolster their ESG initiatives, Raubacher said. Many semiconductor players across the supply chain are reducing their carbon footprint by switching to energy-saving equipment and reducing water waste, Raubacher said. At the same time, more semiconductor executives are recognizing the rising importance of highlighting corporate achievements across all aspects of ESG. More Governments See Vital Importance of Semiconductors As shelter-in-place orders took hold in countries worldwide after the initial COVID-19 outbreak, work-from-home offices, online shopping, virtual classes and remote doctor’s visits became the norm. The electronics at the heart of this connectivity – born of both necessity and convenience – and the chips that power them took on outsized importance around the world. Geopolitical skirmishes intensified and supply chains across the semiconductor industry were reimagined and redrawn. Governments jockeyed for advantage in the race to build new semiconductor manufacturing facilities and upped their chip investments. An acute chip shortage that started in the automotive industry and quickly spread to other sectors magnified just how pervasive and vital semiconductors had become in making the world go round. “There’s no question that the semiconductor industry is vitally important to global and national economies as governments around the world now recognize its strategic importance,” Raubacher said. That puts the industry in an even stronger position to help lay the regulatory groundwork for its own future. “There’s a unique opportunity for semiconductor industry executives to shape the public policies that could impact the direction of the industry for the next 30 years,” she said. More than 750 people attended the June 2nd webinar, Surging Chip Demand, Digital Transformation, and the Pandemic – What’s Next?, sponsored by SEMI members Brooks Automation, Hitachi, JECT, KLA and TEL. Sven Smit of McKinsey Company also delivered his talk Leading in COVID-19 Exit at the event.
Read More