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The 2025 SEMICON West Market Symposium brought together leading analysts and strategists to decode the powerful forces shaping the global semiconductor market. Building on last year’s focus on fabless growth and workforce initiatives, this year’s sessions centered on the rising influence of geopolitics, trade policy, and AI-driven investment. Experts from SEMI, Integrated Insights, Boston Consulting Group, Kearney, PwC, WSTS and TechSearch shared perspectives on how global shifts from tariffs to technology races are redefining supply chain resilience and regional competitiveness.On October 6 in Phoenix, Arizona, Clark Tseng, Senior Director of SEMI Market Intelligence, hosted the symposium and presented along with industry experts on the current trade environment from various angles. Discussions ranged from the effects of U.S. tariffs across the globe, to sector-specific considerations and market growth areas. US Trade Dynamics in Semiconductors As the geopolitical landscape in the U.S. becomes more complex, Iacob Koch-Weser, Associate Director, Global Trade Investment at Boston Consulting Group outlined the impact that tariffs are having on the U.S. industry. The average American tariff, he said, is higher than any time in the last 75 years. Although the semiconductor industry is less affected by high tariffs than other sectors, Koch-Weser noted that might change with the administration’s expanded Section 232 Tariff that imposes 50% tariffs on steel, aluminum, and their derivatives on nearly all trading partners. To explain, he described four potential Section 232 tariff scenarios, underscoring limited Section 232 enforcement as the ideal approach.Tariffs may be deprioritized in favor of chips incentivesThere may be targeted carveouts for alliesThe administration may impose high tariffs with limited exceptionsThere may be a 100% tariff rate To cope with tariff uncertainty, Koch-Weser recommended that companies consider reshaping policies, mastering trade compliance, and reconfiguring supply chains if possible. He also shared four potential outcomes for the future of U.S. trade that could take effect within the next 18-24 months. The U.S. may run its own system while the rest of the world aligns to World Trade Organization (WTO) rules.North American countries may form a stronghold, leaving all other countries to choose between the North American alliance and WTO standards.Countries may form new blocs and preferential agreements, creating multiple economic spheres worldwide.Global cooperation could break down, forcing countries to fend for themselves.With everything considered, he reinforced that the U.S. is still an attractive place for semiconductor investment. The current administration, he said, recognizes the importance of bringing advanced technologies back to the U.S. Navigating Uncertainty: AI-Driven Growth and the U.S. Semiconductor Manufacturing RenaissanceContinuing discussions on tariffs, SEMI’s Clark Tseng painted a picture of the current U.S. semiconductor industry. He divided his presentation into four key areas: near-term economic uncertainty, AI changes everything, semiconductor market equipment forecast, and material market outlook.Near-term economic uncertainty: U.S. tariff policies are contributing to inflationary pressures and altering global trade patterns, leading to cross-border uncertainty that is slowing investment. U.S. tariff revenue, he said, has expanded from $7 billion in January 2025 to $29.5 billion by August, forcing companies to sacrifice margins to compensate. AI changes everything: By 2030, Tseng noted that nearly half of the semiconductor industry’s capital expenditure will be driven by AI, pointing to sustained growth in AI-driven cloud infrastructure spending through 2028 forecasts. AI is also moving beyond data centers into edge computing and endpoint devices.Semiconductor market equipment forecast: Tseng reported that the outlook for the equipment market remains strong over the next three years. However, the biggest risk to the market is a potential slowdown in AI investment and adoption. Additionally, U.S. export controls and changes in regional supply chains present some challenges. Last year, China was the largest market for semiconductor equipment, but Tseng expects continued normalization amid broader market adjustments. Taiwan and South Korea experienced the strongest year-over-year growth, driven by demand for AI chips and high-bandwidth memory (HBM). Material market outlook: Silicon wafer shipments grew strongly in Q2 of 2025, but Tseng flagged this as unexpected and cited tariffs as a possible explanation. He noted the 300mm wafer segment is expected to grow 7% in 2025, while 200mm is projected to decline. The total wafer material market, he said, is also expected to grow by 6% this year. Additionally, wet chemicals experienced a 16% expansion in 2025, while silicon wafers, photolithography materials, and CMP materials are in recovery. Semiconductor Market – Status Outlook Tobias Pröttel (or Proettel), CEO of World Semiconductor Trade Statistics (WSTS), reported that the industry’s rebound remains firmly on track, with the latest WSTS statistics confirming a 19% year-over-year increase in global semiconductor sales during the first half of 2025. Total revenue reached $346 billion over the period, supported by strong demand for AI-driven infrastructure and next-generation data centers. Based on this solid first-half performance, WSTS has raised its full-year 2025 forecast to $728 billion, representing 15% annual growth, and now expects the market to reach around $800 billion in 2026, keeping the industry on course toward the $1 trillion milestone before the decade’s end.Logic and Memory continue to lead the expansion, driven by GPUs, AI accelerators, and high-bandwidth memory (HBM), while other product categories are showing steady recovery after the recent downturn. Pröttel noted that this growth is not confined to a single region: the Americas, China, and Asia Pacific are all posting double-digit gains, reflecting strong global momentum across the semiconductor value chain.Strategic Approaches to Semiconductors by Major Economies Following Pröttel, Kearney’s Vice President, PERLab, Sanjay Kumar outlined the semiconductor investment climates in South Korea, Japan, Taiwan, and India. South Korea is currently focused on maintaining its lead in memory, diversifying into logic, localizing its supply chain, developing advanced packaging capabilities, and investing in startups. Kumar also noted the Korean approach of offering loans, as opposed to the U.S. strategy of providing direct grants. In addition, Kumar said the Korean government plays an active role in how it wants its companies to grow, whereas the U.S. takes a more passive approach in this regard.Japan is also honing its leadership in key areas like materials and memory, and Kumar also pointed to the country’s efforts to build additional advanced packaging capacity. Japan, he said, aims to grow its industry though a mix of grants, loans, and tax credits. Among the country’s notable subsidies include a 50% subsidy for TSMC – its largest so far – as well as a $4 billion subsidy for Rapidus. Taiwan’s semiconductor industry is critical for protecting its national security. As a region with limited land, power, and water, Kumar noted that Taiwan is currently focused on developing its talent base. Its government is offering tax credits for R D and equipment and up to a 50% cost share for R D projects. India, he said, has one of the most ambitious incentive programs in the world. Through its India Semiconductor Mission (ISM), the country offers a 50% federal subsidy, in addition to a 20-30% state subsidy in its quest to cover the entire semiconductor ecosystem. Kumar also spotlighted some of India’s successes – like the joint venture between Renesas, CG Power and Industrial Solutions, and Stars Microelectronics – to build a new OSAT facility.Adapting to New Policy and Navigating the U.S. Semiconductor Landscape – Insights from Taiwan Taiwan is a critical trade partner of the U.S., ranking fourth in total trade volume as of July 2025. With Taiwan’s stronghold on the U.S. chip ecosystem, Paul Poliakov, Senior Manager, International Tax Services, CPA at PwC Taiwan detailed both the bottlenecks and developments regarding Taiwan companies’ investments in the U.S. Among the investment bottlenecks he highlighted were higher costs of building facilities in the U.S., multiple layers of compliance requirements that may be intimidating for new market entrants, and complex visa and tax regulations. In addition, Section 232 investigations on semiconductors are ongoing, with several potential policy changes that could take effect. The pending United States-Taiwan Expedited Double-Tax Relief Act could help ease burdens, he said, but it has yet to pass in the U.S. Senate as of October 2025. If it passes, it will integrate benefits for Taiwanese individuals and businesses into the U.S. tax code, which could substantially benefit Taiwanese investment in the U.S., including manufacturing, services, distribution, and a wide variety of other industries. Furthermore, Poliakov suggested that businesses maintain flexibility in their investment strategies, engage with U.S. state and local governments that can offer investment incentives, and work with professionals to ensure regulatory compliance. Geopolitical Shifts in Advanced Packaging AssemblyIn the final presentation of the 2025 Market Symposium, Jan Vardaman, Founder and President of TechSearch International provided an overview of the current advanced packaging market. Although advanced packaging represents the highest growth area in the industry, Vardaman highlighted that packaging complexity is also soaring. R D, testing, and equipment support infrastructure, she said, are becoming more critical for meeting future packaging needs. Even though assembly is mostly done in Asia, new U.S.-based advanced packaging facilities from Amkor, TSMC, and others represent signs of change. Still, Vardaman noted that the U.S. has almost no capability to produce advanced IC substrates using build-up film, which are needed to support high density applications. In addition, she highlighted that building more silicon fabs on U.S. soil won’t solve its national security or supply chain concerns.For the U.S. to create a sustainable packaging ecosystem, Vardaman concluded that support of assembly facilities is crucial. Ultimately, businesses must be willing to pay more for U.S.-based packaging in favor of potential supply chain resilience and national security benefits. SEMI would like to thank all speakers, sponsors, and attendees for the success of this year’s Market Symposium. Explore the latest SEMI Market Intelligence reports, covering historical reporting, actionable foresight into emerging trends and technology investments to make confident, forward-looking decisions across the semiconductor and microelectronics value chain.Clark Tseng is Senior Director, Market Intelligence Team at SEMI. Nishita Rao is Director, Product Marketing at SEMI.
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The semiconductor industry faces an unprecedented paradox: AI demand is booming, fab investments are rising, yet wafer shipments remain stubbornly flat. What's driving this disconnect, and when will it break?As of mid-2025, the global silicon wafer market appears calm on the surface, but underlying structural tensions are quietly mounting. The demand for AI semiconductors remains resilient, and certain high-value supply chains continue to operate near capacity. Yet wafer shipments have shown little sign of meaningful recovery—a divergence that raises questions about the conventional supply-demand playbook.SEMI's latest Silicon Wafer Market Monitor Report begins with a structural hypothesis: that the current market dynamics cannot be explained solely by weak demand or delayed orders. Instead, we propose that the demand pattern of fab operations itself has fundamentally changed.The Hidden Constraint: Time ExtensionOne critical metric has emerged as a structural bottleneck—fab cycle time, or the average duration for a wafer to complete its full process flow. Our quantitative analysis reveals that since 2020, fab cycle times have grown at a compound annual growth rate of 14.8%. This represents a fundamental deceleration in fab throughput, meaning that even with the same number of tools and consistent utilization rates, the volume of wafers that can be processed is now structurally constrained.Why is this happening? Rising process complexity, increased equipment density, and tighter quality control requirements are absorbing more capital per wafer while paradoxically slowing production. Equipment spending per wafer area has surged over 150% since 2020, yet this investment translates into longer processing times rather than higher throughput.The High Bandwidth Memory (HBM) Economic ThresholdSimultaneously, the market is approaching a new inflection point driven by the rapid rise of HBM. HBM wafers consume over three times more wafer area per bit compared to standard DRAM, creating potentially significant wafer demand. However, HBM currently accounts for just 16% of total memory revenue—still below a critical economic threshold.Our analysis identifies that when HBM reaches 25% of total memory revenue, the trade ratio rises to 1.5. This is the structural breakeven point where CapEx per wafer for HBM-dedicated lines aligns with standard DRAM economics. At this threshold, memory makers gain clear incentives to expand wafer input, and customers become more willing to pay premium prices.The Quantitative FrameworkInstead of relying on conventional forecasts, we model the interaction of four critical variables—HBM penetration, DRAM bit growth, fab utilization, and cycle time—using a quantitative simulation framework. Under current conditions (16% HBM revenue share, 15% annual bit growth, 95% fab utilization, and 14.8% cycle time increase), wafer input would need to increase by 23.9% annually to meet projected demand.Yet no fab is scaling wafer input to that extent today. This suggests the market isn't demand-constrained but operating within a conditionally responsive system—one that won't activate until key thresholds align.Beyond Economics: Technical and Operational ReadinessThe slow pace of HBM expansion isn't solely about investment timing. Technical constraints including low yields, delayed customer qualification, and process stabilization challenges also play critical roles. These preconditions—investment readiness, yield optimization, and qualification completion—haven't yet aligned, keeping the market in strategic latency despite robust underlying demand.Additional factors compound this delay. Backend bottlenecks in Chip-on-Wafer-on-Substrate (CoWoS) packaging are causing semi-finished wafers to accumulate as inventory, constraining upstream wafer input. At the fab level, companies prioritize efficiency gains through process conversions over new construction. Meanwhile, macroeconomic uncertainty, geopolitical tensions, and foreign exchange volatility continue suppressing capital execution.The Three-Tier Response ModelThis structural shift creates a three-tier demand response across the supply chain:Wafer demand: Conditionally responsive, awaiting economic threshold alignmentEquipment investment: Process-transition driven, already responding to complexity increasesMaterials demand: Directly tied to cycle time extensions, with potential for early bottlenecksFor certain process-critical materials like EUV photoresists and TSV chemicals, supply constraints may emerge even before wafer input fully ramps, preceding equipment expansion.Strategic ImplicationsFor industry stakeholders, this analysis suggests three key actions: wafer suppliers should prepare scenario-based capacity plans around the 25% HBM threshold; equipment makers should anticipate process-transition driven demand regardless of current wafer volumes; and materials suppliers should prepare for potential bottlenecks as extended cycle times increase consumption per wafer.Crucially, the current stagnation shouldn't be interpreted as structural decline. Rather, the market exists in a state of strategic readiness, with key conditions not yet aligned. Once they are, wafer demand will likely respond nonlinearly—and momentum is already building in that direction.The structural inflection point (≈25% HBM penetration) and cycle time increase (+14.8%) serve as forward-looking indicators not just for wafer producers, but for the entire upstream supply chain. The question isn't whether this inflection will occur, but when. Companies that understand these structural dynamics and prepare accordingly will be best positioned to capitalize on the nonlinear demand response when it arrives.These key insights are from the market update section of the Q2 2025 Silicon Wafer Market Monitor Report. This quarter's analysis models structural inflection points using scenario-based projections across nine core charts and tables, offering data-driven perspective on the industry's readiness for the next demand shift. Download your free sample report today.For more information on the report or to subscribe, please contact the SEMI Market Intelligence Team at [email protected]. Details on the complete SEMI market data portfolio are available at our Market Intelligence website. Sungho Yoon is a Principal Analyst in the Silicon Wafer Market Research at SEMI Market Intelligence.
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SEMI kicked off 2025 by hosting its annual Industry Strategy Symposium (ISS) gathering industry executives, government leaders, and research institutions to share insights on current and near-term business and market dynamics. Over the course of two and a half days, this key forum also provided valuable networking opportunities to foster collaboration.The event theme, Ready. Set. Ramp! aligns with the industry's goal of reaching $1T by 2030. While there is uncertainty due to global trade tensions, supply chain challenges, and talent shortages, AI-driven opportunities are proving to be a major growth driver. Another key highlight was the advanced packaging panel that reinforced the value of hybrid bonding and 3D device architectures playing a critical role in supporting AI and next-generation chips. The overarching sentiment from the event was that it's an exciting time to be in semiconductors, with unprecedented transformation and opportunities ahead. Collaboration across the industry is essential to overcoming technical challenges and accelerating innovation.SEMI leaders had the opportunity to speak with Francoise von Trapp of 3D InCites at the conclusion of ISS. Listen to the podcast to hear highlights from Joe Stockunas, President of SEMI Americas, along with market updates from SEMI’s Market Intelligence team members, with Inna Skvortsova covering semiconductor equipment and Christian Dieseldorff speaking on fab expansions. Looking aheadSEMI has many conferences and exhibitions scheduled throughout the year with opportunities for insights and networking. For the SEMI Americas region, don't miss the inaugural SEMIExpo Heartland on April 1-2 in Indianapolis, Indiana. SEMI is excited to host this event in the burgeoning Midwest U.S. region that is already seeing increased activity and opportunity for semiconductors, especially in areas around automotive electronics, smart manufacturing, machine learning, AI and workforce development. The expo is poised to spur collaboration among industry, government, and academia.A key change to note for Americas events this year is that SEMICON West is taking place in Phoenix, Arizona on Oct. 7-9. With over $100B in investments in motion, the greater Phoenix area is a growing manufacturing hub in the Southwest. There is already a lot of buzz and excitement with a sold-out venue and over 400 speakers lined up for the 3-day event. SEMICON West will return to San Francisco in October 2026 and will alternate between these two locations every other year through 2030.ResourcesPress Release: Eighteen New Semiconductor Fabs to Start Construction in 2025, SEMI ReportsPress Release: Global Total Semiconductor Equipment Sales Forecast to Reach a Record of $139 Billion in 2026, SEMI ReportsSEMI Market Intelligence ReportsSEMI ISS 2025: Ready, Set, Ramp! by Dean Freeman, 3D InCitesSEMI ContactSherrie Gutierrez, Marketing Communications ManagerEmail: [email protected]
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