RF-SOI

With the CAGR for switches in cell-phone RF front-end modules running at 9% for the next five years, new players want to get in on the action, and established players want to up the ante. The specialists at Incize help wafer suppliers, foundries and fabless companies maximize switch performance starting at the substrate level. CEO Mostafa Emam explains how.SOI News (SN): Can you tell us about the role Incize plays in the RF-SOI ecosystem? [caption id="attachment_32519" align="alignright" width="140"] Incize CEO Mostafa Emam. (Photo courtesy: Incize)[/caption] Mostafa Emam (ME): Our clients are wafer suppliers, foundries and fabless companies. The services we offer are testing and modeling of substrates, with the vision of what will happen in the value chain. Based on what the customer will do with the substrates, we do testing and modeling to improve the technology and tune their processes. Although the big players have teams devoted to this, we can add a layer of characterization that they have no expertise in. Some of our customers are foundries that have been using bulk silicon, but now see opportunities in RF-SOI. But they’re starting from scratch and we help them to adopt the technology. We help them understand the physics behind the technology so they can migrate from bulk to SOI. We help them develop test structures and evaluate their technology. Then we create models for both fully-depleted and partially-depleted SOI with PD-SOI 130 nm or 60 nm technology dominating the RF front-end module market. We believe RF is an art and you need to see the whole picture. SN: Can you tell us a bit about the history of Incize? ME: The RF-SOI story started in the 1990s. Then came trap-rich RF-SOI wafers from Jean-Pierre Raskin’s team at UC Louvain, industrialized by Soitec. Our lab at UC Louvain became known for our expertise in RF-SOI, and in 2011 we created Incize as a spin-off. [Editor's note: for more background, see this SOI Consortium article about the birth of trap-rich substrates and the company’s founding.] At first our characterization services were very diverse, but by 2014 we focused mostly on RF-SOI because of the big demand. In 2015 we started doing radiation hardness tests for space applications and a new business unit was created. In 2016 we started our modeling and PDK activity, followed the next year by work on GaN on Si. In 2018, we started offering full support to RF-SOI newcomers, who were starting from scratch, usually smaller players in the RF market. It takes about two years to fully train the engineers, support the technology enhancements, design test vehicles, measure them and finally do the modeling and PDK. So some of these players are now fully established in the RF-SOI market and have contracts in place with big customers. SN: In your presentations, you often say there is room for all. What do you mean by that? ME: There is a big market for RF-SOI in the coming years. It can offer the low-power, the low-cost and the high performance. RF-SOI is the only mature technology that combines all of this today. It successfully competes with traditional III-V technology. More foundries want to employ RF-SOI. We show to them that it’s not black magic – you just need to know how it works. [bctt tweet="There is a big market for RF-SOI in the coming years. More foundries want to employ #RFSOI. We show them that it’s not black magic – you just need to know how it works. - Incize CEO Mostafa Emam #5G #semiconductors" username="@soiconsortium"] On our side, we have the knowledge and the infrastructure. Our added value is that we can do advanced tests the customers can’t do. So the foundry says there’s opportunities in switches, we’ll do this and develop it all with optimization for specific Ron and Coff [the figure of merit for RF switches]. The foundry develops an RF switch and aiming at certain performance (RonCoff). We help our customers during this development phase. Once the performance target is reached we start developing a model and a PDK. There is enough demand for RF-SOI, as even entry-level cell phones have SOI chips. Some opt for a fast and low-cost solution. Many target “good enough”, although some target to compete against the big players – it’s a question of their business strategy. And this is where our added value comes in. SN: Can you provide some more insight into how you see the RF market? ME: The Front End Module (FEM) is a fast growing market, with increasing demand in terms of volume and performance. This includes antenna switches, LNAs, tuners, filters, etc. Historically, III-V materials have been used for their high performance and high power handling. However, RF-SOI has become the material of choice, and the biggest driver is integration of the RF switch and LNAs in one chip. It’s not easy to integrate the power amplifiers (PAs) on the same chip (still being on III-V substrates). But as it decreases footprint and cost, there are those who’ll do it. There is no viable competition for SOI – nothing will replace it in the short term. There are other technologies, but they are long term. It’s a stable market with high demand. SN: For those of us who are not RF experts, can you help us understand the technology? ME: The switch is sort of the traffic light of the FEM, receiving and transmitting. The simplest RF switch can be composed of only four transistors. Transistors leak power so you need to determine your Ron Coff performance. [Editor's note: Resistance on vs. Capacitance off, the RF switch figure of merit, is measured in femtoseconds and should be as low as possible. Psemi has a good video explaining it.] When the Coff capacitance is small, the switch is really off. When the On resistance Ron is small, it means low losses, and the switch is turned On. Ron and Coff is a compromise. And as there are many frequency bands and antennas, the FEM becomes very complex. Another issue is power handling, since the switch is the first stage behind the antenna. And finally, there is the question of switch linearity. Trap rich SOI wafers suppress harmonics so you have less distortion originating in the substrate. You have to model this – the designer needs to know. In addition to single tone harmonics you also get intermodulation, where, two or more high power signals at two different frequencies create distortion at other frequencies. The danger is that these parasitic signals can be so close that the filter can’t reject them and the useful signals get distorted. This was a killer for the switch created on the bulk substrate. Trap-rich RF-SOI fixed this. So now 100% of switches are on trap-rich SOI substrates. While it’s still a niche market, there is demand from customers for increasing the number of bands – that’s driving this market. SN: And what happens as we move to 5G? ME: There’s more and more pressure on the specs. It’s an art when anything changes. Moving from 3G to 4G required complete upgrade of the [foundry’s] models. With 4G, the specs are severe and the FEM must be built on trap-rich substrates. But 5G is not well defined, so the RF industry is taking their best shot. What is clear: the performance requirements get more challenging. Once the technology is understood, it can be implemented. But the foundries and the fabless need our help to do it fast and do it well. We create more value working together. SN: How do you see things evolving? ME: The number of foundries today doing switches on RF-SOI is increasing, and this will continue for the next few years. We saw this opportunity and invested in it. Our company is just ten people, and we are self-funded. We are swimming in business, but we have fun. And we’re getting recognition. Any company with CMOS in place could adopt RF-SOI. But it’s a different mindset. We help with the transition. ~ ~ ~Click here to read more feature articles in SOI News.

As a leading TCAD provider, Silvaco has very deep SOI roots, reaching back over 20 years. When Oki* pioneered the first FD-SOI chips in 2000 (really? yes!), whose tools did they use? Silvaco's. And those early FD-SOI chips went into Casio's most advanced G-Shock watches in 2005. (Yes, ASN has been covering FD-SOI for a long time!) But note that while those earliest chips used fully depleted architectures, they were on regular – not ultra-thin – SOI wafers, as they are today. [bctt tweet="Deep Roots: When Oki pioneered the 1st FD-SOI chips in 2000 (really? yes! for #CasioGShock) look whose tools they used: @SilvacoSoftware #FDSOI #lowpower #chipdesign #semiconductor #semiEDA" username="@soiconsortium"] When we look at the IEEE Spectrum Digital Library, it’s clear that Silvaco is continuing to be very active in the SOI space. There are 72 conference and journal publications citing Silvaco for their SOI research simulations since the year 2000 and 27 in the last five years. They’ve supported all the SOI evolutions – including partially-depleted SOI up through and including today's FD-SOI on ultra-thin SOI wafers. There are two Silvaco presentations that were given in Japan last fall – they're now on the SOI Consortium website. A Bit More About Silvaco Headquartered in Santa Clara, CA and founded in 1984, privately-held Silvaco is a leading provider of TCAD tools. TCAD (short for Technology-Computer Aided Design) is the use of computer modeling and simulation in developing semiconductor devices and processes. As such, TCAD tools reduce the development cost and shorten the development time. Silvaco also provides a full suite of analog and custom design tools spanning schematic, layout, signoff and variation analysis. The portfolio also includes tools for power integrity sign off, reduction of extracted netlist, and production-proven IP cores for automotive, consumer, and industrial applications. Silvaco provides a full TCAD to custom circuit design flow for vertical markets including: displays, power electronics, optical devices, radiation soft error reliability, analog circuits, library and memory design, advanced CMOS process, and IP development. They have 500+ customers in worldwide, and market leadership in TCAD design solutions for flat panel displays and power devices. Recent SOI Presentations Here's a quick recap of the two Silvaco presentations from the Japan SOI Symposium, October 2019, which you'll find on the SOI Consortium website. (To view the full presentations, however, your company needs to be a member of the Consortium.) Silvaco RF-SOI TCAD Solution was given by Sun Tao, Applications Engineering Manager, Silvaco. Silvaco positions itself as a “cost-effective partner to the FD-SOI community.” And as the presentation title indicates, it's a review of the tools Silvaco offers that support SOI – especially for RF applications. The presentation began with a review of recent updates to their TCAD simulation framework, including the TCAD design flow, Victory Process for speeding up 2D/3D process simulations, and Victory Device for device simulation. Under Silvaco’s DTCO – Design Technology Co-Optimization – flow, semiconductor physics are connected to circuit design, recognizing that each technology has specific requirements that need to be taken into account at every stage of the flow. [caption id="attachment_31635" align="aligncenter" width="589"] An example of how Silvaco Victory Tools Support Detailed Simulations of RF Devices on SOI (Courtesy: Silvaco and the SOI Consortium)[/caption] Tao then continued by showing useful TCAD simulations and analysis of SOI for RF applications. In trap-rich substrate simulations, for example, the Silvaco tools can predict the distortion from the active device, device biasing, and substrate, all of which can be co-optimized using Victory Process and Victory Device. In conclusion, he notes that Silvaco is offering TCAD to custom EDA solutions for predictive and comprehensive FD-SOI design work that can save money before committing to silicon. Platform Infrastructure for SOI-IP Ecosystem was given by Thomas Blaesi, VP of Global Marketing, Silvaco. "The massive use of IP is both an advantage and a challenge," began Blaesi. There are solutions out there, but they are disconnected. Typically SoC/IP designers, IP librarians, and support folks use various systems, while procurement, finance, and legal use others. This is a problem for both the providers and the consumers of IP. Silvaco has a system called Xena that centrally organizes all IP data: it’s an IP repository for tracking accounts, products, contracts, devices, support, compliance, and reporting. One of the first beneficiaries of Xena will be the SOI ecosystem, as providers of SOI IP are already signing on. [bctt tweet="One of the first beneficiaries of the Xena IP repository from @SilvacoSoftware will be the SOI ecosystem, as providers of SOI IP are already signing on. #FDSOI #RFSOI #semiconductorIP" #lowpower #chipdesign username="@soiconsortium"] Beyond the organizational advantages, Xena has patented “finger printing” and “DNA analysis”, so there is a digital representation of each IP on an SoC that cannot be reverse engineered. Each fingerprint contains list of unique signatures of each file in an IP or SoC. A file’s unique signature is created from the entire file content, and that signature is guaranteed to be unique to that content. [caption id="attachment_31634" align="aligncenter" width="591"] Silvaco's Xena Supports Audits of IP Usage in SoC Projects (Courtesy: Silvaco and the SOI Consortium)[/caption] It enhances support for all versions of common design files: hard IP, soft IP, and embedded software. Because it’s enterprise based, it will be particularly useful for large organizations. Fingerprinting and DNA analysis are vendor agnostic, universal, and easy-to-use tools and methodologies for IP lifecycle management, he concluded. -- *Oki's now part of Lapis Semi, btw, which is still active in FD-SOI

Digitimes Research is predicting a doubling of the global SOI market between 2019 and 2024, "...thanks to significant expansion in applications to mobile devices, communication infrastructure, IoT devices and automotive electronics in the 5G era...". (Read the full article in Digitimes here.) Beyond the continued enormous success of SOI in front-end modules (FEMs) for RF (aka RF-SOI, which as we know is found in every smartphone on the planet), the report cites high growth specialty areas such as imaging chips for smartphones and photonics in data centers. They also predict that FD-SOI will be "massively applied" in 5G, with applications in base stations and data centers. And of course, low voltage and low power consumption will be the big drivers in IoT and wearables. All this is driving Soitec, the major SOI wafer manufacturer, to expand capacity at its facilities in France and Singapore in 2020, says the report. This is happening in strategic cooperation with Shanghai-based Simgui. As noted in ASN about a year ago, Soitec and China’s SOI wafer leader Simgui announced an enhanced partnership and increased production capacity of 200mm SOI wafers in China, securing future growth. At that time the two companies redefined their manufacturing and licensing relationship to better serve the growing global market for RF-SOI in mobile and Power-SOI in automotive and consumer electronics. Separately, Okmetic of Finland, which specializes in SOI wafers for MEMS, sensors and RF, is also doubling its capacity (we covered their 2019 Shanghai presentation here.) (Image courtesy: Soitec)

The industry continues rewarding luminaries of the SOI ecosystem. Recently recognized are Jean-Pierre Raskin for RF-SOI, Lattice Semi and NXP for FD-SOI products, and Bich-Yen Nguyen for her work in SOI. The SOI Consortium extends hearty congratulations to all the winners and their teams. Professor Jean-Pierre Raskin was awarded by the prestigious Médaille Ampère 2019 for the originality of his scientific work in the field of RF-SOI technologies for wireless communication. The international award was delivered by Mr. François Gérin, president of the SEE - Société de l'électricité, de l'électronique et des technologies de l'information et de la communication, on December 3rd, 2019, in Paris, France. We’ve long covered the work of Professor Raskin and his UCLouvain team – which is largely responsible for why SOI is in every smartphone on the planet. It’s a great story (read it here) and it goes on! In his Ampère acceptance speech, Professor Raskin said, “...significant industrial research and development is being performed toward fully integrated SOI front-end-modules. Notably, the 45nm PD-SOI [RF-SOI] and 28nm and 22nm FD-SOI nodes are being extensively designed with to develop 5G mm-wave low-noise amplifiers (LNA), power amplifiers (PA) and switches, in particular at 28 GHz. […] Overall, SOI is expected to be a big contender as a technological platform to enable mass production of millimeter wave 5G and ultra-low power RF IoT devices and products in the near future.” [caption id="attachment_27119" align="alignleft" width="294"] Lattice CEO Jim Anderson (left) and Mark Lipacis (right), Managing Director of Jefferies (Courtesy: GSA Lattice Semi)[/caption] Lattice Semiconductor was the recipient of the Global Semiconductor Alliance’s (GSA) 2019 Analyst Favorite Semiconductor Company award based on technology and financial performance. The GSA awards recognize the achievements of top performing semiconductor companies and the 2019 winners were announced at the annual GSA Awards Ceremony held on December 5, 2019. In thanking his team, Lattice CEO Jim Anderson, added, "We are even more excited about the solid execution of our product roadmap, specifically, the accelerated product rollouts of both CrosslinkPlus and our next generation FPGA platform based on FDSOI technology, which will be key catalysts to our achieving sustained long-term revenue and profitability growth.” [caption id="attachment_27120" align="alignright" width="71"] (Courtesy: NXP)[/caption] NXP was a recipient of a Best-in-Show Award at the 2019 Arm TechCon this fall. As was noted by Brandon Lewis, Editor-in-Chief of Embedded Computing Design, “The i.MX RT1170 crossover MCU marks a technology breakthrough in MCUs, running up to 1GHz while maintaining low-power efficiency. It is architected to deliver a record-setting performance, with a 6468 CoreMark score and 2974 DMIPS while executing from on-chip memory. The solution uses advanced 28nm FD-SOI [note: fabbed by Samsung Foundry] technology, making NXP the first company to build MCUs in this advanced technology node. This new MCU family is redefining the "edge" and MCU landscape, bringing unprecedented performance and high levels of integration to propel industrial, IoT, and automotive applications.” And finally, Soitec Senior Fellow Bich-Yen Nguyen was elevated to the status of IEEE Fellow in the Class of 2020 “for contributions to silicon on insulator technology”. As previously noted in her IEEE bio, “Her honors and awards include the Dan Noble Fellow, the highest technical award at Motorola; the Master of Innovation Award; and the first national Women in Technology Lifetime Achievement Award. She holds over 200 worldwide patents and has authored more than 180 technical papers on integrated circuit technologies.”

The SOI Consortium’s Japan Symposium this past fall covered a wide array of topics over two days. The first day was devoted to IP and products for RF and ultra-low-power (ULP) on SOI. The second day covered high voltage and photonics. It will take several posts to summarize all the presentations. In this post, we’ll cover presentations related to 5G. In the next posts we’ll cover IoT/ultra-low-power/automotive and photonics. (BTW, if your company is a member of the SOI Consortium, you can now access most of these presentations on our website.) The Japan SOI Symposium was organized for the 4th time at the Yokohama Landmark Tower (from which there was a fabulous view of Mount Fuji). It was a great success, with both days well attended. The event followed the day after (and in the same location as) Silvaco’s SURGE user event, so there were plenty of opportunities for synergy there. (Samsung Foundry talked about their partnership with Silvaco, for example, and their work together on RF and eMRAM on 28nm FD-SOI.) STMicroelectronics [caption id="attachment_27068" align="alignnone" width="589"] From “5G Deployment Driving RF and SOI Technology Opportunity” (Courtesy: ST SOI Consortium)[/caption] As noted in the ST presentation, 5G standards are getting a big push in the Asia-Pacific region, and by China in particular, which is leaping ahead especially in sub-6GHz. It’s a complex standard, noted John Carey, the company’s director of Digital RF for the A-P region, and it’s disruptive, demanding new silicon architectures and technologies. Next year’s premium phones, he said, will include over $30 in RF components, 40mm2 of which will be based on SOI. ST has been working on RF-SOI for over two decades, and offers a range of technologies and foundry services supported by three high-volume fabs. The key benefits with RF-SOI, he explained, stem from RF FEM integration of switches, LNAs and PAs. RF-SOI technologies are here now and are successful in the markets: ST has a long-term technology roadmap and is making continued strategic investments, he concluded. Toshiba [caption id="attachment_27069" align="alignnone" width="410"] From “RF-SOI Switch LNA for Mobile Applications” (Courtesy: Toshiba SOI Consortium)[/caption] Another long-time RF-SOI user is Toshiba, although this marked their first participation in a recent Consortium event. As Group Manager Kazuyuki Uchida talked about RF techology trends, there was lots of note- and picture-taking in the audience. He pointed out that the character and size of the switch LNA modules are particularly important in the move to 5G. They’ve been leveraging their TaRFSOI(tm) process, which he said achieves the industry's lowest insertion loss, for about a decade now. The latest version, TaRF11 will be launching in Q1 of 2020. TaRF10 integrated the LNA with the switch and control circuitry in a single chip. TaRF11 will feature performance improved by about 25%. Incize [caption id="attachment_27065" align="alignnone" width="405"] From “RF Characterization” (Courtesy: Incize and SOI Consortium)[/caption] During the Incize presentation, the company’s CEO Mostafa Emam affirmed that RF-SOI is a very good business opportunity. Incize works with the complete supply chain. For foundries and wafer suppliers, they measure harmonics and output with very high precision, which is especially critical for switches. For the wafer suppliers, it’s predictive. For the foundries, it’s measuring noise for models and PDKs. While RF may be an art, second tier foundries using Incize services are now able to compete with the first tier players, he noted. He sees trap-rich RF-SOI wafers as being especially important for 5G. GlobalFoundries [caption id="attachment_27064" align="alignnone" width="599"] From “RF Reliability for SOI CMOS Si-based Power Amplifier for 5G applications” (Courtesy: GlobalFoundries SOI Consortium)[/caption] The focus of the GlobalFoundries talk was reliability in RF processes. In 5G, you need technologies that are viable for both mmWave and sub-6GHz across handsets, wifi and automotive, noted Purushothaman Srinivasan (who goes by SP and is a senior member of the company’s technical staff). In SOI, you can stack FETs (which you can’t do in bulk) for PAs, which is a big advantage in mmWave. However, delivering scalable, linear, efficient and reliable RF power technology is more challenging than digital, and requires a holistic, collaborative approach that includes the foundry, the customers and the test equipment suppliers. GF has used its RelXpert simulation tool on aging simulations and lifetime predictions for both their 22FDX and 45RFSOI processes. They have observed good RF model-to-hardware correlation, and have built Safe Operating Maps that provide guidance to RF designs. This first-in-industry RF reliability evaluation provides “highly differentiated” solutions for GF. Silvaco [caption id="attachment_27066" align="alignnone" width="606"] From “RFSOI TCAD Solution” (Courtesy: Silvaco and SOI Consortium)[/caption] Silvaco is a leading EDA provider of software tools used for process and device development and for analog/mixed-signal, power IC and memory design. Their presentation began with a review of recent updates to their TCAD simulation framework, including the TCAD design flow, Victory ProcessTM simulation for speeding up 2D/3D process simulations, and Victory DeviceTM simulation. Under Silvaco’s DTCO – Design Technology Co-Optimization – semiconductor physics are connected to circuit design, recognizing that each technology has specific requirements that need to be taken into account at every stage of the flow. Applications Engineer Sun Tao then continued by showing useful TCAD simulations and analysis of SOI for RF applications. In trap-rich substrate simulations, for example, the Silvaco tools can predict the harmonic balance from the active device, device biasing and substrate, all of which can be co-optimized using Victory Process and Device. SITRI [caption id="attachment_27067" align="alignnone" width="305"] From “NB IoT FEM based on SOI” (Courtesy: SITRI SOI Consortium)[/caption] Shanghai Industrial μTechnology Research Institute – aka SITRI – is an international innovation center, focused on globally accelerating the innovation and commercialization of “More than Moore” technologies to power IoT. SITRI Director Wenwei Yang’s talk focused on their narrowband front-end module for IoT (NB IoT FEM). NB-IoT is especially meant to handle small amounts of data from remote places over long periods. There are a lot of players in this market, so taking a “good-enough” approach to performance wherein cost is primordial is key. SITRI’s low-cost NB-IoT FEM integrates everything on a single chip, including the power amplifier (PA) and integrated passive devices (IPD), so packaging costs are low. Putting it on SOI (either trap-rich or high-resistivity) gives them better isolation and simplifies integration. ~ ~ ~ Our next post will continue our coverage of the Japan Symposium. Note: 2019 marks a decade of SOI Consortium events – yes, our first one was in 2009! Because a lot of the presentations in the past were so forward-looking, many of them are still of great interest today. Currently the presentations from 2015 through to the beginning of 2019 are available freely to everyone – and are well worth perusing.

As 2019 draws to a close, the SOI Consortium would like to recognize members that have joined over the course of this year: Applied Materials, Analog Bits, Antaios, Silicon Catalyst and SmarterMicro. And as we start off 2020, the Consortium is pleased to welcome Thalia Design Automation. Here’s a bit of SOI-ecosystem background for each of them: Applied Materials: AMAT has a long history in the heart of SOI ecosystem – in fact they’ve been working with SOI wafer-leader Soitec for over 25 years. AMAT is leading supplier of SOI-related process equipment, with systems for ion implantation, epitaxial deposition and chemical mechanical polishing (CMP). In fact their ion implanters are a key enabler to what became and is Soitec’s industry-leading Smart CutTM SOI wafer manufacturing process. And of course AMAT equipment is used to make virtually every chip in the world, so their breadth of vision as a Consortium member is clearly a wonderful addition. Analog Bits: SERDES (Serializer/Deserializer) IP is central to many modern SOC designs, providing a high-speed interface for a broad range of applications from storage to display. Analog Bits has been revolutionizing SERDES IP by drastically cutting the power it pulls. In fact in porting the IP to the FD-SOI processes of leading foundries, Analog Bits has laid claim to the industry’s lowest-power SERDES IP. They have been an active and generous sponsor of SOI Consortium events for several years now. Antaios: Antaios is a start-up in advanced memory technology. They are developing Spin Orbit Torque (SOT) non-volatile (NV) memory IP that is ultra-fast, durable, and reliable. The SOT-MRAM was proposed by SPINTEC and is now being developed by Antaios for nodes below 28nm where an STT-MRAM process is available. It is writable/readable in the nanosecond time scale making it particularly promising for cache memory applications (such as SRAM) for IoT, edge computing, AI and high-performance computing. SOT is an MRAM flavor that Antaios explains solves the STT-MRAM tug-of-war between endurance, speed and retention, thereby addressing both eFLASH and eSRAM replacement. Silicon Catalyst: Silicon Catalyst is the world’s only incubator focused exclusively on accelerating solutions in silicon. They address the challenges faced by startups while guiding them from concept to product, providing a path to funding, free access to tools, testing and shuttle runs, along with advice on proper corporate governance and strategic execution. The 21 startups admitted since 2015 to the incubator are developing innovative solutions in a variety of areas including energy harvesting, wearables, silicon photonics, memory technology, loT, high performance computing, artificial intelligence, machine learning, wireless communications, and biomedical devices. SmarterMicro: SmarterMicro is a fabless RF chip company. Their portfolio includes switches, power amplifiers and front-end modules FEMs. SOI technology provides the ideal platform for the software-defined RF front end module. They presented at several SOI Consortium events in Shanghai in recent years. Their 2018 presentation, RF-SOI in 5G Era and their 2017 presentation Reconfigurable RF PA and FEM with RF‐SOI, are available from our website. Dr. Li Yang of SmarterMicro received an SOI Consortium Industry Achievement Award in 2018 for outstanding contributions to RF-SOI, particularly citing the reconfigurable FEM, which debuted at Mobile World Congress in 2019. Thalia Design Automation: Thalia’s Re-use Platform-as-a-Service (RePaaS) solution combines an innovative methodology, advanced design automation technology and experienced analog engineering resources. It helps analog IP providers to maximize re-use of their existing product portfolio, to create new product variants quickly and easily, and to adapt their designs for manufacture using any semiconductor foundry service. Thalia’s AMALIA™ EDA design tools comprise an intelligent analog design optimisation automation toolset. The company has worked on multiple FD-SOI projects with body biasing, some of which are described in a recent company blog (read it here). Interested in joining this dynamic organization? For information on how your company can become part of the SOI Consortium, visit our About Us page, then use the Contact page to make your request.

The SOI Consortium’s China 2019 event ran for two days, and it’s taken four (!) posts to cover all the presentations. In this final post we cover the afternoon RF-SOI sessions, which were dedicated to the China RF-SOI ecosystem and the RF value chain. In case you missed them, our previous posts recapped: 1. major keynotes from both the FD-SOI and RF-SOI days; 2. the FD-SOI presentations; 3. the morning sessions of the RF-SOI day; and 4. (this post) the RF-SOI day afternoon sessions. As we noted in Part 1 of our RF-SOI coverage, there were over 500 attendees for the RF-SOI day. And impressively, the room was still packed right through to the very end of the afternoon. Read on! SESSION 2: CHINA RF-SOI ECOSYSTEMSuzhou HunterSun Electronics: Super Opportunity for Integrated RFFE (“Jacky” Yujun Ding, COO)This talk had two parts. First, how is 5G changing the world, and second, what are the RFFE opportunities? He cited IHS data indicating that 5G will create tens of millions of jobs. New products include NB IoT, cellular V2X, as well as traditional PC/tablets and smart phones. But you still need to cover 2/3/4G with 5G. Major growth will happen in 2025-27. In terms of opportunities for RFFE, you've currently got 550mm2 going for $8; in 5G, you'll need 600mm2, but it will cost $16. You need RFSOI for filters and antenna switches, which are in high demand. Parts of the supply chain have no China players. Revenue for BAW is higher than SAW, but there's more SAW. He sees the industry moving heavily into integrated FEM (versus chip-on-board). He finished by itemizing different parts of the RFFE, indicating where the opportunities are (citing some data from Yole), with a special emphasis on integrated products for Chinese companies, with continued investor confidence. SmarterMicro: RF-SOI: Key Technology of Smart Connection (Yangyang Pen, Director) RF-SOI is an enabler of smart connections. However he sees GaAs as better for power, so SmarterMicro has a solution combining RF-SOI and GaAs. They've developed the world's first mMTC RFFE for high-performance upgrades on a single die and software reconfigurable. He notes that for IoT, lifetimes will be longer than 10 years, and that terminals are becoming more powerful. CanaanTek: Critical SOI CMOS Blocks in the 5G NR Sub-6GHz RF Front-End Architectures (Wayne Ni, CTO Board Chairman) CanaanTek is a fabless company working in consumer markets, with switches, tuners and LNAs in SOI-CMOS. He wants to capture 10% of the market with a focus on sub-6. The antenna/tuner is a must, and they've developed solutions for switches here. The figure of merit is RonCoff. He showed a product roadmap on SOI-CMOS. Xpeedic: Innovative EDA Solutions to Enable Differentiated RF-SOI Designs (Feng Ling, CEO)RF-SOI is growing, but there are still design challenges in process, models, filters and packaging. To design a good front end, you need better models and filters. People think passives are easy, but you need accurate models here. Xpeedic has developed design flows that include the effects of packaging early in design. Their products include IRIS, iModeler and Metis (for packaging). They've also introduced substrate modeling in partnership with CWS in France. The product is called SiPEX: it can address linearity in switch or PA designs. You need accurate substrate models to do this. Customers indicate they're seeing big improvements as well as reductions of 25% in chip area. IDP filters is another place they're working, to provide RF filters to fabless IC or module companies. No single filter technology can fit all the needs – IDP is one of them, so they have a broad portfolio of IDP filter technologies. He closed by saying that especially in China, the SOI ecosystem is really growing. SESSION 3: RF VALUE CHAINTowerJazz: Specialized RFSOI Foundry Technology to Support Rapid New Product Development (Paul Hurwitz, Director of RF Technology Development)This presentation gave a full overview of what TowerJazz offers in terms of RF-SOI foundry services with its fabs in Isreal, the US and Japan. What's new in 2019 is a diversifying of 200mm and 300mm. 200mm is best for power handling (for infrastructure/basestation antenna tuners and switch power handling, for example). 300mm is best for SW and LNA integration and higher digital densities. They've got new SOI models for the latest technology generations, and physics-based modeling of RF breakdown for accuracy. With more die being flipped, they needed new substrate modeling. For LNA and switch integration in 300mm, they invested in RF modeling. They also have an in-house MPW (multi-project wafer) program. He noted that customers in China are moving quickly in response to their customer requirements. Okmetic: Tailored Silicon Substrates for RF Applications (Atte Haapalinna, CTO)Okmetic Oy is a niche player in the substrate materials market, with specialties in sensors and MEMS, where they are the market leader. Now part of China’s NSIG group, they are expanding their manufacturing facility in Finland. In this presentation, their CTO talked about their current offerings as well as what they have under development. They do 150-200mm wafers, with a special emphasis on thick SOI. In terms of silicon substrates for RF, ultra-high resistivity is key. Their wafers are also used in IDP – integrated passive devices – for RF and acoustic filters. They are continually improving their high resistivity Magnetic Czochralski (MCz) silicon wafers, and are developing substrates for RF passives for automotive V2X. For RF beyond 6 GHz, they are looking at customized high resistivity silicon wafers for mmWave with researchers and customers. For sensors, they do SOI wafers with built-in cavities. Incize: RF SOI Ecosystem – History Challenges (Mostafa Emam, CEO)The world is exceeding expectations in terms of data usage. While the CAGR for devices is 27%, for data it’s 46%. Therefore each device needs to be faster and more power efficient. Incize recognizes RF as an art, with each piece hand crafted. But artists need to see the whole picture: at Incize, they help 17 companies – including wafer suppliers, foundries and fabless – see that big picture, especially in measurement, characterization and modeling for RF. For wafer suppliers, they do very high-power and very precise on-wafer testing to determine things like intermodulation distortion and substrate interference. For foundries, their specialty is in RF switches, for whom they do harmonics testing and thermal noise management. With those insights, Incize foundry customers have drastically increased the performance of the RF chips they’re manufacturing on trap-rich, high-resistivity SOI wafers. Meanwhile, Incize is also preparing PDKs for future potential substrate generations including GaN-on-Silicon, silicon-on-porous, and new contactless testing techniques for piezoelectric-on-insulator (POI – used in filters in 4/5G). “There’s a really big business opportunity for RF-SOI,” concluded Emam, “and room for everyone.” Cadence: SOI Technology in Intelligent and IoT/Vision/AI Systems (Jonathan Smith, Senior Director)Cadence does SOI enablement at advanced nodes. Smith shared three recent success stories. First, there’s the Musca-S1 test chip they did with Arm, Samsung and Sondrel this past spring. Second, there’s the Tensilica DSP for automotive vision on GlobalFoundries’ 22FDX, which uses 1/10th of the power of existing solutions and was demonstrated at CES. And finally there’s the i.MX line from NXP. In recent news, there’s a new version (18.1) of Virtuoso RF. Though it’s been on the market for 30 years, they’ve added advanced methodologies so that system design and analysis are on the same platform. They’ve also announced National Instruments’ analysis solver, the Clarity 3D solver for next-gen 3D solutions, the integration of multiple electromagnetic (EM) solvers, and advance SiP options. Silvaco: Xena-IP Management Infrastructure for the SOI Ecosystem (Babak Taheri, CEO)Every multi-core SoC today has as many as 200 IPs, if not more. How do you manage that? Tracking and traceability of IP is complicated but important. For IP providers, how do they track where its being used? And for IP consumers, they need to know what they’ve used and where. What’s required is an IP management system to keep track of the different functions and different concerns. Today’s tracking systems don’t talk to each other. Silvaco’s Xena IP management solution organizes all IP data, accounts, products, contracts, devices, support, compliance and reporting. For compliance in particular, they do IP “fingerprinting” and “DNA analysis”, which they’ve patented. The fingerprint is a digital representation of the IP: it’s not just software. It is secure, and can’t be reverse engineered. It’s not a tag: a tag is inserted into the IP, whereas fingerprints are extracted. DNA analysis flags discrepancies and quickly identifies where they are and which files to look in. Xena works in the cloud, enterprise systems or hybrids. The SOI ecosystem will be hearing a lot more about this. ~~ Please note that the China event presentations are all available on our website to anyone whose company or organization is a member of the SOI Consortium.

The SOI Industry Consortium awarded two luminaries of the semiconductor industry for pioneering advances in RF-SOI, a technology now found in all cellphones. Jim Cable (shown on the left in the photo above), Chairman and CTO of pSemi, a Murata Company, and Herb Huang, CEO and GM of Ninbo Semiconductor received the awards during a gala following the SOI Consortium's 2019 RF-SOI Workshop in Shanghai. "Thanks in large part to the innovation, dedication and perseverance of men like Jim Cable and Herb Huang, RF technology based on SOI is now ubiquitous," said Carlos Mazure (on the right in the photo), Chairman and Executive Director of the SOI Consortium. "Jim Cable drove the development of SOI and RF switches that are now in every cellphone, and Herb Huang has been a key contributor to SOI technology and a champion of the SOI foundry ecosystem in China. We are happy and honored to recognize the contributions they have made to advancing RF-SOI globally." Jim Cable joined pSemi (formerly Peregrine Semiconductor) in 1996 and held technical leadership roles before serving as CEO from 2002 to 2017. An early pioneer of SOI technology, Cable believed SOI would ultimately replace other technologies in the RF front end, and he pushed his team to innovate. Cable is a co-inventor on more than 70 semiconductor and technology patents, including breakthroughs in SOI-based processes for CMOS RF switch linearity and integration that are used by all smartphones today, and will become even more mission-critical in 5G and millimeter-wave markets. He received his B.S. in physics from UC Riverside and his master's degree and Ph.D. in electrical engineering from UCLA. Herb Huang is CEO of Ningbo Semiconductor International Corporation (NSI), which is based in Ningbo, China. A driver of the RF-SOI ecosystem in China, he spent much of his career at SMIC, the largest semiconductor foundry company in mainland China. In 2016, SMIC created NSI as a joint venture subsidiary with China IC Investment Fund, Ningbo Economic Development Zone Industrial Investment Company, Ltd. and other IC investment funds. Under Huang's leadership, NSI optimized the process and model of a 0.13um RF-SOI technology platform transferred from SMIC. Now in mass production, the RF-SOI technology platform supports customers in IC design and product development for new generations of radio communications. Huang holds both a Ph.D in Materials Science and Engineering and an MBA from the University of Minnesota.

The 2019 International RF-SOI Workshop in Shanghai was packed to overflowing, with over 500 attendees, noted SOI Consortium Chairman Executive Director, Carlos Mazure. There were 16 presentations over the course of the day – every one of them excellent – so it will take two posts to cover them all. We covered Danni Song's compelling keynote in a previous post – see it here. In this post, we’ll cover the remaining keynotes and the morning session, which was dedicated to 5G deployment. In the next post, we’ll cover the afternoon sessions, which were dedicated to the China RF-SOI ecosystem, and the RF value chain. PDFs of the presentations are not yet posted, and then they will only be available to those whose companies belong to the SOI Consortium. But we’ve summarized them all for you, so read on! KeynotespSemi: 30 Years of RF-SOI – Past, Present and Future (Jim Cable, Chairman and CTO, pSemi (a Murata company))The keynote by RF-SOI legend Jim Cable chronicled his always-innovating journey from digital to RF via sapphire then SOI. (Cable's work was recognized in an award that evening.) His original vision back in the early days was for a RF front-end module (FEM) + CMOS transceiver. At the time, doing it on sapphire (an insulator) rather than bulk made it much easier, as sapphire eliminated the non-linear capacitances. That was the beginning of their UltraCMOS technology, and though it did very well, sapphire was only available in 6” wafers. So pSemi (or Peregrine, as it was known at the time), engaged with Soitec on bonded-SOS. “It was a killer technology, and the marketshare we won was staggering,” he recalled, and helped convince Soitec RF-SOI was worth looking at. The goal is to handle high RF power levels: you can use SOI to handle higher voltages than you'd think were possible. They added an invention they called HaRP, that dealt with accumulated charges and enabled them to hit the linearity specs on silicon. With that, he explained, they came to completely dominate the switch industry. UltraCMOS evolved, getting 60% smaller with 20x better linearity – but now of course you have 50 switches, not six. He heralded the great partnership they have with GlobalFoundries, noting, “We were pioneers in this field.” In fact, in 2017 they were in the top 10 for IP generation in semiconductor manufacturing. Now comes mmWave, where he says, “We see everything we believed and more.” They're currently sampling an 8-channel mmWave RFFE (RF Front End). Soitec: 5G-on-Insulator: the 5th Gear In Mobile Radio (Michael Reiha, GM, Soitec)Michael Reiha's talk centered on how SOI wafer-leader Soitec is positioning itself on 5G, which, he explained, demands a wider portfolio. Soitec looked at what they could do to make 5G ready for sub-6GHz. Massive MIMO (mMIMO) is an efficient technique to improve throughput. With SOI, you can reduce the power it takes, making it a good choice for urban environments. RF-SOI is a candidate for power amplifiers, and FD-SOI is enabling more users to be added. The concept of network sharing is an opportunity for compact, low-cost filters that can meet the requirements with simpler, lower-cost, higher-efficiency filters. That's why they've just announced a new substrate called piezo-on-insulator (POI). However, total cost-of-ownership is not just how much a product costs, but how much it costs to run it.. Currently, RF and mechanics dominate the bill-of-materials, so you need to decrease the number of RF FEM components and get savings scaled with the array size. The main challenge of SOI is in efficiency, but the advantage is that it can be used in integrating digital with analog sensing and RF. Then you can use AI sensing for tracking temperature, for example, and control for 5G optimization. In short, with RF-SOI, you apply AI to the radio head, especially for things like mMIMO. And btw, he added, Soitec currently has capacity of two million wafers per year. SESSION 1 – 5G DeploymentYole: 5G is ON. Which Impact for RFSOI Technologies? (Cederic Malaquin, Technology Market Analyst)There are over a thousand 5G networks available today worldwide, said Cederic Malaquin. Adoption is accelerating, driven by 5G cloud gaming, AR/VR/XR, 5G multi-video calling and stadiums. However, carriers need better ROI. 5G should address this so that customers are better served. MIMO and carrier aggregation (CA) are the main techniques supporting network capacity and coverage improvements. 5G NR will bring more spectrum. With each generation putting more content in phones, new spectrum is happening in sub6 and mmWave. The impact of 5G on mobile phones is huge in terms of both content and complexity. Some phonemakers (like Apple and Samsung) are moving towards increased integration. Others (like Huawei) are going more for discretes. Yole sees tuners, switches / LNA as addressable by RF-SOI, but they are less convinced about power amplifiers. They also see SiP (system in package) as prevailing over integration. The 5G mobile and base station markets will really build up in 2022-25. RF-SOI will remain the mainstream technology for switches and antenna tuners through at least 2025: they don't see anything else replacing it. There is still increasing demand for 8” wafers. 12” wafers growth comes from integrated switch/LNAs, which comes from the Tier 1's. In the front-end space, Murata leads in dollars by far, followed by Skyworks and others. Though mmWave is not yet clear, there are opportunities for RF-SOI. ST: 5G Deployment Driving RF and SOI Technology Opportunity (Laura Formenti, Sr. Director)STMicroelectronics has a long history in RF-SOI, noted Laura Formenti, dating back to 2000 when they started collaborating with Soitec and Leti. An IDM, ST also offers foundry services. For 5G, their foundry offering includes H9SOIFEM, C65SOIFEM and SOI mmW for high-performance analog, dedicated RF processes for RF switches, LNA, PA plus RFFEM. Then they have FD-SOI for RF, mixed signal and digital integration. From antennas to transceivers there's an opportunity for full integration. For infrastructure, it depends on the customer preferences. 12” C65SOIFEM was introduced in 2019, and 12” SOIMMW will be introduced in 2020. Both their fabs at Crolles and Rousset, France, are in production. H9SOIFEM is for 4G and 5G sub-6GHz RF FEMs, enabling monolithic integration of the PA, LNA and switches, which is especially good for wifi. The C65SOIFEM is high-performance. Panel: 5G Deployment in China, Jeffrey Wang, CEO, Simgui Technology, moderatorWith Danni Song (China Mobile), Jim Cable (pSemi), Peter Rabbeni (GF), YangYang Pen (SmarterMicro), Paul Hurwitz (TJ), Michael Reiha (Soitec)Q: Why sub-6GHz and not mmWave?Danni Song said its a question of available spectrum. In sub-6, you get the same level of coverage with fewer base stations; also, sub-6 is much more mature. When will mmWave be ready? It depends. In the US, yes, but in China the spectrum allocation for mmWave has not yet been done. So it's a wait and see for the industry to be ready. Peter Rabbeni agreed, adding that in the US sub-6 is crowded and conflicts with military bands. Paul Hurwitz added that mmWave is for fixed wireless access. Michael Reiha added that mmWave has advanced a lot even in the last few months (Verizon in Washington, DC, for example), so there is momentum.Q: Does China lead in the sub-6GHz opportunity?Jim Cable said that at pSemi they have two business models: mobile and infrastructure. He sees massive MIMO in base stations as huge (though in mobile their role is more supporting Murata). Peter Rabbeni added that they're working with innovative partners in China, and that GF also offers skills in services and packaging. Yangyang Peng sees big opportunites with 5G for SmarterMicro and China. Paul Hurwitz has seen an increase in the capabilities of RF companies in China, and that the market in China moves faster than elsewhere. Michael Reiha sees China as strategic, and because there is central deployment, they can plan with the right partners.Q: Data usage will be huge – what will it cost to individual users?Danni Song said 5G phones will be expensive, but consumers want them, so we need to bring down costs and increase performance – but what about power consumption? Power needs to come down, maybe levering things like sleep mode more. For 3G 4G, she noted, they had lots of time. People are pushing hard for 5G, but there's a need for patience. Yangyang Peng said he didn't want to pay more than for 4G. In summary, Jim Cable noted that mmWave will demand huge amounts of silicon, to which Paul Hurwitz agreed, and Michael Reiha said Soitec will be ready. Everybody agreed that 3D packaging would be very important, especially for mmWave. And that's it for our coverage of the morning. Next up we'll cover the presentations given during the afternoon.