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The first day of the SOI Consortium’s recent China event – the 7th Shanghai FD-SOI Forum – was full to bursting in every way: the room, the networking, the level of expertise, the in-depth presentations and the overall energy. We covered the Samsung and GlobalFoundry keynotes in our previous post (if you missed it, read it here).This post will recap the rest of the presentations given during the day. (If your company or institution is a member of the SOI Consortium, you’ll be able to access the full presentations online.)International Business Strategies (IBS) – Impact of AI on Automotive and IoT, and Opportunities in China (Handel Jones, CEO) When it comes to deep insights on China + tech + analytics, and especially with a thorough understanding of FD-SOI markets, Handel Jones is arguably the world’s leading expert. Here are some of the observations he shared. Though the chip industry will see declines across the board in 2019 (he sees 13.5%), he sees a return to growth in 2020. By 2030, he sees it as a trillion dollar market, of which China will have half. AI is a key driver – and will become more prevalent at the edge. Major drivers will include preventative medicine, gaming, NB-IoT and 5G. At the chip level, FD-SOI has a lower cost/chip compared to bulk – you’ve got small chips and high yields. Sensors – especially image sensors – are a key area, and this is another place where FD-SOI is better than bulk. He sees chip shortages in the 2022-24 time frame (as opposed to the current oversupply), so now is the time that China should be establishing large FD-SOI capacity.NXP – Automotive, Industrial and IoT Solutions Leveraging FD-SOI (Ron Martino, VP GM) In terms of power consumption, computing is easy but data transmission is hard, Ron Martino reminded the audience at the onset. That’s why you need the edge. This is where FD-SOI comes in, and if you want to have leadership, you should be leveraging body biasing, he said. In terms of machine learning, a lot can happen at the edge on the smallest devices. NXP is now shipping a very wide range of products based on FD-SOI, including the i.Mx7 and 8 families and the new RT crossovers. The latest announcement is the i.Mx RT 1100 MCUs, a very low-cost processor solution for high volumes. The i.MX7 ULP is in mass production for wearables, with record low leakage and high performance. The i.Mx8 and 8x are going into a broad range of applications – from retail solutions for automated checkout to pasta makers, and automotive applications for full cockpits with vision detection, as well as things like parking, V2X and in-vehicle monitoring.Sony Semi – Low Power IoT Products with FD-SOI eMRAM Technology (Kenichi Nakano, GM) Chips built on FD-SOI with eMRAM are in production, said Kenichi Nakano. In GNSS/GPS, Sony is the #1 in lowest power consumption worldwide, thanks to FD-SOI, he continued. They’ve had 70 remarkable design wins, giving them over 50% market share in the sports and health watch markets, he said with a tip of the hat to the FD-SOI ecosystem and SOI Consortium. In GNSS, performance is very important – and now they can do it in water, which is huge. Development cycles are shorter than ever – for the latest chip it started in February 2018 and was in production by the spring of 2019, achieving decreases of 20% in power, 30% in area and 10% in cost. Integrating eMRAM was easy in terms of the design flow and manufacturing, with production yield of 97-100%. So with the GXD5605GF they’ve got the first GNSS chip with FD-SOI/eMRAM/RF in the world and it’s on 28FDS/eMRAM technology. It’s very reliable and very good, he concluded.Rockchip – Challenges of AIoT Chip (Feng Chen, SVP) At the beginning of this year Rockchip announced the launch of their RK1808, a low-power AIoT solution with built-in high performance (3TOPS) NPU fabbed in GlobalFoundries 22FDX, said Feng Chen. Their clients were very happy that Rockchip delivered the real power and performance numbers they’d promised. Because of the power/performance it delivers, FD-SOI (both 22 and 28nm) is very well suited for AIoT chips, he said. It’s very cost-effective in terms of NRE and die, and there’s room for further savings. While the ecosystem needs a unified push, FD-SOI is good for the market in China, and China has the volumes FD-SOI needs. Rockchip sees particular potential in retail and smartphones.Panel – Verticals Driving FD-SOI VeriSilicon CEO Wayne Dai moderated the first panel, asking first why China should adopt FD-SOI. Soitec CEO Paul Boudre said because it is a big, dynamic market (noting that Sony’s first FD-SOI GPS win was in China). Handel Jones said that at the wafer level, there was cost parity, but with FD-SOI chips are smaller and higher yield. The main reason it’s taken so long to get going was IP, but that’s changing now, he added. Dai’s next question was about the top application fields the panelists predicted for 2020. Sony’s Kenichi Nakano said wearables with connectivity, low power consumption, small size and high levels of integration; Rockchip’s Feng Chen agreed. NXP’s Ron Martino said FD-SOI for automotive, machine learning and edge computing was shipping now, with wearables ramping.VeriSilicon – Low Power IoT Connectivity IP Design Based on FD-SOI (Yi Zeng, Director, IoT Connectivity Platform) The “value” of IoT data is not yet being generated, noted Yi Zeng but AI can help here. The IoT industry needs innovation for both chips and networking. SiPaaS – which stands for Silicon Platform as a Service – as offered by VeriSilicon can help lower the barrier to entry. [In the SiPaaS model, VeriSilicon has its own IP-based core. Based on the company's advanced chip design capabilities and mass production service experience, it has created a variety of silicon-proven chip design platforms that can significantly reduce the customer's chip design cycle.] They have FD-SOI IP for NB-IoT, BLE, GNSS and sub-1 GHz. The BLE (Bluetooth) RF IP is a complete offering optimized for low power on GlobalFoundry’s 22FDX. The NB-IoT IP is also optimized on their 22FDX ZSPNano, an energy efficient general purpose MCU+DSP core on 22FDX. And they’ll have results of test chips for GNSS RF IP on 22FDX by the end of this year.Secure-IC – AIoT Embedded Security Using FD-SOI (Hassan Triqui, CEO) While AI enables products and services, it’s important to plan for security early in the design cycle, said Hassan Triqui. Software is not enough to protect edge-to-cloud. Secure-IC’s hardware security module, Securyzr, is an IP block that can be embedded into every device to answer security functionalities such as root-of-trust and key management. In sleep-mode/tunable cryptography, FD-SOI allows the creation of physically secure systems. (Note that designers are leveraging FD-SOI’s unique body biasing for ultra-low-power deep-sleep modes.) Because safety and privacy require a combined solution, Securyzer is particularly well-suited to IoT chips built on FD-SOI, he concluded, so that IoT adds value to AI, and not just the other way around.Soitec: FD-SOI – The 5th Gear for mm-Wave Radio (Michael Reiha, GM FD-SOI Business Unit) There are four key areas to 5G, explained Michael Reiha: coverage, number of antennas, frequency and traffic density. 5G mmW access architectures are currently inefficient in terms of power and performance, but FD-SOI is ready for 5G access as both an analog and hybrid beamformer. For MU-mMIMO (massive MIMO), the RF front-end modules (FEMs) and transceiver will fully exploit FD-SOI. Sensing, calibration and control enabling hybrid beamforming and multiple users is easy in FD-SOI. The adaptive body biasing on the horizon will reduce power of FEM mixed-signal circuitry, and be a disruptive technology.STMicroelectronics – Automotive MCUs in 28nm FD-SOI for ePCM NVM (Shan-Lin Liu, Automotive Marketing Manager) As a leader in the automotive market, ST has seen that increased data flows in automotive are driving demand for higher performance and bigger memory in automotive MCUs, said Shan-Lin Liu. ST has taken a unique approach to NVM with embedded PCM (phase change memory) on 28nm FD-SOI. This gives them energy-efficient, high-performance cores with larger NVM memories, and it’s already qualified up to auto grade-0. PCM (vs MRAM) is BEOL. It uses two cells, so it’s more reliable and is good at high temperatures, he said. With FD-SOI, they can go up to 165o, and it’s soldering compliant. The preliminary results of the first MCU chip are excellent. It’s now running in a car, replacing the previous generation 40nm eFlash product.Leti – Advanced FD-SOI for Edge AI (Emmanuel Sabonnadiere, CEO) To fully run artificial intelligence on the edge, research powerhouse Leti is working on an unsupervised learning neural network using advanced FD-SOI and a mix of other technologies. These include embedded non-volatile memory (NVM), 3D integration, and new design tools. Sabonnadière said this new approach is expected to exceed the performance levels of current digital deep learning with neural networks that are capable of handling time-domain signals, sound and speech—and may produce a first "killer app" for advanced SOI. AI will require compact and power-efficient circuits for the inference phase, when neural networks infer things based on new data they receive, close to the end user. The combination of FD-SOI, 3D integration, and NVM opens a path towards dedicated circuits with major performance improvement within the limited power budgets of distributed electronics. In Europe, he noted, privacy concerns are driving the move from the cloud to the edge. On the Leti roadmap, they’ve broken through the 10nm limit for FD-SOI, using strain and body biasing to compensate for transistor mismatch. Also of note: since 2016 Leti has had an ongoing collaboration with SITRI, the Shanghai Industrial μTechnology Research Institute, an international innovation center focused on globally accelerating the innovation and commercialization of More than Moore technologies to power IoT.GlobalFoundries – GF Fab 1 Dresden: Delivering Differentiation with FDX for the Future of Automotive (Thomas Morgenstern, SVP GM Fab 1) Dresden Fab 1, Thomas Morgenstern reminded the audience, is the biggest in Europe, where it is part of the Saxony ecosystem. GF is moving advanced mask-making to Dresden, which is the lead site and Center of Competence for FD-SOI. With the “pivot”, GF is providing platforms. Fab 1 is automotive certified for 22FDX (GF’s 22nm FD-SOI technology), with automotive tapeouts in 2019. “Automotive is a journey,” he said, of continuous improvement, and a mindset: it’s a zero defects culture. The ramp to volume production is well underway, with 26 tapeouts of 22FDX products this year – almost double that of last year. He showed high yield data of about a dozen products, adding that since the beginning of the year every tapeout was first-time right with decreased cycle time. The key specifications for 22FDX with eMRAM for Auto Grade-1 have all been demonstrated, and customer feedback has been excellent.Next: Shanghai International RF-SOI Workshop recap As you can see, it was a packed day for the FD-SOI part of the SOI Consortium’s Shanghai event. In fact the room was still packed at the very end of the day. Several hundred VIPs then headed out for the ever-popular and festive evening riverboat dinner cruise, where the non-stop networking continued.A big shout-out to our sponsors and supporters: VeriSilicon, Simgui, SIMIT, Soitec, Samsung, IBS Ion Implant, ShinEtsu, GlobalFoundries and NXP.The next day of the event was devoted to RF-SOI. That will be the subject of our next post.
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The SOI Consortium and member companies had a significant presence at two important events in China recently: the World Semiconductor Congress (WCS) in Nanjing and the SOI Academy, including an FD-SOI Training Day in Shanghai. Nanjing is especially known as a leading RF chip design hub in China, but WCS went well beyond RF. The three-day 2019 event was held at the Nanjing International Expo Center. It attracted over 30,000 visitors, 5000 of whom attended the various summit forums. Presenting at WCS '19 in Nanjing (clockwise from top left): Wayne Dai, CEO/Founder, VeriSilicon; Carlos Mazure, Executive Director, SOI Consortium; Giorgio Cesana, Director, STMicroelectronics; Christophe Tretz, Design Expert, SOI Consortium. (Photos courtesy: WCS)The SOI Consortium organized the SOI Forum, which was part of an afternoon Innovation Summit. Presentations were given by members of the SOI Consortium team, and by leaders from our membership, including Simgui, NXP, Incize, ST, IBM, Cadence and Xpeedic. Some of those presentations are now available from our website -- click here to get them.Earlier in the day, SOI Consortium member VeriSilicon participated in a morning session on AI and IoT Wireless Communications. They presented their low-power Bluetooth design platform for GlobalFoundries 22FDX, and CEO Wayne Dai moderated a lively round-table discussion.Following hard on the heels of the Nanjing event, the SOI Consortium team and members headed to Shanghai for the SOI Academy 2019, hosted for the second year in a row by member SIMIT (Shanghai Institute of Microsystem and IT under the Chinese Academy of Sciences). The two-day event attracted more than 250 professionals from more than 100 domestic and foreign IC companies and research institutes. Keynotes by SOI Consortium Executive Director Carlos Mazure, SITRI CEO Mark Ding and Jean-Eric Michallet, Head of the Microelectronics Components Department at Leti and bizdev director for the SOI Consortium focused on the SOI ecosystem. The SITRI and Leti talks also gave updates on their research and industrialization alliance. Further talks were given by leaders from Soitec, GlobalFoundries, VeriSilicon, IBM and Xpeedic. These addressed the growing FD-SOI ecosystem, applications in automotive electronics, 22 nm and 10 nm FD-SOI devices, advanced SOI substrate technology, China’s FD-SOI development, the FD-SOI manufacturing process, product design, EDA tools and all aspects of industry’s software and modeling value chain.Several speakers noted that more and more local Chinese customers are actively adopting FD-SOI for low-power, high-performance chips. SOI Academy, Shanghai, 2019, FD-SOI Training Day attendees.(Photo credit: SIMIT)The second day was devoted to hands-on professional training, given by experts from Leti using an actual PDK and punctuated by in-depth discussions. This helped the IC designers to fully understand the advantages and flexibility of FD-SOI in low-power logic, analog/mixed-signal and RF. All in all, “It was a great success,” concluded Jean-Eric MICHALLET, Head of the Microelectronics Components Department at Leti and bizdev director for the SOI Consortium. Plans for the next SOI Academy are already underway, with plans to extend the topics to include more on photonics, RF, power and MEMS.
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There were over 220 participants at the recent SOI Academy FD-SOI Training event organized in Shanghai. The event extended over two days, with the first day covering a basic introduction to the technology as well as the ecosystem worldwide and in China. The second day was hands-on professional training. Attendees got a comprehensive understanding of how to leverage the benefits and flexibility of FD-SOI design techniques for low-power chips including logic, mixed-signal/RF and analog blocks. They had a great line-up of experts from whom to learn – check out the agenda here. There was also a follow-up press release (in Chinese) from SITRI here. There will be more of these SOI Academy events in cities across China in the year to come – we'll keep you posted (and of course, keep checking back for news on the Consortium's Events page). [caption id="attachment_12981" align="aligncenter" width="1000"] SOI Academy '18 keynotes by: Dr. Mark Ding, CEO, SITRI; Dr. Carlos Mazure, EVP Soitec and Chairman/Executive Director SOI Consortium. Dr. Julien Arcamone, EVP Leti. (Images courtesy: SITRI). Lower right: the hands-on FD-SOI training.[/caption] The two-day seminar and hands-on FD-SOI design training was (superbly!) co-organized by SITRI and Leti, with the support of the SOI Industry Consortium at the Jiading SIMIT campus outside of Shanghai. Just to put this in perspective, SIMIT and SITRI are absolutely key players in China's chip ecosystem. SIMIT is the Shanghai Institute of Microsystem and Information Technology, one of the most venerable institutes in the Chinese Academy of Science (CAS) and one of the world's earliest pioneers in SOI. SITRI is the Shanghai Industrial μTechnology Research Institute, an international innovation center focused on globally accelerating innovation and commercialization of More-than-Moore for IoT. Both institutions are under the aegis of Dr. Xi Wang, Chairman of SITRI, Director General of SIMIT, Academician of CAS, and champion of all things SOI in China. At this Shanghai event, the participants came from industry (including big companies, SMEs and startups) and technical institutions. In fact as well as attendees from Shanghai people voyaged from other cities such as Shenzhen and Chengdu. The designers participating to the FD-SOI training day were all experienced in design and highly motivated in learning FD-SOI design, notes Carlos Mazure, Chairman Executive Director of the SOI Industry Consortium, and Executive VP of Soitec. “This made it possible to dive into the specificities of FD-SOI,” he said, adding that, “The focus on RF was very timely.” Day 1: Intro to FD-SOI The first afternoon opening keynotes were made by SITRI CEO Dr. Mark Ding and Leti EVP Dr. Julien Arcamone. These were followed by overview talks by execs from Soitec, Verisilicon and GlobalFoundries. After a lively networking break, three talks delved into FD-SOI technology. The first was by Professor Sorin Cristoloveanu, Laureate of the IEEE Andrew Grove Award and Director at the CNRS (the French National Center for Scientific Research – the largest governmental research organization in France and the largest fundamental science agency in Europe). He covered device physics and characterization techniques. This was followed by talks on the technology by Soitec Fellow Bich-Yen Nguygen, and by Dr. Christophe Tretz, IBM Sr. Engineer on product design methodology. The day ended with a dinner, where Professor Cristoloveanu says enthusiastic technical discussions continued unabated (and continued even further in follow-up emails), lots of business cards were exchanged, and opportunities for further education were explored. Day 2: Hands-on Training The second day, designers got hands-on training from Leti experts using FD-SOI PDKs, first in the morning on digital, then in the afternoon on RF. Everyone loved the lively discussion and in-depth exchanges between the experts and the designers. They agreed that FD-SOI has important applications and differentiated competitive advantages for IoT, 5G, automotive, AI and other fields. At the end of the training, Leti and SITRI jointly issued SOI Academy certificates of completion to the designers. Feedback from participants was very good. Some asked for further education and for hands-on testimonials from companies that are already designing and manufacturing products on FD-SOI. “The participants were focused, motivated, involved, with good knowledge, which helped make the three hours of Digital training effective,” said Dr. Alexandre Valentian, Leti Sr. Expert, Digital Design. “The IT team was very helpful in setting up the training, the students accounts and the hardware infrastructure.” “The training on Basics of FD-SOI RF circuit was a great success thanks to the efficiency of our Chinese partners and also thanks to the enthusiasm and the good level of our trainees. As senior Expert of CEA Leti I was really impressed by the professionalism of the organization team. For all these reasons, I’m very glad to have had the opportunity to contribute to the 2018 SOI Academy,” said Dr. Baudouin Martineau, Leti Sr. Expert, RFIC Design Technologies. “The professionalism, efficiency and enthusiasm of our Chinese partners and the level and technical relevance of all trainees made the training on Basics of FD-SOI RF circuit a great success and fruitful experience,” added Frédéric Hameau, Sr. RF Research Engineer, Leti Project Leader, Architecture, IC Design Embedded Software Division, RF Architectures and ICs Laboratory. “It was a pleasure to get the opportunity to be part of this first edition of SOI academy 2018.” The organizers would like to thank the sponsors, including: the SOI Consortium and its members Soitec, VeriSilicon, GlobalFoundries, Simgui and Cadence, as well as Mentor, ProPlus and other companies and institutions in China and worldwide. Dr. Mazure notes that special recognition must go to Dr. Julien Arcamone, EVP, Leti-CEA and to Qing Wang-Bousquet, SITRI representative, for the perfect and smooth organization, and to the Leti instructors, who are international experts and highly committed. “As one of the main initiators and organizers of the 2018 SOI Academy, I wanted to personally thank all of you for your respective contribution to this first edition of the SOI Academy,” concludes Dr. Arcamone. “Undoubtedly, it was a great success, very well organized and fluid and we can be proud of that.”
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