RF SOI

Let’s celebrate! As of April/May 2020, Advanced Substrate News – or ASN for short, and now aka the SOI Consortium newsletter – has been bringing you news for 15 years. I hope you’ll forgive me if this post has a personal angle, as I have been the Editor-in-Chief since Day 1 back in 2005. One of the things I’ve learned over my career covering technology in general and SOI in particular is that “new” technologies are never really new. They don’t pop out fully formed like Venus Boticelli-style. They take years – decades, even. SOI is no exception. What is exceptional about SOI imho is that the ecosystem – from the substrate providers to the end-product designers – keeps finding new things to do with it. There have always been naysayers – and for a while it took on an quasi-fanatic ferocity. There were those who quipped that SOI was the technology of the future...and always would be. But as it turns out, SOI’s is, has been and will be the right technology at many right moments, and I don’t see any sign of that changing in the years to come. We Need a Newsletter! [caption id="attachment_32012" align="alignright" width="189"] My Design News piece on SOI from June 2000 - it changed my life![/caption] As so much in the SOI story, ASN began with Soitec. I first encountered Soitec when I was working as Contributing Editor in Europe for Semiconductor International in the mid 1990’s. It was a start-up of just a few people that made silicon-on-insulator aka SOI wafers. Most of us at the time had barely a notion of what that was all about, but they had an intriguing story to tell about higher performance and lower power. It so happened a few years later (circa 2000) I was also writing for another publication called Design News – not about chip design, but product design, for folks designing cars and consumer electronics and washing machines and such. I kept hearing a new requirement added to the product-design mantra of faster-smaller-cheaper: lower power. It seemed to me that these SOI wafers could go a long way in solving some of product designers’ challenges. I pitched a story to my editor and it wound up on the cover (those were the days some might remember when trade magazines were on paper…). The big players were IBM for digital (in a current-events aside, DKY that those big iron machines at the US national labs cranking on the solutions for the current pandemic use IBM FinFET-on-SOI chips? Just saying…), Philips (now NXP) for power/analog, and Soitec for wafers – and of course Honeywell for aerospace and the big electronics players in Japan for all sorts of things automotive and ultra-low power. Top management at Soitec read the piece and saw that I “got it”. They brought me on board as a consultant, writing early websites, PR, brochures and such. But also most importantly, they invited me “in” – I sat in on sales reviews and attended the big shin-digs they sponsored on the Riviera and in the Alps. The people I met there – and stayed in touch with – were many of the ones that drive the industry today. (Of course, that was then, this is now: I don’t have that insider status any more, but I’ve kept in touch with and often still rely on the expert advice of people I met during that heady time.) Anyway, one day at the end of 2004, the Soitec folks said to me, “We need a newsletter.” They asked me to come up with a concept they could pitch to the Board. Since Soitec was also doing GaN SiC at the time, I thought it should be called Advanced Substrate News – ASN for short. And we agreed it should involve the entire ecosystem: end users, equipment manufacturers, academics, suppliers of all sorts, and especially: chip designers. But it was not an easy pitch. Who’d want to read about SOI wafers, they asked? Wouldn't we run out of things to say after two or at most three editions? But the idea was a solid one: ASN could be a bully pulpit for the nascent SOI ecosystem. Happily it won the day. I was named Editor-in-Chief, and have held that title ever since. Our very first edition (we were a print quarterly then) had about a dozen articles on SOI, including automotive with Philips, ultra-low power FD-SOI with Oki for Casio’s G-Shock watches (oh yes – it goes back a long ways!), low-power (by a company that Arm then bought), high-performance, high-resistivity SOI wafers for RF…it was all there. And if you look at what we cover now, it’s still all there – albeit better than ever and growing fast. (I just listened to the most recent Soitec Q4'20 quarterly financial report audiocast – announcing that they’d just had their best quarter ever – largely driven by RF-SOI.) We Need a Consortium! In 2007, the SOI Consortium was created with 19 members (a dozen of whom are still members today). As ASN Editor-in-Chief, I was honored to be part of that effort, participating in the meetings where we hashed out what it was all about and what a consortium would do. It was a great opportunity to meet the movers and shakers across the industry, many of whom I’m still in touch with. We published steadily, as the years, technologies and applications came and some went, but ASN readership continued to grow worldwide. Then in 2015, I got an email from the head of the Shanghai Academy of Sciences, which had recently spun off an SOI wafer maker called Simgui. He was (and is!) an ASN reader (though now he’s China’s Vice-Minister of Science Technology). Would I come to Shanghai and present some of the SOI-based applications ASN had been covering to his team there? They’d been working on SOI in parallel for many years, and were interested in where it was going in Europe and America. That was exciting! My first trip (of many, now) to China, it coincided with Semicon China 2015 and the announcement of the “Big Fund”. It was hall upon massive hall of stands immense and tiny, and the level of excitement was nothing short of amazing. (I was one of the only Western journalists there, and essentially broke the story in a piece I wrote for Consortium member Applied Materials’ customer magazine). That trip opened a lot of doors for me and ASN. As the SOI Consortium teamed up to with partners in China to host symposia there, we devoted more and more extensive coverage in ASN to those exciting events. [caption id="attachment_32041" align="alignright" width="328"] Here's some of our core players at the SOI Consortium: Executive Co-Directors Carlos Mazure (also of Soitec) and Jon Cheek (also of NXP) on the far left and right, respectively, Event Manager Iris Rith in the middle, me (Adele Hars) next on the right. We're joined here by Lucy Dai (2nd from left) of Simgui.[/caption] Eventually in 2016, ASN moved under the aegis of the SOI Consortium. We’re quite a jolly band that I have the privilege of working with. Granted at the time of this writing, the world is a difficult place, with so much uncertainty. But there are exciting times ahead with new products and technologies enabled by SOI, and you can be sure we’ll be covering them. RF-SOI will continue its juggernaut path in 5G mmWave. FD-SOI is steadily defining the new mainstream at the edge. The huge amounts of data the world is generating is driving photonics (which is all about SOI) to new heights. SOI for power (meaning high-voltage – think smart power) and imagers continues to grow. [caption id="attachment_32045" align="alignleft" width="99"] That's me - Adele Hars, ASN Editor-in-Chief - at the SOI Consortium's 2019 FD-SOI Symposium. (Photo courtesy VeriSilicon)[/caption] I’m honored to have brought you ASN for the last 15 years. Our archives are truly a treasure trove, and our mailing list of over 2500 really is an industry who's who. We’ve published well over a thousand (!) pieces in that time, most of which I’ve written with guidance from many an expert. However, we of course encourage our readers to pitch stories and/or submit SOI articles for publication consideration - so please, don't hesitate! I want to thank you all for your interest and your continued support. And thank you especially to all the SOI experts out there who so generously – and so patiently – share their time and enthusiasm with me and our readers. Stay safe! With warm regards, - Adele P.S. If you're not already on our emailing list and would like to join, just fill in the form at the bottom of this page. Thanks!

The SOI Consortium’s next annual event in Japan takes place on the 30th and 31st of October in Yokohama. Both days of the SOI Design Symposium will take place in the Yokohama Landmark Tower. The event is complimentary, however pre-registration is required – just follow the link here. Rest assured that in addition to the excellent program, the agenda provides ample time for networking.Wednesday, October 30 -- RF and ULP on SOI: IP ProductsOctober 30th showcases industry leaders with ULP IoT applications by NXP, and opportunities in the RF space by STMicroelectronics and Toshiba. The strong development of the design and EDA platform is discussed by ARM, Silvaco, Attopsemi and Dolphin. GlobalFoundries will present on their predictive reliability platform for RF, while Incize discusses the criticality of RF characterization and Secure-IC addresses to important topic of IC security.The day finishes with an overview of the SOI ecosystem by the SOI Industry Consortium. (See the full agenda here.)Thursday, October 31st -- SOI Enabling Photonics and Power InnovationWe start the day with two keynotes on High Voltage SOI electronics for automotive by NXP followed by Soitec on engineered substrate solutions. The Silvaco overview on RF modeling and SOI NB-IoT by SITRI promises to be very interesting. Then the day will offer a deep dive into Photonics touching applications with Cisco, foundry offerings with TowerJazz and GlobalFoundries, EDA with Cadence, and advanced SOI Photonic solutions by Leti-CEA. An ecosystem and market outlook by Soitec wraps-up the day. (See the full agenda here.)We look forward to seeing you there!

The 45th (yes!) IEEE SOI Conference takes place 14-17 October 2019 in San Jose. Now called S3S –since it also covers 3D and subthreshold – it’s a networking event par excellence: a unique opportunity to meet firsthand the movers and shakers in the SOI ecosystem and the giants of R D. As always, it has a strong technical program you won’t want to miss. Plus this year there’s a full-day short course dedicated to FD-SOI design, and half-day tutorial on RF design. Get all the details and registration info at http://s3sconference.org/.The SOI Consortium’s own Executive Co-director Jon Cheek of NXP is one of the keynoters. In fact the consortium membership is extremely present at this event, with over half our member organizations having a hand in it. There’s a plenary talk by GF’s CTO/VP Subramani Kengeri, keynotes by ST Fellow Andreia Cathelin and NXP Fellow Rob Cosaro, and invited talks from Arm, Samsung and Dolphin Design, for example. And this year’s General Chair is Incize CEO Mostafa Emam. Focus Sessions #12 and 13 are all about FDSOI Platforms and Products, with invited speakers from Renesas, NXP, ST, ARM, GF, Huali and Dolphin Design, while focus Session #2 is all about RF-SOI. Here’s the agenda for the FD-SOI Design short course (which takes place on Thursday, 17 October):Short Course Opening and Welcome Philippe Flatresse, Business Development Marketing Director, Dolphin DesignGLOBALFOUNDRIES 22FDXTM Technology and Body Bias Compensation to Enable New Design Optimization Strategies Joerg Winkler, Fellow Design Engineer, GLOBALFOUNDRIESEmbedded Flash Memory Technologies and Applications in Advanced Nodes Memories Koji Nii, Vice President, Global Marketing Sales, Floadia CorporationEnabling the Adaptive Body Bias in Modern IoT Applications Vincent Huard, CTO, Dolphin DesignSoC Design Realization with Adaptive Body Bias Kripa Venkatachalam, IC Design Practice Director, Mentor Graphics Didier Roland, Application Engineers Manager, Mentor GraphicsAnalog Design Techniques for Microprocessors in FD-SOI: Power-Management, PVT Monitoring and Data Conversion Edevaldo Pereira Da Silva Junior, Senior Principal Engineer, NXP Semiconductors MPU/MCU R DLow Power Solutions for SoC Architectures Antonio Pullini, Senior Hardware Designer, GreenWaves TechnologiesSOI to RF Sidina Wane, CEO, eV-technologiesIf you know the way to San Jose, you'll want to be at S3S 2019, for sure!

The recent SOI Consortium’s FD-SOI and RF-SOI events (Shanghai, September 2019) were record-breakers, with attendance approaching 1000 over the two days. The event was extensively covered in the China tech press, which often cited the opportunities SOI-based technologies offer for technology leadership. Indeed, as SOI Consortium Executive Co-Director Carlos Mazure noted in a follow-up press conference, the SOI technology drivers dovetail perfectly with the semiconductor industry’s top growth drivers*: IoT, 5G/smartphones, AI/ML and automotive. Here are the takeaways he cited from the China events:SOI for AIoT, consumer and automotive: the FD-SOI ecosystem is in place (substrate supply, foundry offering, EDA and design IP). The 1st wave of adoption is ramping at NXP, STMicroelectronics, Sony, Rockchip, Synaptics, Renesas and more Fast followers are lining up, with the number of tape-outs increasing at Samsung and GlobalFoundries SOI for 5G: development is driven by the need for low cost, low latency and high data throughput the SOI ecosystem for 4G/5G technologies is in place with a strong market pull RF-SOI, the reference FEM 4G technology, will extend its benefits to sub-6Ghz: low power consumption, high linearity, low insertion loss, co-integration of RF components. 5G mmWave requirements are addressed by multiple SOI platforms (RF-SOI, PD-SOI and FD-SOI) enabling integrated analog mixed signal solutions at low power consumption. Two RF-SOI luminaries were honored at a post-event dinner sponsored by China wafer purveyor, Simgui. Jim Cable, Chairman and CTO of pSemi, a Murata Company, and Herb Huang, CEO and GM of Ninbo Semiconductor received awards for their contributions to the advancement of RF-SOI (more on this later). There’s an enormous amount to tell you about from the conferences, so this will be the first round-up post of several.Gitae Jeong, SVP, Samsung Electronics (Courtesy: VeriSilicon live.photoplus.cn) But briefly, in his talk entitled, "IoT Platform with FDSOI", the main points made by Gitae Jeong, SVP, Samsung Electronics were: 28FDS is fully mature. It has the same design rules as bulk, has an integrated security key, a wide range of packaging options for IoT, and a design guide that makes back biasing easier and simpler with complete IP solutions. 18FDS development is on track for this year, with 14nm BEOL and a 35% increase in performance, a 55% decrease in power (!) and a 35% decrease in area compared to 28nm. 1st products are now shipping with eMRAM on 28FDS with yields over 90%, operating temperatures have been extended to 125C for automotive, and a 1Gb version has been demo’d. 1st 5G products mmWave products on 28FDS are now available Americo Lemos, SVP, GlobalFoundries (Courtesy: VeriSilicon live.photoplus.cn)In his talk, "Leading Industry Innovation by Differentiated SOI-based Solutions", key takeaways made by Americo Lemos, SVP, GlobalFoundries included:They have leadership in RF-SOI, with over 50 billion chips shipped 22FDX (FD-SOI) is in production. Last year they had 14 tape-outs, this year they had 26 – half of which are for companies in China. By the end of this year they’ll have shipped 100 million good dies to customers, marking the full transition from ramp to volume. In the ecosystem, they’ve got 285 IP titles from providers worldwide, with more announcements coming soon. Work continues on 12FDX – more to come on this. Edge AI is the next growth engine for IoT, combining vision + voice + audio, with China coming in strongly with ultra-low-power design for home connectivity, industrial, personal and medical applications. The RF-SOI day was lead off by the reading a letter from Dr. Xi Wang. The leading proponent of SOI in China for over a decade as head of the Shanghai Academy of Sciences, he’s now the country’s Vice-Minister of Science Technology. Until this year, he’s always had the first keynote at the SOI Consortium events in China, but this time he was in a meeting with the VP of Russia. However, his warm letter confirmed his support for the SOI ecosystem, especially the role of SOI-based technologies for China in the 5G era. Danni Song, China Mobile Project Leader. (Courtesy: Simgui live.photoplus.cn) This was followed by a talk by the ever popular and insightful Project Leader Danni Song of China Mobile, the largest of the operators there. China issued 5G licenses in May 2019 as the country gears up for 5G commerce. By next year, 5G will be deployed in all cities above the prefecture level. For now, it’s all about sub-6GHz. The challenge, she noted, is in power consumption, which is 2-3x that of 4G in base stations and devices. They see two development spaces: one for consumer and one for verticals, and have teamed up with Sprint on a 5GS (S being for Superior) module. They released a basic modem chip and dongle in June, and a smart chip is coming. She suggests people consult the China Mobile white paper on 5GS for more info. We’ll cover the many other presentations over the next few weeks – so stay tuned! --------*as cited in a 2019 CEO survey by KPMG/GSA.

ASN had a chance to talk to François Brunier of Soitec, who’s leading this important project.Advanced Substrate News (ASN): Can you tell us briefly about OCEAN12?Francois Brunier (FB): OCEAN12 stands for Opportunity to Carry European Autonomous driviNg further with FD-SOI technology up to the 12nm node.Francois Brunier, Partnership Program Manager, Soitec.OCEAN12 deals with “Ultra-low power computing solutions for automotive and aeronautics using all the range of FDSOI technologies”. This project with a budget of 103M€ brings together 27 partners from 7 different countries. The project received the ECSEL JU* label under the 2017 call. ECSEL is an EU-driven public-private partnership enabling the co-financing of innovation in electronic components and systems both by Member States and the European Union.ASN: Why is this project needed?FB: As of today a car has around 500 million transistors. These electronic components represent already an important vector of valorization and differentiation for the automotive industry and for the consumer. The increased autonomy of the vehicles will require a very strong build-up of computational capacities. 50 to 100 times more transistors could be required for a level 5 (fully autonomous car). Following this trend an autonomous car will require power consumption equivalent to 50 to 100 computers running continuously (without taking into account the car propulsion).The OCEAN12 partners.The power consumption of these components becomes a key element in the choice of technologies. We believe that our technologies on SOI present the best assets to meet this challenge.The FD-SOI substrates, technologies and designs developed in OCEAN12 offer a palate of different solutions to this challenge: increased performance for data processing (including Artificial Intelligence); much higher energetic efficiency; and smaller form factors to fit in embedded systems like autonomous cars with higher integration and reliability, and enabling safe connectivity.The OCEAN12 project will demonstrate that SOI technologies are able to meet these challenges through relevant demonstrators in the targeted fields.ASN: What are the project goals?FB: OCEAN12 will bring concrete solutions to the main challenges of smart connectivity and low power consumption in the automotive industry.As such, OCEAN12 will build awareness around the key enabling technologies in substrate development, transistor behavior, and the design and fabrication of integrated circuits up to the system and end-user application levels. We will show that the technology is advantageous for automotive and aerospace applications, which are strategic sectors for Europe. Having the whole supply chain in Europe means having trusted and secured components made in Europe.The OCEAN12 project goals stand on three pillars:First: Confirming the technology foundation. Ocean12 puts the FD-SOI substrate and device developers in direct contact with the full value chain of suppliers and end users. This gives the entire ecosystem visibility into current and future needs, and ensures that substrate and device solutions are both technically feasible and correctly aligned with actual system requirements.Second: Creating concrete, innovative demonstrators in automotive (Audi, Bosch) and aeronautics (Airbus, Thales). These demonstrators are a first step in defining the context and environment to prove the advantages of these technologies in real application cases, showing they are useful and as such prefigure a final system and a potential future product roadmap. Demonstrators should be as close as possible to the final application.Third: Broadening the design ecosystem, with the big companies, the small- and medium-sized companies (SMEs) and the research organizations (universities, RTOs). We have a critical mass of 16 design ecosystem partners focusing their efforts on FD-SOI. The project leverages that dynamic FD-SOI design ecosystem for IC product migration to FD-SOI and the creation of new IP. Inventing the future components in Europe is also key.ASN: Can you tell us more about the demonstrators? When will we see them?FB: There are four demonstrators. All these demonstrators will be delivered by the end of the project in 2021:Always-on wake-up systems (Audi, Bosch, Leti). With such a system we can imagine an application to monitor our car when it is parked in a parking lot for a long time. The sensors would remain aware of everything that goes on around the car. Based on sensor observations, the car can make decisions on further actions to take. This can be used in many future car applications like intrusion detection or vehicle access systems. But you will not have to worry about battery drain: even though all the sensors are always on, they go right back into a very low-power sleep mode thanks to FD-SOI technology.mm-Wave integrated radar SOCs (Bosch and Audi), which will benefit from all the innovations of FD-SOI thanks to its low consumption properties, but also the optimization of the sensors. The performance gain is made over the entire system with adaptations between analog and logic.High-performance video processor for aeronautics. (Airbus, Thales, Kalray). Kalray, a French SME working on Massively Parallel Processor Arrays (MPPA) aims to demonstrate an ultra-low power, low-cost, high-performance neural processor on FD-SOI technology. This demonstrator would be key for Airbus and drones with high-performance, low-power cameras. Airbus and Audi have partnered on air and ground mobility services.Microcontroller plug-and-play board. This demonstrator lead by ST will allow for the development of new solutions in the domain of GNSS/GPS.ASN: Can you tell us more about the partners?FB: The OCEAN12 consortium of 27 partners involves 8 large groups, 9 SMEs and 10 universities/RTOs. These partners come from 7 different European countries.The eight large groups include: Soitec, the world’s leading provider of FD-SOI substrates; EVG, a leading global equipment supplier; GlobalFoundries and STMicroelectronics, the two major European FD-SOI foundries; and Bosch, as a Tier 1 automotive supplier. At the top of the value chain, high-end European automotive manufacturer Audi, the avionics industrial giant Airbus, and Thales for security issues, will develop product demonstrations.Ten highest-level research institutes support the industrial consortium. They include CEA-Leti (FR), Fraunhofer(GE), IMS (FR), INP Grenoble (FR), TU Dresden (GE), U. Paderborn (GE), Bundeswehr U. Munich (GE), Eberhard Karls U. Tübingen (GE), Instituto de Telecomunicações (PT), and Warsaw UT (PL). They increase the competitiveness through technological innovation and transfer of technical know-how while gaining new expertise working with global leaders.In addition, OCEAN 12 has a very strong SME consortium covering the supply chain in the fields of new equipment, IP, system integration and fabless companies. They include: IBS, UnitySC (HSEB), MunEDA, Kalray, AED Engineering, ISD, EVOTEL, M3 Systems and Design Reuse.All these partners have longstanding experience of cooperation in various national and international frameworks and are specialists in their fields of activity. Their contributions are essential for the success of the project.ASN: What is the timetable?The OCEAN12 kick-off event at Soitec’s headquarters near Grenoble.FB: The project started on April 1st 2018. The kick off with all the partners was held at Soitec on 29 September 2018. It was a great success. The project runs through December 2021, by which point everything has to be demonstrated.ASN: Can you clarify the funding structure?FB: The budget is about €103.6M. If the project succeeds, we get European Commission funding. In that case, just over 20% of the eligible cost – about €23M – is subsidized at the European level. The seven countries with companies or organizations participating in the project will then roughly match the European subsidies, contributing about €27M. These ECSEL-type public-private projects are a tried and true model in Europe, maximizing synergy across ecosystems. To conclude, in the name of the consortium I’d like to thank the ECSEL JU, the European Commission and our National Funding Agencies from France (DGE), Germany, Portugal, Greece, Spain, Austria and Poland. Such a project would not exist without them.______*ECSEL JU: Electronic Components and Systems for European Leadership Joint Undertaking

2019 will be a busy fall for the SOI Consortium and our members.First off are the SOI Consortium events in Shanghai and Tokyo, which are very popular indeed. We now have the dates locations locked in, so you’ll want to mark your calendars:Shanghai: 16 17 September 2019, FD-SOI Forum / RF-SOI Workshop. Both days will be held at the Pudong Shangri-La Hotel in Shanghai. The first day will focus on FD-SOI. The second day is all about 5G and RF-SOI. These are huge events – to get an idea of the magnitude, you can read our coverage of the 2018 event. Tokyo: 30 31 October 2019, Japan SOI Design Workshops. This year both days of workshops will take place in the Yokohama Landmark tower. The first day will be devoted to FD-SOI; the second day turns to More-Than-Moore – especially photonics and MEMS. Last year’s workshops were packed with excellent presentations and panel discussions, which we covered here. The SOI Consortium and members will also be giving talks at Semicon Europa, which is being held 13 – 15 November 2019 in Munich, Germany. The programs are currently being finalized. As soon as they’re ready, we’ll be sure to let you know so you can register and/or share the news with your colleagues and clients. But in the meantime, make sure you save the dates.Would you like to check out the presentations given at Consortium events in previous years? If you hover your cursor over the Events tab at the top of our home page, you’ll get a drop-down menu of events for the last five years (we’re working on adding more – we’ve been doing these events for over a decade!). Click through to any past event and you’ll land on a page where you can download most of the presentations that were given there. Of if you’re looking for past presentations given by any particular company, use the search engine at the bottom of any page on our website. S3SYou’ll also find many of our members at the IEEE/EDS S3S Conference in San Jose, CA, October 14 – 19th. S3S (formerly known as The SOI Conference) has been running in various forms for over 30 years. They always have an excellent line-up of speakers, plus it’s a great opportunity for networking with researchers from across the worldwide SOI ecosystem. BTW, while the deadline for general paper selection has already closed, papers of exceptional merit are currently being accepted for their Late News Sessions. See the 2019 Call for Papers for more information – those Late News papers need to be received by 23 August 2019 for consideration. Also, IEEE S3S Conference will once again host a full-day short course and a half day tutorial. These are very popular. The short course this year will be on SOI Design and Technology for Analog and Mixed Signal. As of this writing, the program is still being finalized, but more will be announced in the next few weeks, so check back on their website soon for updated information.Member EventsAnd finally, don’t forget to learn more about the offerings from and in support of the SOI ecosystem at our members’ events around the globe, including: GlobalFoundries – GTC | Samsung Foundry – SFF | ST – Technology Tour | Synopsys – SNUG | Cadence – CDNLive | Silvaco – SURGE | Arm – TechCon | NXP – Tech Days | Leti – Events | imec -Events |

If you’re going to Semicon West this year, be sure to attend the SOI Consortium’s workshop on how IoT is driving the SOI supply chain. There’s a great line-up of speakers – see the program below. IoT means many things to many people but everyone agrees it’s here and growing quickly. IoT, including machine learning and movement to the edge, is fueling innovation as the high compute and ultra-low energy requirements are pushing technology to deliver on these needs. The well-known characteristics defining IoT of “Sense”, “Compute”, and “Act” put additional burden on technology to full these requirements across a variety of use cases and environments without sacrificing reliability or quality. All the various forms of SOI technology from FD-SOI to High-Voltage to RF-SOI, are uniquely situated to deliver on the promise of today’s as well as tomorrow’s IoT roadmap. The supply chain for all forms of SOI technology is in place. This workshop will discuss the current and future solutions from a supply chain perspective.Speakers include experts from SOI Consortium members Applied Materials, NXP, GlobalFoundries and Soitec.Entitled The Internet of Things, Driver of the SOI Supply Chain, the workshop will take place at the Moscone Center South, Wednesday July 10th in Room 301. It will run from 1 pm until 4:30 pm. Anyone and everyone who is registered for Semicon West is welcome. Here is the sign-up page.It’s a great program: 1:00pm - Welcome by Semi1:10pm - IoT/AI/Edge Market – Using SOI Through-out, Jon Cheek, Senior Director, NXP1:35pm - The SOI Opportunity, Manish Hemkar, Director, Semiconductor Products Group, Applied Materials2:00pm - The Foundry IP Ecosystem, Jamie Schaeffer, Sr. Director, GlobalFoundries2:25pm - Engineered Substrates - Enabling the IoT Revolutions, Eunseok Park, Director, Emerging Technology in Strategic Marketing, Soitec 2:50pm - Enabling the SOI Era, Thomas Uhrmann, Head of Business Development, EVG3:15pm - Panel: The Internet of Things, Driver of the SOI Supply Chain, Moderator: Carlos Mazure, Chairman, SOI Industry Consortium. Panelists include:Manish Hemkar, Director, AMATYoshio Kitahara, President Managing Director, Kokusai EuropeThomas Uhrmann, Head of Business Development, EVGJon Cheek, Sr. Director, NXPThomas Piliszczuk, EVP Strategy, SoitecJon Kretzschmar, Manager of Product Sales Marketing, TEL America4:05pm - Closing remarks, Carlos Mazure, Chairman, SOI Industry Consortium4:20pm - EndThis is a great chance to learn more about SOI and the SOI Consortium. Don’t miss it!And while you’re at West, you should also check out a related event. SOI Consortium member Leti will be teaming up with Fraunhofer for a workshop entitled New Paradigms in Microelectronics–Providing R D for the 21st Century. That happens at the nearby W Hotel in San Francisco on Tuesday, July 9th at 5:00pm. Click here for more information on that.

Join us! In partnership with our members, the SOI Consortium is co-organizing and participating in two key SOI events coming up in China over the next few weeks. On May 18th, we’ve put together an SOI Forum at the World Semiconductor Congress (WCS) in Nanjing. And on May 23rd 24th, we’ve teamed up with our members SIMIT, Sitri and Leti for another in our series of SOI Academies, including an FD-SOI Training Day. (The last one this past winter was a terrific success – read about that here if you missed our coverage at the time.) QR code for WCS, Nanjing '19At WCS, the SOI Forum (sub-forum #8) is part of the afternoon Innovation Summit. We’ll cover the broader SOI ecosystem, including both RF-SOI and FD-SOI – from wafers to design through manufacturing. Presentations will be given by members of the SOI Consortium team, and by leaders from our membership, including Simgui, NXP, Incize, ST, IBM, Cadence and Xpeedic. Click here or scan the QR code for the full program and registration information. Also at WCS, SOI Consortium member VeriSilicon will be participating in a morning session on AI and IoT Wireless Communications (sub-forum #4). They’ll be giving a presentation on their low-power Bluetooth design platform for GlobalFoundries 22FDX, and their CEO Wayne Dai will be moderating a round-table discussion. You can get more information on that (in Chinese only, tho) here, or follow VeriSilicon on WeChat. QR code for SOI Academy and FD-SOI Training, Shanghaid 2019The SOI Academy in Shanghai is an opportunity for experienced designers to gain solid expertise in FD-SOI. The event begins in the afternoon of May 23rd with a series of informative plenary talks by members of the SOI Consortium team, and by experts from our members Leti, Soitec, VeriSilicon, GlobalFoundries and NXP. The FD-SOI Training starts the next morning, on May 24th.. This is a hands-on event lead by top experts from Leti. The morning is devoted to digital design in FD-SOI, and the afternoon to RF design (including for 5G) in FD-SOI. Attendees will get a comprehensive understanding of design techniques for low-power chips leveraging the multiple benefits and flexibility of FD-SOI technology. Get more information here, or from the WeChat QR code.We've got a busy schedule! To keep up to date with where we and our members will be promoting the SOI ecosystem, be sure to check our Events page regularly.

Key takeaway #2: If you need a Goldilocks process node – where you'll get just the right balance between active power, unit cost and investment – look to FD-SOI. And, btw, the IP landscape has improved dramatically. Those were just some of the great points made by Huibert Verhoeven (shown above), GM/SVP of Synaptics' IoT Division in his talk at the recent SOI Symposium in Silicon Valley.BTW, if you missed part 1 of our coverage --Silicon Valley SOI Symposium a Huge Success. Key Takeaways (Part 1) Here. – you’ll want to be sure to read it, too. Almost all of the presentations are now posted on our website – click here to access them.In this post here, we’ll cover presentations by Synaptics, GlobalFoundries, STMicroelectronics, Anokiwave and Dolphin Integration. It was a really full, day, so be sure to stay turned for Part 3 of our coverage to follow shortly: it will highlight the remaining presentations and panel discussions.Synaptics: Smart Home at the EdgeSynaptics’ Verhoeven’s presentation Revolutionizing User Experience Through Secure Neural Network Acceleration at the Edge was about Smart Home and using SOI. Synaptics is a human interface (HMI) company that’s been doing neural networks since 1986. They’ve always been on the leading edge, from their first shipment of PC touchpads to becoming a dominant force in all things HMI today: they now ship over a billion units annually. Synaptics slides 15 16 from the SOI Symposium, Silicon Valley 2019.They currently have SOI products shipping with dedicated neural networks for voice, he said. European [privacy] regulations have played a part in driving their use of SOI, as have challenges regarding power and heat. Things are getting smarter at the edge. For example, not only do users want their coffee machine to offer the usual morning espresso, Synaptics says that the next step is for your coffee machine to recognize you’re looking extra tired and ask if you might want a double?! For them Smart Home and multi-modal applications are the primary area of interest, as well as some automotive. Although their biggest customers have resources, others need guidance. Voice is a critical component, but now you also need video and display.Why SOI? Their HMI vision requires low power, significant computation and dedicated neural network hardware, explained Verhoeven, so FD-SOI with RF meets their needs. “22nm SOI is a Goldilocks IoT Process Node,” he proclaimed. It gets the combination of active power, unit cost and investment just right. What’s more, he said, “The IP landscape has improved dramatically. Our choice of SOI was not an accident.” Be on the lookout for more products leveraging FD-SOI over the next six months, he concluded. At this point on SOI, they’ve got 1 TOPS products with dedicated NPU for speakers, soundbars, Wi-Fi mesh, appliances, STBs and smart displays. These products have voice and sensor real-time (RT) AI. Next up is 4 TOPS on SOI with dedicated NPU, targeting STBs and smart displays with voice, video, imaging and RT AI. GF: World-Changing OppsGlobalFoundries slides 6 7 from the SOI Symposium 2019, Silicon Valley.“Our clients are at the forefront of changing the world,” declared Mark Granger, VP of the Automotive Product Line at GlobalFoundries. His presentation, Capturing High Growth Market Opportunities with SOI, detailed how mobility, automotive and IoT are the growth markets for SOI. So not unsurprisingly, GF’s 22nm FD-SOI technology, 22FDX, is seeing particular traction in mobile, edge, wearables and automotive. They’ve got twice as many tape-outs this year as they did a year ago, he noted. GF’s SOI portfolio includes 22FDX®, 45RFSOI and 8SW/7SW RF SOI for 5G/mobility; 22FDX for automotive (fully qualified for automotive Grade 2, with Grade 1 on the way); and 22FDX, 130RFSOI and 8SW/7SW RF SOI for IoT. GF has announced a stream of good news recently:with Dolphin Integration they’re delivering differentiated FD-SOI Adaptive Body Bias Solutions for 5G, IoT and automotive applications;they’ve crossed the billion-dollar design win threshold with 8SW RF SOI technology; they’ve collaborated with Synopsys to develop the industry’s first Automotive Grade 1 IP for their 22FDX process;and they worked with Rambus on the delivery of High-Speed SerDes on 22FDX® for communications and 5G applications.You might have heard about the Dolphin Integration news, as we covered it recently here at ASN (if not, be sure to read it here). Dolphin’s IP and methodology solutions address energy efficiency challenges. Automated transistor body biasing adjustment can achieve up to 7x energy efficiency with power supply as low as 0.4V on 22FDX designs. At the Silicon Valley event, Dolphin Integration CEO Philippe Berger provided additional information in his talk, FD-SOI IP Platform for Energy-Efficient IoT SoC. Dolphin Integration slides 5 6 from the SOI Symposium 2019, Silicon Valley.In another GF-related talk, Nitin Jain, the CTO of longtime GF RF-SOI customer Anokiwave presented Unleashing the mmWave Phase Array Using SOI for 5G Satcom. Anokiwave is a fabless semi IC company (you’ll find a good technical discussion of mmWave phase array written by their Chief Architect here). They do active antennas (aka phased array), something the military’s done for a long time, but now Anokiwave is bringing it to new markets and applications including radar, satcom and 5G. What they’ve been able to do is planarize the active antennas. They use GF’s 45RFSOI process technology for phased array systems because of the cost, performance, scalability and system enhancements it enables. 45RFSOI, he explained, is ideal for beam-forming FEMs (including the switches, LNAs and PAs). The move to 5G/mmWave is going to require a lot of antennas, so these Anokiwave ICs are headed to high volumes, concluded Jain.Stellar by STAs Roger Forchhammer, Director of Business Development at STMicroelectronics pointed out in his presentation, Automotive FD-SOI Microcontrollers with Embedded PCM, ST pioneered FD-SOI (and that was almost a decade ago, btw). Then in February 2019, they announced a world first: they’d begun sampling 28nm FD-SOI microcontrollers (MCUs) with embedded non-volatile memory (eNVM) based on embedded Phase-Change Memory (ePCM) to 10 alpha customers. These MCUs target powertrain systems, advanced and secure gateways, safety/ADAS applications, and vehicle electrification.STMicroelectronics slides 9 10 from the SOI Symposium 2019, Silicon Valley.(In case you want technical details, the breakthrough ePCM eNVM was first presented at IEDM in December 2018 – you can get the presentation that accompanied the paper, Truly Innovative 28nm FDSOI Technology for Automotive Microcontroller Applications embedding 16MB Phase Change Memory, from the ST website.)In his Silicon Valley presentation, Forchhammer said they’re now doing Stellar, a whole family of automotive products on FD-SOI. To do it, they’d taken an existing device and moved it to 28nm FD-SOI with ePCM, which they manufacture at their fab in Crolles, France. A major advantage for automotive he cites is that in software updates it’s bit-level programmable. “ST is fully behind FD-SOI,” he concluded, adding that we’re see more automotive as well as IoT products coming soon. Well folks, that’s all for this post. We’ll finish up our coverage of the SOI Consortium’s 2019 Silicon Valley Symposium in the next ASN post (there was so much to cover!). So please stay tuned.

Takeaway #1: As NXP VP Ron Martino noted in his opening keynote at the recent SOI Symposium in San Jose, FD-SOI is the technology platform for enabling edge computing, and ultra-low power is the sweet spot. Organized by the SOI Consortium with support from our members, the recent SOI Symposium in Silicon Valley was an enormous success. Close to 300 decision makers signed up – more than double what we saw just a couple years ago. Attendees spanned the ecosystem: from end-users to design to foundries and right up to the investment community. The presentations and panel discussions were absolutely terrific, and almost all are now freely available - click here to get them.The focus was heavily on FD-SOI this time, but some very interesting RF-SOI talks were given as well. This was a day packed with presentations by players from across the SOI ecosystem. In this post, we’ll only cover a few. But the others will follow quickly, so watch this page. And now without further ado, let’s dive in.NXP: In the Sweet SpotNXP VP Ron Martino presenting at the 2019 SOI Symposium in San Jose.NXP is designing FD-SOI into many new products, said Martino, GM of the i.MX Processor Application Product Line. There’s a new wave of products – generically you could call them IoT but in fact they’re found throughout the industry. It’s about interacting with the cloud, so edge processing is critical. His presentation, Embedded Processors for Future Applications, is now freely available for downloading from our website.The new i.MX7ULP is a great example of ULP in the sweet spot. From a design standpoint, it leverages IP, power optimization, and what he described as “starter biasing”. That gets them the long battery life with 2D 3D graphics they need for wearables and portables in consumer and industrial applications.NXP slide 10, SOI Symposium, San Jose '19 (Courtesy: NXP)Having deepened their expertise in biasing, NXP has now moved on to “advanced biasing” for the next generation of products. For example, the i.MX RT ULP (real-time, ultra-low-power) series are “cross-over” processors, which Martino says are the “new normal”. They deal with a high number of sensor inputs. The i.MX RT 1100 MCUs, which have been qualified for automotive and industrial applications, are breaking the gigahertz performance barrier with a low-power, 28nm FD-SOI process.Another new product leveraging advanced biasing is the i.MX RT 600. They’ve done hardware acceleration on specific functions and optimized around visionand voice integration at low cost and power.As shown at Embedded World '19, automotive app for NXP'x i.MX 8, which is on 28nm FD-SOI. (Courtesy: NXP)Likewise for the i.MX 8 and 8X subsystems for automotive and industrial applications. At Embedded World, they showed it driving advanced OLED screens, cameras (for parking, for example), V2X, audio, user monitoring (like driver pupil tracking), and integration into the windshield in a heads-up system. This is the high end of the capability of 28nm FD-SOI, he said. It’s a 6 CPU core system with multiple operating systems, about which he said: “It’s the dashboard...it’s amazing.”BTW, in another presentation, CoreAVI, which builds avionics, automotive and industrial products on NXP’s i.MX 8, addressed safety. You can get that here.FD-SOI enables a scalable solution for real-time and general compute with the lowest leakage memory, the best dynamic and static power, Martino concluded. NXP’s leadership in body biasing is enabling edge compute, and we can expect to see more content coming soon.In another NXP presentation later in the day, Stefano Pietri, Technical Director of the company’s Microcontrollers Analog Design Team caught a lot of people’s attention. A wave of cameras went up to capture each of his slides in Analog Techniques for Low Power, High Performance MPU in FD-SOI – but you can get the whole thing now from our website. It’s a very technical presentation, in which he details the many ways FD-SOI makes the analog team’s job easier, enabling them to get performance not available from bulk technologies. They developed a lot of in-house expertise and IP (see slide 16 for a catalog of the IP).Samsung: Enabling LP Endpoint ProductsTim Dry, Samsung Foundry Director of Edge Endpoint, SOI Symposium, San Jose '19Tim Dry, Director of Foundry Marketing: Edge and End Point presented Samsung’s FDS with MRAM: Enabling Today’s Innovative Low Power Endpoint Products. In a telling first, Samsung has made this presentation available on our website.FD-SOI covers the wide range of requirements for intelligent IoT, he explained: from high to low processing loads; and active to dormant processing duty cycles. That includes chips that will last for ten years, and need to be able to wake up fast and kick right into high performance. These products are 50% analog, and packaging is part of the solution (especially for the RF component).Samsung has been shipping 28nm FD-SOI (which they call 28FDS) since 2015, first in IoT/wearables, then in automotive/industrial and consumer. Yields are fully mature. In March 2019, they announced mass production of eMRAM on 28FDS. It’s a BEOL process, adding only 3 masks. It cuts chip-level power by 65% and RF power by 76% over 40nm bulk with external memory. Beyond the fact that it's 1000x faster than eFlash, eMRAM also has other advantages that make it especially good for over-the-air updates, for example.Samsung Foundry FD-SOI IP slide, SOI Symposium, San Jose '19 (Source: Samsung Foundry Keynote at SOI Symposium 2019, USA)Samsung also has RF and 5G mmWave products shipping in 28FDS. The company has a fantastic ecosystem of partners helping here, said Dry. In AI at the endpoint, they’re shipping IoT products for video surveillance cameras: some are high speed, but some are also low speed – it depends on the detection use case. And most importantly for the design ecosystem, the IP is all ready.Next up for Samsung is 18FDS, which will ship this year with RF, then in 2020 with eMRAM. 18FDS, Dry said, is optimized for power reduction. Compared to 28FDS, it’s got 55% lower power consumption, 25% less area and 17% better performance at the same power. You’ll hear more about it as well as their design services if you’re at the Samsung Foundry Forum in May (registration info here).ARM’s Biased ViewsKelvin Low, VP of Marketing for Arm’s Physical Design Group (PDG) gave a presentation entitled Biased Views on the Industry’s Broadest FDSOI Physical IP Solution. By way of background, Arm and Samsung Foundry recently announced a comprehensive, foundry-sponsored physical IP platform, including an eMRAM compiler for 18FDS. In case you missed it, at the time Arm Senior Product Marketing Manager Umang Doshi described the offering in an Arm Community / Developer physical IP blog, which Arm graciously agreed to share with ASN readers. Slide 9 from Arm's presentation, Silicon Valley SOI Symposium 2019.At the SOI Symposium, Low emphasized to the audience that Arm now has the broadest range of FD-SOI + IP solutions. It addresses mobile, consumer, IoT, automotive and AI/ML. There are 18FDS POP (processor optimized pipe) packages for Arm Cortex-A55, Cortex-R52 and Cortex-M33 processors. IP integrates biasing and a number of standard PVTs (corners). And since the Samsung platform is foundry-sponsored, it’s free.Slides 6 and 11 from Arm's presentation, Silicon Valley SOI Symposium 2019. The goal of POP IP is to enable partners to implement and tapeout Arm cores with the fastest turn-around time and best-in-class PPA while maximizing the benefits of process technology.Arm did a test chip with eMRAM, which they’ve just gotten back. It’s functional (some details are available in slide 14 of their presentation), and the company is now preparing a demo board that they’ll be showing shortly. Watch this page!That's all for this post. The next post -- part 2, covering presentations by Synaptics, GlobalFoundries, STMicroelectronics, Dolphin Integration and Anokiwave -- is now available. Click here to read on.