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CAST

In the early 1990s, engineers of varying degrees of skill with a powerful PC set up shop designing and selling blocks or libraries of reusable components with a defined interface and behavior. These blocks, known as intellectual property, or IP, were then (and still are) integrated into a larger design. While the new market segment created excitement and new opportunities, it also was untested and created uncertainty. Many fledgling companies failed. It’s a different story today. Arm, as well as Cadence and Synopsys, are silicon IP suppliers and the segment’s yearly revenue tops $4 billion, a long way from those early garage startup days. ESD Alliance member CAST, a silicon IP provider since 1993, participated in the remarkable growth and impact on the semiconductor industry. Nikos Zervas, CAST’s CEO, and I discuss those early days of the IP business and what’s ahead. Smith: What were the early days of silicon IP like? Zervas: In those early Wild West days of IP, vendors and customers both wanted to benefit from IP, but nothing was standardized, and people just tried things to see if they worked. The perceived barrier to entry was low: hundreds of IP companies sprang up thinking they only needed RTL coding skills and tools, an FPGA to prototype, and a few thousand dollars to invest. IP deliverables, quality standards, and business practices varied from vendor to vendor and over time. Risk was high, and there are many horror stories of re-spins or market failures due to faulty IP cores. Smith: How has the silicon IP market changed from its early days? Zervas: Firms delivering high-quality IP and providing outstanding customer support survived. Others disappeared. Eventually the industry centered around a reasonably common sense of IP requirements and quality and a consistent set of business practices. IP product complexity has driven upwards as SoCs have grown. The largest ASICs used to approach a few million gates; today they’re hundreds of millions, and the granularity of IP has evolved from small functions to pre-integrated subsystems. Early on, a designer doing image processing might license individual functions like a Finite Impulse Response (FIR) filter or a Discrete Cosine Transfer (DCT) block. Today, instead they would license a complete JPEG compression core containing those functions and more, or even a complete black box subsystem streaming processed, stabilized, compressed video over Ethernet. IP selection criteria have also changed. Early IP was handcrafted to eliminate every extra gate, as being a few thousand gates smaller was a killer advantage in the era of 180nm ASIC processes. Today, at 7nm or 5nm process, tens of thousands gate differences are just noise, and it’s usually the reliability, functionality, and performance of an IP core that matter most. Smith: When did the silicon IP market start to take off? What was the driving force? Zervas: By the early to mid 2000s, uncertainty about what IP was and how best to use it – and the early wave of less-than-great providers – were being replaced by increasing acceptance and emerging best practices. The introduction of smartphones, the wild growth of Internet of Things applications, growing automotive system sophistication, and other advances fueled the explosion of the IP market in the late 2000s. In fact, according to the ESD Alliance Electronic Design Market Data Report, revenue from IP licensing today has surpassed the license revenue from front-end EDA tools. This would have been unimaginable in the late 1990s. Smith: How has silicon IP changed chip design? Zervas: Designers today must develop massive, complex systems with an even tighter time to market. Only the higher level of design abstraction and the distributed expertise that silicon IP provides make this possible. But IP also increases the challenge of differentiation: With the same IP available to everyone, how do you design a product that stands out in its market? The answer to differentiation today lies mainly in clever SoC architecture. Delivering better features with superior performance, lower power consumption, or other winning characteristics now depends not so much on perfecting each separate IP block but rather from selecting the best IP for the system’s requirements, integrating those IP cores for clean communication and efficient resource sharing, and other smart system-level decisions. It’s similar to modern building design: Every firm has access to the same materials and tools – concrete, glass, etc. – but only a few produce exceptional buildings. Smith: It seems that are several different business models for IP licensing, such as up-front license fees, subscriptions, royalties, or a combination of these. Do you think the IP market will gradually align around one basic model, or will it continue as is with a variety? Zervas: Different models serve different needs. For example, commodity IP like a SPI interface can’t demand royalties, but unique, leading-edge IP – like a 112Gbps SERDES – still can. I believe the market will continue with different business models, though the number of different models may shrink and their terms begin to align. About Nikos Zervas Dr. Nikos Zervas is the chief executive officer of CAST, Inc. He co-founded image and video compression IP developer Alma Technologies in 2001, and led the bootstrapped firm as chairman and CEO for nine years before joining CAST. He was a founding member of the Hellenic Semiconductor Industry Association and served on its board for several years with responsibility for strategic planning. He is a senior IEEE member and member of the Technical Chambers of Greece, had contributed to the GSIA's IP Working Group, and has published multiple technical papers on data compression design and related topics. Robert (Bob) Smith is executive director of the ESD Alliance, a SEMI Technology Community.
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RITdb is a semiconductor manufacturing database project organized as a Working Group under SEMI’s CAST (Collaborative Alliance for Semiconductor Test) Technology Community. Originally, RITdb was the “Rich Interactive Test Database” and the original goal was to create a shared architecture that supports smart adaptive testing for semiconductor makers by providing ready access to integrated, consistent, easy-to-use data across the entire manufacturing and test process. Figure 1 illustrates this process for making integrated circuits and how RITdb will collect data from the entire manufacturing flow. Figure 1: Manufacturing Flow for Making Integrated Circuits RITdb’s end goal is to enable access to any sort of manufacturing data across the life of a product from inside or outside of the factory that made the product.Adaptive test has two scopes: The Historical Scope: Make disparate data obtained from many different sources available on demand while dealing with issues of sharing, trust, and data security amongst all database users. The Immediate Scope (Now): Enable real-time decision making about processes and parts moving through the manufacturing process based on process history, results, and feedback. Figure 2 illustrates a manufacturing flow that takes advantage of the RITdb database to make real-time decisions based on test results for devices as they move onward from the immediately preceding process step and from rules that have been developed over multiple manufacturing runs using previous test data in the historical manufacturing record. Figure 2: Real-Time Manufacturing Flow that Makes Decisions based on RITdb data. Image Source: IEEE Electronics Packaging Society HIR (Heterogeneous Integration Roadmap) One of the development issues that the CAST RITdb Working Group has wrestled with is how to make data as easy to extract from the database as it is to put into the database. Many previous manufacturing database development efforts have stumbled over this goal, yet it’s imperative that data be easily accessible if it’s to be used for real-time decision making.The end goal is for RITdb to become an “interplanetary” file system, which means that the database should be distributed over both time and distance. It should be available everywhere it’s needed. In addition, the data in the database has attached metadata to permit content-aware access. The metadata allows a data-consuming application to extract just the data it needs from the database, which reduces the amount of traffic over the manufacturing networking system and speeds database transactions.Further, the database must maintain data integrity, which means that it uses hash-based naming and immutable files to make the data easy to find, so that the data-consuming application knows that the data it obtains from the database is correct, and to prevent data deletion. The database must also be secure, with access controls and encryption to protect data. Finally, the RITdb database employs versioning so that any changes made to the database can be easily tracked and traced over time.RITdb GoalsThe RITdb project has been driven by several goals: Enable plug-and-play database access so that many types of testing tools can feed data into the database in support of diverse test and manufacturing applications. Support generation of and access to real-time streaming data as well as to data previously stored in the database. Allow data from different producer tools to be merged, synchronized, and then delivered to data-consuming applications. Permit new data types to be easily added to the database without adversely affecting the existing database model. This goal allows new data types to be added to the database even before there’s an idea of how to use this new data. Integrate cleanly with the Adaptive Test Model. The Data in the LakeTo meet all of these objectives, RITdb employs a “data lake” instead of a “data-warehouse” model. The data-warehouse model is a more traditional “big data” approach to databases where data is cleaned and normalized when it’s imported into the one, large database. A database using the data-lake model stores a pool of disparate but related data, which is cleaned and normalized at the point of creation. This approach better serves the goals of the RITdb database project by allowing real-time decision making based on prepared, good data with provenance.Data provenance encompasses many data characteristics that require answers to many questions regarding: Identity: What is this data? Integrity: Who created this data, where was this data created, and is this truly the data that was created? Security: Who can access this data? Locality: Is this data grouped with other data based on some characteristic? Lineage: Where did this data come from? In addition, RITdb incorporates other features to satisfy the “Now” scope. It supports a streaming data-flow model using RITdb packets and events. It uses a real-time messaging infrastructure based on IOT bidirectional, machine-to-machine communications and the MQTT (Message Queuing Telemetry Transport) protocol, an ISO standard (ISO/IEC PRF 20922) for publish-and-subscribe messaging, and the CBOR (Concise Binary Object Representation, a serialized, binary data format loosely based on JSON) format for payload data within the messages. Finally, the RITdb streaming protocol permits real-time rules checking so that an application program can look at data streaming in from a test cell and make real-time decisions based on that data.Currently, planned submission for RITdb specification to SEMI for balloting is scheduled for 1Q19. To learn more about the SEMI CAST Technology Community, its RITdb activity, and/or to engage in this effort, please contact Paul Trio, senior manager of Strategic Initiatives) at SEMI, at [email protected] Ajouri is a systems integration engineer at Texas Instruments.
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