electron microscopy

The microelectronics industry is entering the era of Cloud Engineering Simulation to slash the costs and risks of new technology development and speed time-to-market in spaces like semiconductors, MEMS sensors, RF front ends, biomedical and driverless cars. In the run-up to SEMICON Europa, 12-15 November, 2019, in Munich, Germany, SEMI spoke with Ian Campbell, CEO of OnScale, about the new paradigm of Cloud Engineering Simulation. Campbell shared his views ahead of the SMART Design Forum, 14 November, 2019, 14:30 to 17:00, in Hall B1, TechARENA 1 at SEMICON Europa. Registration is open. Join the forum to meet experts from OnScale and other key industry influencers. Attendance is free of charge for all SEMICON Europa visitors.SEMI: How did your adventure with OnScale start?Campbell: I’m an engineer. When I was still in high school, I took a night class at Nashville Tech to learn AutoCAD R14, and I’ve been designing and engineering things ever since. I was introduced to Desktop Simulation in my bachelors of mechanical engineering program and used many types of simulation tools for massive design studies at the Aerospace Systems Design Lab at Georgia Tech. I’m a simulation junkie.I started my first Silicon Valley high-tech company, NextInput, in 2012 with Dr. Ryan Diestelhorst (now VP of Strategy at OnScale), to commercialize new ForceTouch and 3D Touch technologies based on our patented MEMS force sensors. At NextInput, we bought hundreds of thousands of dollars of engineering software, but were always frustrated by slow, inaccurate engineering simulation results. We dreamed about running massive simulations on Cloud Supercomputers and creating true Digital Prototypes that could replace costly, time-consuming, and risky physical prototypes.When I got the chance to join the team that became OnScale in 2017, I jumped at the opportunity. At OnScale, we took engineering simulation solvers that had been developed for the U.S. military to run on U.S. Department of Defense and DARPA supercomputers and built a cloud supercomputer platform on Amazon Web Services to run the solvers. The net-net is the world’s first on-demand, infinitely scalable Cloud Engineering Simulation platform. Now, we routinely run massive multi-billion degree of freedom simulations for Fortune 100 companies, including many from the semiconductor and MEMS industries. Since our business model is to charge per core-hour for simulations, the incredible capability we built is cost-effective and available to small startups as well. SEMI: How is the semiconductor design ecosystem evolving? How is Cloud Engineering Simulation applied to semiconductor and design industries?Campbell: The entire industry is experiencing a massive acceleration in product launch cycles and increased competition. New markets like IoT and 5G are reducing semi/MEMS product cycles from years to months. That, in turn, puts enormous pressure on semiconductor and MEMS designers. Missing a key product introduction like a flagship smartphone launch can literally make or break a company.A reliance on traditional engineering methods – schematic capture and layout of a chip, taping out (physically prototyping the chip), performing engineering validation on an e-bench, qualifying the chip (or not qualifying it and going back to the drawing board), and finally launching mass production – is no longer sustainable from a competitive perspective.Instead, market-leading firms are turning to Cloud Engineering Simulation and Digital Prototypes to explore massive design spaces, find optimum designs that beat the competition in every KPI (size, power, performance), and digitally qualify designs before ever cutting silicon, ensuring that designs are robust over their intended operating environments and performance envelopes. Large thermal analysis of a chip on a circuit board executed quickly on the OnScale Cloud Simulation Platform SEMI: Can you give us an example? Campbell: A great example is thermal analysis. Thermal effects have always had huge impacts on MEMS device performance and, more recently, they are beginning to impact performance of next-gen semiconductors, especially GaN power electronics for electric vehicles (EVs).Conducting a full system-level thermal analysis of something like an EV power management system – a power IC in a package, on a board, in an enclosure, under various loading conditions – has been a challenge from a simulation complexity perspective (degrees of freedom) and from a parametric sweep perspective (running hundreds or thousands of simulations to optimize chip placement, routing, etc.). To run these sets of simulations using legacy desktop simulation would take weeks, perhaps even a month or more. To run these massive simulations in parallel on cloud supercomputers using OnScale takes days or even hours.Our customers routinely run very large simulation studies on OnScale Cloud for thermal simulations, RF filter simulations, MEMS simulations, packaging simulations (what we call Digital Qualification), and many more use cases.SEMI: What’s one of your strategic objectives for 2020? Campbell: For 2020, we’re doubling down on MEMS and semi simulation capabilities. We will be launching additional solver capabilities like EM that will be critical in our strategic markets like 5G. We will also be launching a Cloud API so that engineers can integrate OnScale directly into their existing engineering workflows (e.g. MATLAB or EDA/CAD tools) with just a few Python commands.SEMI: Can you share one prediction for the future of semiconductor design solutions? share?Campbell: I think we will continue to see MEMS and semi designers push the envelope and bring smaller, more performant, more cost-effective solutions to market. I’d like to see more highly cost-effective flexible semi/MEMS designs come to market to enable next-gen IoT and IIoT applications. I’d also like to see more biomedical applications – biomems, microfluidics, and labs on a chip for all sorts of life-enhancing applications.SEMI: What are your expectations regarding the SMART Design Forum at SEMICON Europa 2019 in Munich? Campbell: I’m looking forward to getting back to my roots in MEMS/semi design and chatting with other designers about the future of engineering and the future of semi! Ian Campbell is a twice venture-backed Silicon Valley CEO and expert in MEMS sensors, semiconductor technology, and engineering software. Most recently, Ian co-founded OnScale, a Cloud Engineering Simulation startup backed by Intel Capital and Google’s Gradient Ventures. OnScale is revolutionizing engineering by combining world-class multiphysics solvers with Cloud supercomputers, machine learning, and artificial intelligence. Prior to co-founding OnScale, Campbell served as founder and CEO of NextInput, where he led the startup through multiple rounds of funding – totaling $12 million and an additional $4 million in research contracts with government and industry partners – and built a world-class team of engineers and scientists who developed 3D Touch and ForceTouch technologies for smartphones, wearables, industrial, and automotive interface applications. He also secured the first major smartphone OEM design wins in Asia. Campbell earned his B.S. in mechanical engineering from Middle Tennessee State University, and his MSAE in aerospace engineering and MBA from Georgia Institute of Technology.Serena Brischetto is senior manager, marketing and communications, at SEMI Europe.

This article is the third in a series highlighting the vital importance of SEMI Standards to commemorate the publication of the 1000th SEMI Standard in July 2019. Find the entire series here.SEMI Standards are the bedrock of the modern microelectronics industry. Without standards for wafer dimensions – which SEMI Standards first defined through a collaborative process involving semiconductor manufacturers and wafer suppliers in 1972 – the semiconductor equipment industry as we know it would not exist today. The late Robert Noyce of Intel noted in this 1992 video “being good at producing semiconductors will mean we have better, more consistent, better controlled equipment than we have in the past. Standards are going to play a vital role in that. Standards saves money and time for everyone.” Noyce also called standards a bellwether to surges of innovation in critical process technology. This is still true today as, for example, important standards-setting activity is afoot in panel-level packaging, electron microscopy and energetic materials. Will a surge of innovation follow?Panel-level packaging: a chicken-egg scenarioFrom advanced materials to more efficient production tools, one hallmark of the microelectronics industry is our fearless exploration of new technologies that will spawn change across the industry by improving performance and reducing cost. Advanced packaging techniques, such as panel-level packaging (PLP) – which moves semiconductor packaging to a larger-panel format – is one of those critical catalysts. Citing PLP’s potential to shrink costs by improving efficiency and economies of scale, research firm Yole Développement predicts a remarkable 63% CAGR for PLP from 2017-2023.[i]It’s no stretch to say that we are close to realizing a burst of innovation in packaging. With a just-published SEMI Standard (SEMI 3D20) specifying panel sizes, equipment companies will find it economically viable to invest more in developing the much-needed production tools that enable PLP. “It is really important to create standards so we come together and work much more efficiently. Creating those fundamentals allows you to be more productive in the long term,” said Christina Chu, ASM Semiconductors, and co-leader of the Panel Level Packaging Task Force, and one of five industry leaders recognized for their outstanding accomplishments in developing SEMI Standards for the electronics and related industries at the recent 1000 SEMI Standards reception during SEMICON West 2019. “This effort came up from the trenches,” said Richard Allen, NIST Quantum Measurement Division, and a co-leader of both SEMI’s 3D Packaging and Integration Committee and its Panel Level Packaging Task Force. “Equipment vendors told us that they wanted to serve the market, but they couldn’t do so without some standards. To respond to their request, our committee surveyed the market and discovered at least 15 different panel sizes in development.”“As no vendor is going to make over a dozen unique tools for the same process, we worked with the manufacturers and tool companies to write a specification that standardizes on two of the most widely accepted sizes,” Allen said. “For the first time, the industry will have a real market for panel-level packaging tools, and that will spur commercialization of new technologies that never would have seen the light of the day without standardization.”Allen pointed out that evolution of standards in microelectronics reflects the dynamism of the microelectronics industry itself. “Given the rate of technology advancement in microelectronics, SEMI Standards committee and task force members know that a newly-published standard is often just a starting point, and change will likely follow,” he said. “The Panel Level Packaging Task Force, for example, is currently determining how to best support this packaging technology, whether through possible enhancements to 3D20 or by creating new PLP standards.”Process automation is key for TEMTransmission electron microscopy (TEM) is another area where industry cooperation will fuel progress.“People throw around the phrase ‘exponential growth,’” said James Amano, senior director, International Standards at SEMI. “It’s usually a gross exaggeration, but not when it comes to TEM data. That’s because demand for more TEM data, which uniquely enables innovations around smaller feature sizes, has exploded. At the same time, TEM data is a bottleneck in the fab. Operators literally use tweezers to carry around electron microscope samples by hand, and that is untenable.” TEM sampling standards are currently being formulated under the SEMI Standards development process. “Applying a model that we have employed successfully time and time again through SEMI Standards, we are gearing up for process automation in TEM,” Amano said. “We’ll start by establishing a grid carrier standard for electron microscopy. Through ongoing standards efforts, we may realize a fully automated TEM process within just a few years. That achievement will enable exponential growth in shrinking design geometries.”Energetic materials gain safety standardAlong with wafer-level packaging and design shrinks, the push for safety in materials’ usage is a hotbed of innovation. This is especially true with energetic materials, the potentially hazardous process chemicals used increasingly in semiconductor manufacturing to spur advances in materials purity, integrity and quality.“When you’re working with energetic materials, if you don’t get it right, you may face serious yield and cost issues, and most important of all, safety risks,” said Paul Trio, senior manager of strategic initiatives at SEMI. “This isn’t a theoretical concern. Real problems occurring in fabs have made an energetic-materials standard a high priority for the industry.”“After years of collaborating with companies across the supply chain to address this significant challenge, we recently published our 1000th SEMI Standard around safe usage of energetic materials,” Trio said. “Now manufacturers can turn to a new standard – which will evolve dynamically in response to industry changes – as they employ energetic materials in their quest to achieve higher yields while controlling costs and managing safety risks.” Whether it’s packaging, design shrinks, materials or other key innovations, standards are essential to progress in microelectronics. From equipment and materials suppliers that provide the most advanced, efficient and safest tools, materials, and processes to device manufacturers that get products to market, all stakeholders in the microelectronics ecosystem benefit from SEMI Standards. Are you curious about the areas of process technology where innovations are likely to occur? Would you like to get involved in standards efforts that could have an impact on your business? Take a look at the activity of SEMI Standards Committees and Task Forces. Because that’s where innovation, pragmatism and a commitment to harness industry resources come together.Use your voice to affect standardization in and around the microelectronics industry. Learn about SEMI Standards – and become part of the solution. Heidi Hoffman is senior director of technology communities marketing at SEMI. Hoffman and her team shine a spotlight on the work of the more than 20 technology communities under the SEMI electronics manufacturing supply chain collaboration platform. Actively engaging community members in marketing programs that showcase their unique value, Hoffman’s team helps companies to grow and prosper through the power of connection, collaboration and innovation. [i] Status of Panel Level Packaging report, Yole Développement, 2018