ESD Alliance

Electronic Design Automation (EDA) is essential for the entire semiconductor design-to-manufacturing process. EDA tools streamline the design process, speed up development cycles, and ensure higher precision in chip design. Accellera Systems Initiative, an independent standards body, focuses on standards for system-level design, modeling and verification used extensively in the EDA ecosystem. These standards facilitate industry-wide collaboration and accelerate innovation, working closely with many members of the Electronic System Design (ESD) Alliance.Bob Smith, Executive Director of the ESD Alliance, recently talked with Lu Dai, Senior Director of Technical Standards at Qualcomm and Chair of Accellera Systems Initiative about Accellera’s new and future standards, and its successful global Design Verification Conference (DVCon) events.Smith: What’s new in Accellera’s standards effort since we last spoke?Dai: We are working on two new initiatives. The first and biggest initiative is our recently formed Federated Simulation User Group. Our members requested an end-to-end simulation environment or models that can be plugged into a system-level simulation environment. This challenge triggered industry-wide discussions among Qualcomm, NXP and many other semiconductor companies, especially those from Europe tied to auto and avionics industries.The need for this new standard effort is being driven by industries such as automotive where tiny microcontroller chips are traditionally used. The automotive industry has some existing simulation standards that include physical devices. With autonomous vehicles, systems on chips (SoCs) are replacing microcontrollers and handling system-level features that require rigorous system-level simulation. The user group is tasked with reviewing current automotive industry simulators and discovering how our traditional register transfer level (RTL) code- or emulation-based simulations could work with them via an interface.This effort has attracted new companies outside of the traditional EDA world. Ford, for example, is now an Accellera member and has a seat on our board. It’s exciting to see this collaboration.Functional safety is another initiative that we started a few years ago, also driven by the advancements in autonomous vehicles. Accellera’s focus is to define functional safety as a format that can be carried through the design stages from intellectual property (IP) to SoC, and from front-end design to back-end. Across the different stages of design and verification, an engineer can then confirm that the functional safety goal is maintained. We’ve published resources including whitepapers and are currently working on developing the language format. Smith: Where do you see Accellera’s next standards efforts?Dai: We have a mixed-signal standard coming out soon. It adds a mixed-signal interface to the SystemVerilog standard, currently under IEEE management because Accellera donated it to IEEE.A common question we’re asked is, “What are you doing with AI?” Accellera is a heavily EDA-centric standards body, and EDA tools are increasingly incorporating AI. AI consumes and outputs large amounts of data. A challenge is how to ensure the AI work output from one vendor’s EDA tool can propagate to another EDA tool. Accellera may look at defining an AI data format for EDA. It comes with a unique challenge because AI data is highly proprietary, both from the vendor’s and customer’s perspectives, so a robust security solution is needed. We may need to consider an interface standard, because companies may not be willing to share data, even with other groups that are in the same company. among their partners. They might need to hide the data and have a special interface to extract the data that they are willing to share. Accellera could investigate how to make AI deployment cross-vendor while allowing vendors and customers to protect their IP. Another area for potential new standards is around supply chain security challenges. This is a global issue driven in part by the COVID experience and geopolitical concerns. One possible approach is to use tagging. When a chip comes out of the fab, it would have a tag designating where it was designed and manufactured, and where the tooling is from. The tag would also include data about the regions or countries the design traveled through during the entire flow from design to manufacturing. Smith: Is Accellera looking into any standards or addressing any open-source design and verification flows?Lu: Accellera has been in the open-source domain for quite some time. Accellera has a language reference manual, user guides and reference implementations. Because many Accellera standards are related to language, we often work on libraries when a new language comes out and reference implementations to help our community deploy that standard. Reference implementation libraries are open source, as is our SystemC material. We have an active open-source SystemC community.Smith: I hear that the DVCon conferences are expanding globally. What’s driving that?Dai: Engineers enjoy attending conferences in person where they can reconnect with peers, build new connections and foster collaboration. We have regional DVCon events to bring information to our community and make Accellera more accessible to them. We now host several DVCon conferences in North America, Europe and Asia. Our next DVCon will be held in San Jose, Calif., from Feb. 24-27.Smith: How can readers of this blog post get more information about Accellera?Dai: For up-to-date information about Accellera’s activities, please visit our website: https://accellera.org/. Lu Dai is Senior Director of Technical Standards at Qualcomm and is a leader in semiconductor standards and industry organizations including Accellera. Dai holds a Master of Science degree in Electrical Engineering from Cornell, and a Bachelor of Science degree in Electrical Engineering and Computer Science from UC Berkeley.Robert (Bob) Smith is executive director of the ESD Alliance, a SEMI Technology Community.

Paul Cohen and Bob Smith of the Electronic System Design Alliance and SEMI senior director of product marketing David Ghodsizadeh joined Francoise von Trapp of 3D InCites for a podcast to discuss key takeaways from the Q4 2022 EDMD report.

Dr. Walden Rhines, former CEO of Mentor Graphics (now Siemens EDA), and current CEO of Cornami, recently joined Dan Nenni of SemiWiki.com for a podcast to discuss the latest Electronic Design Market Data (EDMD) report.

Every Friday I try to clear out my inbox. It’s a small way to feel like I’m on track with all the different projects we have going on at the SEMI Foundation. As I’m doing that, it’s rare that I’ll open a marketing email about a webinar, webcast, or industry event unless it’s incredibly compelling.One of them did catch my eye last week, from VLSI System Design for its VSDOpen2020.And the email did more than catch my eye. We jumped on the phone with the founders and ended up collaborating with them and the ESD Alliance on the event.The company specializes in training students in chip designs. That’s a great fit for the work we’re doing on your behalf at the SEMI Foundation and SEMI. And the VLSI System Design event is a free, online, one-day set of sessions that focus on designing digital and analog IP using freely available resources.If you have time on Saturday, October 10, I’d encourage you to check it out. They’ve got some great keynote speakers (see below), five IP designer tracks, educational sessions, and they’re even showcasing IP designed by students!It’s a great way to see some innovations in design, interact with students, and make some new contacts in a virtual setting. Below are more event details. Registration is now open.VSDOpen 2020 – Saturday, October 10Keynote speakers Jan Rabaey, the Donald O. Pederson Distinguished Professorship at the University of California at Berkeley, will offer a look at Computation in the Post-Moore Era: Reflecting on the Role of Open Source. Naveed Sherwani, Chairman, CEO and President of SiFive, will describe RISC-V and open source hardware – A golden opportunity for the India semiconductor industry. Michael Wishart, Co-Founder and CEO of efabless, will address Applying Community Models to ICs: Why and How. In addition, Jeremy Bennett, Chief Executive of Embecosm, will deliver an industry talk on A brief history of open hardware: Learning from the free and open source software movement. And Sunita Verma of the Ministry of Electronics and Information Technology will give a presentation on India’s initiatives in electronic system design and manufacturing.There are also networking opportunities for designers, researchers, tool developers, and students. If you want to go deeper, join the lab-based workshops offered in the three days (Oct 7-9) leading up to the event.Check out the full program for more on specific sessions.Shari Liss is executive director of the SEMI Foundation. She oversees SEMI Workforce Development programs from K-12 through re-skilling for veterans.

Artificial intelligence and machine learning are reshaping electronic system design as consumer-facing companies like Facebook and Google design their own hardware. Electronic system design is enabling rapid changes and new innovation in automotive. Designing microchips for the commercialization of outer space faces stiff challenges.These are just a few topics that companies driving technology innovation in electronic system design will discuss at SEMICON Europa, 12-15 November 2019 in Munich, Germany. In the run-up to the event, SEMI spoke with Bob Smith, executive director of the Electronic System Design (ESD) Alliance, a SEMI Strategic Association Partner, about how the integration of the ESD Alliance with SEMI’s global platforms is extending design expertise in the worldwide electronics industry. Smith shared his views ahead of the SMART Design Forum, 14 November 2019, 14:30 to 17:00, at SEMICON Europa. Registration is open. Join the forum to meet experts from ESD Alliance and other key industry influencers. Attendance is free of charge for all SEMICON Europa visitors (Hall B1, TechARENA 1).SEMI: In August of last year, SEMI announced the ESD (Electronic System Design) Alliance joined SEMI as a Strategic Association Partner. How does this partnership benefit the design and semiconductor industries?Smith: As indicated back then by Ajit Manocha, president and CEO of SEMI, “Design is the very foundation of semiconductor innovation and manufacturing.” The integration of the ESD Alliance with SEMI’s event and global platforms enables the design community to expand its expertise to the worldwide electronics industry. The integration helps streamline collaboration and connection of SEMI members with the electronic system design, IP and fabless communities.ESD Alliance members are now able to more efficiently engage with the electronics manufacturing supply chain on technical and business issues and gain access to comprehensive global resources and platforms. Those resources include SEMI’s technology communities and activities in areas such as advocacy, international standards and environment, health and safety (EH S), industry statistics, trade and regulatory initiatives.SEMI: And what were the main opportunities for the ESD Alliance to present the scope of the brand-new collaboration? How did the ESD Alliance enlarge the scope of the semiconductor and design industries?Smith: Although the ESD Alliance has international member companies, the reach and focus of our activities was limited to North America. SEMI’s global platform allows us to spread our design initiatives worldwide. In 2019 we introduced design at SEMICON events in China, Taiwan, the U.S. and now Europe with our participation in SEMICON Europa’s SMART Design Forum. By introducing design into these global events, we are advancing SEMI’s expanded mission to represent the entire global electronic design and manufacturing chain and tighten the connection between the semiconductor and design industries.Industrywide events like SEMICON Europa and its SMART Design Forum bring the entire electronic product supply chain closer together by focusing on commercial achievements in design and presenting forward-looking, system-centric views. The Smart Design Forum is a great opportunity for attendees to deepen their understanding of the links across design and manufacturing and throughout the supply chain during sessions and informal discussions at networking and social events. These exchanges help foster the collaborations essential to addressing technical challenges and ushering exciting new electronic products from concept to consumer.SEMI: How is the semiconductor design ecosystem evolving? What disciplines are becoming integrated with those that have historically governed the scene? Can you tell us more about the concept of system-centric view?Smith: In the early days of electronic design automation (EDA), design was largely separated from manufacturing. On the design side, the goal was to design and tape-out chips. After tape-out, the chip was handed off to the manufacturing group and the design team went on to a new project. We refer to this era as chip-centric.Now, given the complexity of both chips and electronic systems, design and manufacturing can no longer be separated. Instead, they must collaborate from the beginning of a project on all aspects of system design. This system-centric view enables the delivery of smarter, faster, more powerful, and more affordable electronic products. This is a big responsibility and meeting it demands tight cooperation and collaboration across multiple disciplines including semiconductor design, packaging, software development, materials and manufacturing, system integration and testing.SEMI: What’s one of your strategic objectives for 2020? Smith: In 2020 we plan to launch our Connecting the Divide initiative to bring the design and manufacturing communities closer together to help both better understand the role of the other, the value each provides and the unique challenges each community faces. The goal is to increase the rate of collaboration between design and manufacturing in answering both industries’ need for a system-centric approach to new electronic product/system design.SEMI: Do we have good reason to be optimistic about opportunities on the horizon? What’s one prediction for the future of semiconductor design solutions you’d like to share?Smith: We seem to be surrounded by almost limitless opportunities. In terms of design, my prediction is that we will see higher levels of system design abstraction that will allow systems to be rapidly configured and verified in a way that we cannot do today. In essence, we will be able to build virtual systems rapidly to reduce the risk and cost of developing new electronic products.SEMI: What are your expectations regarding the SMART Design Forum at SEMICON Europa 2019 in Munich? Smith: We are excited to be bringing the design conversation into SEMICON Europa at the SMART Design Forum. Europe has been recognized as a leading region in embracing and driving system design. Our objective is to move deeper into system-centric design through the exchange of information and ideas at the SMART Design Forum.Robert (Bob) Smith is Executive Director of the Electronic System Design (ESD) Alliance, a SEMI Strategic Association Partner. The ESD Alliance is an international trade association of companies providing goods and services throughout the semiconductor design ecosystem. Bob began his career as an analog design engineer at Hewlett-Packard working on disk drive technology. Since then, he has spent more than 30 years in various roles in executive management, marketing, and business development primarily working with startup and other early stage companies in Electronic Design Automation (EDA) and semiconductor IP. These companies include IKOS Systems, Synopsys, LogicVision, Magma Design Automation and Uniquify. He was a member of the IPO teams that took Synopsys public in 1992 and Magma public in 2001. Bob received his BSEE from U.C. Davis and his MSEE from Stanford University. Serena Brischetto is a marketing and communications manager at SEMI Europe.