advanced packaging

The rapid growth of AI has created a surge in the global energy consumption at a rate never seen before. Today, data centers account for approximately 415 terawatt-hours (TWh) of electricity globally. To put this into perspective, the annual energy consumption of the United Kingdom in 2023 measured at 309 TWh. The International Energy Agency (IEA) projects data centers’ energy consumption will more than double to nearly 945 TWh by 2030 [1]. A single generative AI query can consume up to ten times the power of a traditional search [1]. Meanwhile, data center energy usage in the U.S. is projected to leap from 4.4% to as much as 12% of the national grid by 2028 [2]. This creates a stark reality for the semiconductor industry. Traditional monolithic scaling has hit its physical and economic limits, leaving advanced packaging and heterogeneous integration to define the industry’s trajectory [3].To meet these escalating compute demands, the industry is rapidly shifting toward multi-die architectures, chiplets, and 3D stacking to decrease the amount of energy needed for advanced computing. This transition is fueling explosive growth in the advanced packaging market, which the Yole Group projects will reach $79.4 billion by 2030 [4]. However, stacking chiplets to bypass Moore’s Law exposes massive systemic bottlenecks. Engineers are now fighting interconnect parasitics, navigating complex power delivery architectures, and battling extreme thermal density.In a 3D-stacked architecture, pulling heat away from vertically integrated dies is one of the most pressing engineering challenges of our time. As compute density rises, issues like die warpage and localized thermal hotspots threaten both reliability and yield. The shift toward sustainable AI systems for energy-efficient computing requires breakthroughs in everything from hybrid bonding process flows to advanced thermal interface material (TIM) strategies and liquid cooling integration [6].These are not challenges that any single company can solve in isolation. Whether you are a foundry, OSAT, material supplier, or equipment provider, overcoming these bottlenecks requires pre-competitive, industry-wide collaboration. Foundational capabilities must be built collectively before competitive differentiation occurs.This is the core mission of the SEMI Advanced Packaging and Heterogeneous Integration (APHI) Technology Coalition. By collaborating on common standards, shared research frameworks, cross-vendor interoperability models, and collective technology roadmap congruency, APHI is actively dismantling the barriers to next-generation computing.The APHI community is already tackling these issues head-on. Monthly chapter meetings identify and address these and other issues facing heterogeneous integration. The most recent chapter meetings showcased in depth review of these challenges. Jonathan Abdilla from BESI detailed the technical challenges and collaborative research required for global hybrid bonding process flows. Similarly, Dr. Jie Geng from Indium Corporation led a deep dive into crucial TIM strategies for AI and HPC, exploring hybrid stacking evaluation methods and liquid cooling options to combat GPU die warpage.The future of advanced manufacturing will be defined by how effectively we manage power and heat in heterogeneous systems. We invite you to join this critical conversation at the upcoming SEMIEXPO Heartland (April 29-30 in Detroit, MI) Day 2 will feature dedicated sessions on Thermal Management Power Delivery in Advanced Packaging: From TIMs to Warpage Control, as well as strategies for securing the advanced packaging supply chain.To help shape the standards and shared roadmaps that will power the AI revolution, explore our initiatives and get involved with SEMI Advanced Packaging and Heterogeneous Integration (APHI) Technology Coalition.Rafael Tudela is Senior Technical Marketing Manager at SEMI References[1] International Energy Agency (IEA). (2024). Energy and AI Report. [2] U.S. Department of Energy (DOE) Lawrence Berkeley National Laboratory (LBNL). (2024). Report on U.S. Data Center Electricity Demand and Grid Impact.[3] Semiconductor Packaging News. Advanced Packaging and Heterogeneous Integration. Retrieved from: https://www.semiconductorpackagingnews.com/articles/92402.html [4] Yole Group. (2025). Status of the Advanced Packaging Industry 2025.

Advanced packaging is no longer operating behind the scenes. The technology of advanced packaging is helping to sustain the speed of the semiconductor industry’s improvement in power and performance, even as the Moore’s Law roadmap for wafer-level scaling comes under strain.At the Advanced Packaging Conference during SEMICON Europa 2025 in Munich, global experts examined the growth trajectory of this critical sector and Europe’s potential to lead in next-generation packaging solutions.Market Momentum Fueled by AI and HPCRomain Fraux, Chief Research Officer at Yole Group, forecasted that global revenues for advanced packaging will grow from $46.1 billion in 2024 to $79.4 billion by 2030. “Everything is linked to AI and high-performance computing (HPC),” said Fraux, while also emphasizing the growing relevance of automotive applications in driving demand.Romain Fraux, Chief Research Officer, Yole GroupThis demand is accelerating innovation across the supply chain. One emerging area is panel-level packaging, which breaks away from traditional round wafers. As Andreas Wocko, Sales Manager at Lam Research, observed, “Since the 1970s, the semiconductor industry has built on wafers. Now we are not just scaling, we are reshaping, building in a square format for the first time” – an innovation which substantially increases area efficiency and reduces device cost. Andreas Wocko, Sales Manager Europe, Lam ResearchTechnology Transformation from Lab to FabEurope is already investing in the foundational technologies that will power tomorrow’s packaging systems. Rolf Aschenbrenner, Deputy Director of Fraunhofer IZM, the home of the European Union’s APECS advanced packaging pilot line, discussed ongoing research into functional interposers, routing density, and organic interposers. “Our goal is to show how a new design philosophy incorporating chiplets can be brought to the industrial systems level,” said Aschenbrenner.Rolf Aschenbrenner, Director Deputy, Fraunhofer IZMThese breakthroughs are essential, as pitch sizes shrink and new materials emerge. Dr. Jessica Stubbe, Global Application Manager at MKS Atotech, described how interconnect densities have doubled in the past two years, with the industry moving to pitch sizes of less than 10µm. Stubbe said this new technology “will be enabled by a move from traditional solder-based interconnects to copper-to-copper hybrid bonding to provide higher density I/Os and lower resistance.” Jessica Stubbe, Global Application Manager, MKS AtotechInnovation Meets Real-World IntegrationThis increased density carries thermal risks with it. As Ram Trichur, Global Head of Semiconductor Packaging at Henkel Corporation, said, “New architectures enabled by advanced packaging are putting power devices on the backside, interposer or substrate, and this addition of more power delivery components in the package creates more local hotspots.”The reduced feature sizes inside the latest packages make it more difficult than ever to apply thermal interface materials. “At Henkel, we are now making 1µm-level fillers which enable the effective filling of gaps as small as 7µm,” said Trichur.Ram Trichur, Global Head of Semiconductor Packaging Market Segment, Henkel CorporationOne of the applications which stands to gain the most from the development of advanced packaging technology is silicon photonics. Dr. Himani Kamineni, Director for Advanced Packaging at GlobalFoundries, described how co-packaged optics (CPO) brings photonics directly inside the package, reducing connection lengths from centimeters down to millimeters, and providing higher bandwidth and lower latency at lower power. “Advanced packaging and CPO are foundational elements for AI and data centers to enable scalability to the next generation of compute,” said Kamineni. “But it will need a lot of packaging innovation: silicon interposers, copper-to-copper interconnects, and fiber-attach units for precise alignment.” Himani Kamineni, Director, Advanced Packaging, GlobalFoundriesReliability and Test Under PressureIn the transition to new packaging technology, it is crucial that the industry does not lose sight of the reliability standards which have made semiconductors so valuable in sectors such as automotive and aerospace. Amar Mavinkurve, Director of Materials and Labs Package Innovation at NXP Semiconductors, warned the finer spacing and smaller feature sizes in the latest packages posed a problem for reliability and long-term performance. He said, “We are dealing now not just with one failure mechanism, but with multiple. So, the way that we are used to describing behavior in models will not necessarily hold in future. Even industry standards might not hold.”Discussing new technologies such as copper-to-copper interconnects, Mavinkurve pointed out that failure would not be due to a single event, but to processes such as electromigration, corrosion, and thermomechanical effects. To model reliability properly in future, he said, “we need to move from a physics of failure to a physics of degradation.” Amar Mavinkurve, Director Materials and Labs Package Innovation, CTO, NXP SemiconductorsFabio Pizza, Business Segment Manager at Advantest Europe focused on quality and failure. With geometry scaling toward 1nm, early identification of known-good dies is essential to optimize cost and test coverage. Pizza said that, while device manufacturers need to keep time-to-market and the cost of test under tight control, they are also trying to figure out how to increase test coverage. “In a modern GPU, even a 100 DPPM quality process leaves 20 million transistors untested,” he said. Fabio Pizza, Business Segment Manager, Advantest EuropeEurope’s Position in the Global EcosystemThe conference concluded with a panel discussion about the prospects for Europe in the global advanced packaging market. According to Yole’s Romain Fraux, there is a strong ecosystem in Europe: “Europe’s strengths include specialized packaging service providers in the photonics and power market segments, as well as many packaging equipment manufacturers,” said Fraux. This resonated with the instincts of NXP’s Amar Mavinkurve and Advantest’s Fabio Pizza. Mavinkurve said: “We should focus on what we are already good at doing. It will be challenging to compete with advanced packaging providers elsewhere for AI and HPC business.”Ram Trichur of Henkel, however, urged the industry in Europe, “Do not take your foot off the gas on advanced packaging. You cannot do the full stack here, but in a technology such as CPO, there is a lot of innovation in Europe, and there is scope to add the manufacturing of these devices on top of the research capabilities.”Chris Scanlan, Senior Vice President of Technology at Besi, raised the idea of shifting production toward Eastern Europe. But Trichur cautioned that talent and infrastructure remain limiting factors in that strategy. From left to right: Chris Scanlan, Senior Vice President Technology, Besi;Amar Mavinkurve, Director Materials and Labs Package Innovation, CTO, NXP Semiconductors; Fabio Pizza, Business Segment Manager, Advantest Europe; Rolf Aschenbrenner, Director Deputy, Fraunhofer IZM; Ram Trichur, Global Head of Semiconductor Packaging Market Segment, Henkel CorporationCollaboration is the Path ForwardSpeakers throughout the conference echoed a common message: advanced packaging is reshaping the semiconductor landscape, and global collaboration will be essential to success. “It is impossible for one country or one region to do the entire stack,” Trichur concluded. “Innovation must be matched with strategic partnerships to bring advanced packaging from research to real-world impact.”On behalf of SEMI, the SEMI Europe team would like to thank the industry leaders whose expertise and enthusiasm made this conference a resounding success. SEMI ContactCassandra Melvin, Senior Director of Business Development and OperationsEmail: [email protected]

The CxO Summit at SEMICON Europa 2025 spotlighted Europe’s ongoing efforts to build a resilient and globally competitive semiconductor industry, while calling for greater ambition, speed, and unity in execution. Following global disruptions with the automotive supply chain crisis, the European Union launched a continent-wide strategy through the EU Chips Act. While the Act has already spurred significant developments, including construction of the new ESMC fab in Dresden, Europe remains far from its goal of achieving a 20% share of global semiconductor production by 2030. The CxO Summit, part of the SEMICON Europa event in Munich, provided an opportunity for industry leaders to share ideas about how to catalyze the next phase of the European industry’s growth.Ajit Manocha, President and CEO of SEMI opened the summit by describing today’s industry landscape with one word: “unprecedented.” Manocha said, “The global growth of the industry is unprecedented, with 107 new fabs set to come online by 2028, but the uncertainties are unprecedented, from geopolitics to the talent shortage to environmental concerns. So we need unprecedented solutions.” Ajit Manocha, President and CEO, SEMILaith Altimime, President of SEMI Europe echoed the mood of uncertainty, describing Europe as caught “in a perfect storm.” Altimime said, “As we face a combination of internal challenges and intensifying external competition, collaboration is not optional — it is mission critical.” Laith Altimime, President, SEMI EuropePierre Chastenet, Head of the Unit for Microelectronics and Photonics, European Commission, highlighted the tangible progress made under the EU Chips Act. “We now have a proper toolbox to handle a future crisis in the supply chain. The Chips for Europe initiative has led to the creation of five pilot lines for advanced technologies such as FD-SOI and wide bandgap semiconductors.” Chastenet added, “Europe must now capitalize on its strengths, from materials and equipment to design tools and cutting-edge research emerging from our RTOs.”Pierre Chastanet, Head of the Unit for Microelectronics and Photonics, European CommissionEchoing the call for action, Oliver Schenk, Member of the European Parliament, urged stronger regional unity. “Europe must act together, act faster, and act with much bigger ambition,” Schenk said, reinforcing the need for cross-border commitment to strengthen the continent’s semiconductor position.Oliver Schenk, Member of the European Parliament, European ParliamentHighlighting Europe’s most critical technology gap, Luc Van den hove, President and CEO of imec, unveiled plans for a new advanced fab backed by €2.5 billion in investment from the EU, the Flemish government, and ASML. Van den hove urged Europe to commit wholeheartedly to advanced technologies: “We must be more ambitious, and focus on disruptive breakthroughs rather than incremental change if we want to ensure a prosperous future.”Luc Van den hove, President CEO, imecAt the CxO Summit, CEA-Leti and ASML signed a memorandum of understanding (MoU) to deepen their collaboration and accelerate innovation in mainstream semiconductor technologies. Building on promising results in hybrid bonding, the partnership will now target 'More-than-Moore' innovations, including heterogeneous integration and novel substrates like SiC and GaN. “We aim to combine ASML’s world-class lithography expertise with CEA-Leti’s system-level innovation,” said Sébastien Dauvé, CEO of CEA-Leti. The collaboration is set to strengthen Europe’s ecosystem by shortening the path from early research to industrial impact.Left: Anne Hidma, Senior Vice President EUR US, ASML; Right: Sébastien Dauvé, CEO, CEA-LetiTurning to Europe’s industrial base, Christian Senger, CEO of Volkswagen Autonomous Mobility, emphasized the need to shift from risk-aversion to opportunity. While the region’s automotive sector faces intense global competition, particularly from China, Senger highlighted that Europe has the potential to lead in new mobility markets. “The market for autonomous roboshuttles for people transport in large cities is forecast to be worth €400 billion in the US and Europe alone,” he said. With American firms like Waymo and Uber leading the robotaxi space, Senger stressed that Europe must “act swiftly to create an environment that supports an autonomous mobility industry here.”Christian Senger, Member of the Board for Fully Autonomous Mobility and Transport CEO of ADMT GmbH, VolkswagenEurope’s Potential to Create Advanced TechnologyOne of these RTOs, CEA-Leti, is responsible for the FAMES pilot line for FD-SOI technology. Sébastien Dauvé, CEO of CEA-Leti, agreed with Pierre Chastenet that the pilot lines show great promise. He said, “FD-SOI is a big trend in semiconductors, because it enables very low power consumption in embedded devices. We think that adoption of the technology will grow in the coming years, and that is good, because most of the technology is produced in Europe.”Sébastien Dauvé, CEO, CEA-LetiEurope is also widely recognized to be the leading global voice on sustainability – a huge issue of concern to the semiconductor industry. Henri Berthe, President of the Semiconductor and Battery Segment at Scheider Electric, told the summit that 500 million tonnes of CO2 emissions per year are attributable to the semiconductor industry – “more than the whole of Mexico emits!” he said. “We need to make fabs more efficient, and that is why Schneider Electric has launched a new playbook with Applied Materials for sustainable energy abundance for the industry.”Henri Berthe, President of the Semiconductor Segment, Schneider ElectricAnother aspect of Europe’s playbook is support for new fabs. The flagship is ESMC, the joint venture between TSMC, NXP Semiconductors, Bosch, and Infineon. Christian Koitzsch, president and managing director of ESMC, reported to the summit that the project to build in Dresden a 12nm FinFET foundry and a 28nm CMOS line, requiring a total investment of €10bn, is on schedule. “We are now developing local supply chains, hosting a series of ESMC Supplier Days which are open not only to German but generally to European suppliers,” said Koitzsch.Christian Koitzsch, President and Managing Director, European Semiconductor Manufacturing Company (ESMC)As Manfred Horstmann, General Manager and Senior Vice President of Global Foundries, pointed out, the building of the ESMC fab means that Dresden is established as the center of a cluster of semiconductor industry companies. “Global Foundries has its Fab 1 and a mask center in Dresden. In fact, one-third of the chips produced throughout the whole of Europe now comes from Dresden.”Manfred Horstmann, General Manager and Senior Vice President, GlobalFoundriesAn example of ambition was given by Terence Gan, Executive Director of the Institute of Microelectronics of Singapore. Gan told the summit how Singapore has used pilot lines to stimulate research and development in new technologies. He said: “We started research into advanced packaging as long ago as 2011. Most people thought we were mad! But today, there is strong demand for our advanced packaging capabilities because of the rise of AI and its need for high-performance computing.”Terence Gan, Executive Director, Institute of MicroelectronicsBreaking Barriers to ProgressDespite momentum, bureaucratic inefficiencies continue to hamper progress. Narjiss Haddaoui, Managing Director of European Economics called for faster decision-making: “In global competition, speed is a decisive factor. To act fast enough, the EU must change its ‘software’ - the processes by which it considers and makes decisions.” Narjiss Haddaoui, Managing Director, European economicsThe stifling character of European bureaucracy is reflected in the region’s approach to building fabs. Herbert Blaschitz, Executive Vice President of Advanced Technology Facilities at Exyte, compared fab construction timelines: 20 months in Taiwan, 34 in Europe, and 38 in the U.S., attributing delays in Europe to paperwork bottlenecks.Herbert Blaschitz, Executive VP of Advanced Technology Facilities, ExyteFabio Gualandris, President for Quality, Manufacturing and Technology at STMicroelectronics raised another concern — 100% of raw materials used in European fabs come from outside the region. Christophe Frey, Vice-President for EU Engagements at Arm France, added that geopolitical tensions are clouding the path forward: “We are a bit lost in the smoke from the big fire in the world’s semiconductor industry.” Fabio Gualandris, President Quality, Manufacturing Technology, STMicroelectronics Christophe Frey, Vice-President of EU Engagements, Arm FrancePlaybooks For Future SuccessSo amid the uncertainty and global tension, what lessons can the industry learn from successful regional examples? Tuomas Korpela, Business Development Senior Manager at Nokia, credited Finland’s strategic procurement and policy tools with enabling a vibrant semiconductor ecosystem: “Finland creates demand for advanced chips using industrial policy tools, alongside strategic procurement in sectors such as defense and aerospace, and connectivity.” Tuomas Korpela, Business Development Senior Manager - Corporate Development Organization, NokiaAt a regional level, Joerg Schulze, Director of the Bavarian Chips Alliance, said that his organization was supported by the Bavarian State Ministry of Economic Affairs, as well as by companies and universities. “We help semiconductor companies to establish themselves and grow here through help with site searches, networking and contacts, funding and support, and talent acquisition,” said Schulze.Joerg Schulze, Spokesperson for the Bavarian Chips Alliance, Director of the Fraunhofer IISB, Bayern Innovativ GmbHCompanies in the European semiconductor supply chain also provided the summit with their insights into the roots of global success. André Grede, Chief Technology Officer of Comet, described how his company’s strategy is not to wait for customers to tell it what they need, but to be “ahead of the curve.” Grede said: “Is staying in sync with the customer enough? Not for us - we are deeply embedded with our customers, and constantly looking to broaden our relevance to them.”André Grede, CTO, CometChristophe Maleville, Chief Technology Officer of Soitec, provided a real-world example of how this is done. He said: “Our engineered substrates using RF-SOI technology reduce the drain on a mobile phone’s battery power, and cut our customers’ board footprint thanks to RF front end integration. As a result, our products are now in 100% of 5G smartphones.”Christophe Maleville, CTO, SoitecAnne Hidma, Senior Vice-President for Europe and the US at ASML, shared the company’s success formula: “The reasons for ASML’s success include customer focus – decide which markets you are going to be in, and which you are not. We are also all-in on innovation. We nurture an ecosystem, which for us includes imec and CEA-Leti, as well as partnerships with academia. And lastly, we have a strong supply base, which is a core strength of Europe.” In a time marked by both uncertainty and opportunity, the example of ASML shows how the European semiconductor supply chain can survive and thrive.Anne Hidma, Senior Vice President EUR US, ASMLEurope’s Path ForwardThe CxO Summit made one thing clear: Europe has world-class innovation, policy momentum, and industrial commitment. What’s needed now is faster execution, deeper collaboration, and the courage to invest in the technologies of tomorrow. As the industry heads toward the $1 trillion milestone, the decisions made today will shape Europe’s place in the semiconductor world for decades to come.On behalf of SEMI, the SEMI Europe team would like to express appreciation to the industry leaders for sharing their visions and readiness to collaborate during the CxO Summit.SEMI ContactLaith Altimime, President SEMI [email protected]

Presentations at this year’s FLEX Conference illustrated the ongoing development of manufacturing tools and processes, materials, and test and reliability evaluation techniques for the growing field of hybrid electronics, which includes printed electronics and flexible hybrid electronics (FHE). Additionally, the field includes the use of additive manufacturing processes for electronics packaging and system assembly, from die attach to flexible printed circuits.Hosted by FlexTech, a SEMI Strategic Technology Community, the conference provides an opportunity for the device making supply chain to connect to R D, design and manufacturing innovations. A review of some of the key developments highlighted in FLEX presentations follows.Innovations in Flexible Printed CircuitsTokyo-based Elephantech has been focused on using advanced inkjet systems to produce flexible printed circuits. Using additive methods instead of subtractive to produce PCBs can enable reductions in carbon footprint, copper usage and water consumption. In order to achieve these benefits, Elephantech has developed processes for combining inkjet printing of metals and electroless plating. The company synthesizes copper nano particles, which it uses to formulate metal ink. It has implemented artificial intelligence to increase print accuracy, showing the capability of average drop position error of less than 2μm, and depositing 20μm droplets into 40μm grooves and wells (Fig 1).Fig. 1. Elephantech inkjet results showing ~2μm precision and prototypes with 50μm line widthExamples of Elephantech’s use of flexible printed circuit technology include a set of switches for a curved monitor and a pressure sensor with reduced footprint and component count. The company intends to directly compete with larger, rigid PCBs, and is developing a mass-production system with 57,840 nozzles that can process sheet sizes of 500 x 830 mm.Traditional processes for component attach on PCBs include mass reflow ovens, thermal compression bonding, and spot laser reflow. Laserssel has developed laser selective reflow, which promises warpage- and damage-free bonding at increased processing speeds. In addition to improving the productivity of rigid PCB production, the laser selective reflow could also enable in-line processing of roll-to-roll flexible printed circuits, replacing the use of trays for bonding to flexible printed circuits.Scrona, which spun out from ETH Zurich, has developed MEMS-based printheads to improve electrohydrodynamic (EHD) printing. By using an electric field to pull droplets out of the print nozzle, EHD can enable much higher print resolution (sub-micron, compared to tens of microns), and enable the use of higher viscosity inks than would be possible with traditional inkjet heads. While EHD has been under development for some time, its application has been limited by crosstalk, in which the electric fields of adjacent nozzles interact with each other, and the requirement for the nozzle to be within tens of microns from the substrate to enable high print accuracy.Scrona’s MEMS-based nozzles address these EHD problems by shielding adjacent nozzles to prevent crosstalk and by creating a uniform electric acceleration field, which increases print distance to the order of a millimeter. The company has used its system to print a variety of inks on different substrates, as well as conformal printing on 3D surfaces (Fig. 2).Fig. 2. Example of printing silver wires across a polished glass edge; line pitch 25μm, glass thickness 1mmThe Rochester Institute of Technology (RIT) has been developing an additive technique called liquid metal droplet jetting, which can deposit metal traces functionally equivalent to solid wires. The process uses metal wire as a feedstock, which is a fraction of the cost of nanoparticle metals. While tin, zinc, and aluminum have been used, silver and copper are still under development. The wire is melted in a micro-crucible, which feeds a nozzle; metal droplets are then jetted on demand in an argon environment to prevent oxidation (Fig. 3, l). Upon hitting the substrate, the drops solidify into metal traces equivalent to solid wire, quickly enough to avoid melting flexible films, and without curing or drying.Several methods have been explored to eject the jets from the nozzle, including magnetohydrodynamic using electromagnetic pulses, piezo-actuated pistons, and pneumatic jetting using compressed gas (Fig. 3, r). These techniques range from high-jetting-frequency and high-cost to simple and low-cost but low-frequency. Higher frequency enables overlap of droplets, increasing conductivity, and reduced processing time.Fig. 3. Concept of liquid metal droplet jetting (l); pneumatic droplet ejection approach (r)In addition to ongoing development of deposition tools and processes, the material set for additively printed electronics continues to expand. Iris Light Technologies, which spun out of Argonne National Lab and Northwestern University, is developing photonic inks for wafer-scale production of active devices including photodetectors, LEDs, and lasers. The semiconductor-based ink can be deposited via aerosol jet onto silicon wafers. Iris Light is focused on 2D semiconductors, specifically black phosphorous, which has a wider spectral coverage than graphene, is tunable in emission and absorption, and has high mobility.An example of the broadening of the additive manufacturing supply chain, Kraetonics has developed software for creating slices to be used in designing 3D-printed structures and elements. The software enables manufacturing 3D volumetric circuits with reduced size, weight, and power compared to 2D PCBs. The process involves 3D printing of hybrid mechanical-electrical assemblies such as circuits and antennas.Innovations in Test and ReliabilityAn area of active interest in the hybrid electronics community is that of test and reliability. American Semiconductor, a developer of flexible circuitry, and Bayflex, a value-added partner of Japanese equipment company Yuasa, are conducting a project on dynamic harsh environmental FHE reliability testing. The goal is to identify root causes of FHE material and system failures.The companies are developing extended temperature and humidity tests to determine FHE system lifetimes and identify causes of failures from physically deforming FHE materials and systems in harsh temperature and humidity environments. Materials under consideration for testing include:Copper on polyimide substrate with a small outline package IC and surface-mounted componentsNobleflexTM, a multilayer substrate with gold on polyimide in development for medical devicesSilver on PET substrate, with small outline package IC.The team is soliciting other test devices and is planning to coordinate with ongoing development of FHE test standards coordinated by SEMI.Henkel reported on an investigation of accelerated temperature cycling test methods, in which the company applied different combinations of temperature range, stress, and frequency of mechanical force in an effort to reduce cycle time for testing component attach reliability. The study was able to achieve similar failure modes using an accelerated test method in the case of a bonding position shift in which cracking of the die attach film was the failure mode (Fig. 4, approach 4). The study found the greatest acceleration in the case of reduced thermal shock cycles (Fig. 4, approach 1).Fig. 4. Approaches evaluated for accelerated testing of component attach.Engineering consulting firm Exponent presented the results of a study on mechanical testing for characterizing fatigue performance of flexible electronics, conducted with continuous monitoring of fatigue for 6-pin flexible flat cables from seven different vendors. Exponent found that continuous monitoring during bending fatigue testing provided greater resolution in test results including detection of intermittent failure in each sample. The study also found that strain amplitude was a critical factor for determining fatigue life, and that flat flexible cables with larger pitches showed improved fatigue performance.About SEMI FlexTechFlexTech, a SEMI Strategic Technology Community, promotes the growth, profitability and success of the flexible hybrid electronics industry by developing educational forums, directing research, and promoting technology innovation.SEMI FlexTech members benefit from speaking and business networking opportunities, introductions to key industry players, research reports, technical funding, access to end users and industry advocacy at FLEX Conferences.Gity Samadi is Director of SEMI research and development funding programs and SEMI FlexTech and SEMI Nano-Bio Materials Consortium (NBMC). Paul Semenza is an advisor to SEMI on special projects. He was previously with NextFlex, the Flexible Hybrid Electronics Manufacturing Innovation Institute.

The FLEX Conference, held again this year in conjunction with SEMICON West 2023, provided numerous examples of continued developments in flexible, printed, and flexible hybrid electronics technologies applied to sensing, robotics, communications, and other applications.

To help the semiconductor industry keep pace with increasing chip performance and cost demands, SEMI has formed the Advanced Packaging Heterogeneous Integration (APHI) Technology Community as part of our longstanding support of advanced packaging innovation through events and standards development. 

a memory market rebound will help spark a global semiconductor industry recovery poised to take hold in the second half of 2023 after the downturn that came on the heels of the pandemic boom, SEMI and major market research firms projected at Strategic Materials Conference (SMC) Korea 2023.

SEMI spoke with Christian Driller, Vice President of Research and Development at Comet Yxlon, about opportunities to accelerate time-to-market and increase yield for advanced packaging manufacturers through x-ray inspection.

Focusing on applications that help assist movement in people with neuromotor disorders & aging muscle, Georgia Tech is developing a flexible system that uses sensory feedback through EMG to assess muscle and motor neuron health and augments strength through pneumatically actuated artificial muscle.

Atomic Layer Deposition (ALD) players are poised to seize a new growth opportunity after the chip shortage pushed manufacturers to announce fab capacity expansions worldwide. Driven by the wafer production volume increase, ALD solutions are now expected to grow and enter the MtM devices market.