Materials-Driven Approaches to Improve HBM and Chiplet Integration
As 2D scaling approaches physical limits, the semiconductor industry is pivoting to materials-driven 3D inflections—gate-all-around transistors, backside power, 3D DRAM, and multi-die packaging—that unlock new gains in power, performance, density, and I/O efficiency. This talk examines how materials engineering underpins high-bandwidth memory (HBM) and chiplet integration, the twin engines of AI-era compute growth. On the packaging side, we detail the incremental materials steps behind through-silicon-via formation, along with innovations that enable thinner HBM dies via stress-engineered backside films, higher-yield die-to-wafer hybrid bonding through reduced queue time, void-free electrochemical deposition below 3 microns, and advanced CMP planarization. We also address emerging process-control needs, where shrinking microbumps and hybrid bonds demand eBeam metrology, tilted-beam CD measurement, and optical defect review. We wrap up by reviewing DRAM scaling trends and near-term inflections, including 6F² EUV patterning, advanced periphery transistors, CMOS-bonded arrays, and the transition toward 3D DRAM, where high-mobility channels, high-aspect-ratio etch, selective deposition, and defect-free Si/SiGe superlattices are critical enablers. Together, these device and packaging advances illustrate how continued materials innovation sustains the PPACt roadmap and supports semiconductor revenues approaching $1 trillion amid successive waves of AI-driven demand.
BIOGRAPHY
Dr. Sony Varghese is Managing Director of strategic marketing for Next gen products in the Semiconductor Products Group at Applied Materials. In this role, he is involved in identifying future key inflections and challenges to scaling advanced semiconductors in Applied’ s implant and patterning business unit. Prior to Applied Materials, he worked on developing various memory technologies within the R&D organization at Micron Technologies. Dr. Varghese has over 60 U.S. patents issued or pending in the area of semiconductor processing and integration. He has a Ph.D. in Materials and Mechanical Engineering from The Oklahoma State University, Stillwater, USA.