From Lab to Fab–Emerging Materials for the AI-Era Memory Hierarchy
Artificial intelligence is reshaping the entire memory and storage hierarchy. Frontier-model training generates petabytes of data and writes terabytes of checkpoints every few hours, while inference depends on billions of vector embeddings served at memory-class latency. HBM, DRAM, NAND, and the disk tier are all under simultaneous pressure — and Compute Express Link (CXL) is reviving a persistent memory tier between HBM and SSD as an open, multi-vendor standard. Across this hierarchy, the role of non-volatile, low-energy, high-endurance memory has never been more strategic.
This talk presents a lab-to-fab perspective on an emerging CMOS-compatible materials platform — HfO2-based ferroelectrics — that can address two of the most consequential tiers in the AI memory hierarchy: a non-volatile, DRAM-class memory based on ferroelectric capacitors, and a ferroelectric FET (FeFET)-based vertical NAND flash architected to scale well beyond 1000 layers. The ferroelectric capacitor path opens routes to persistent memory across both DDR-class main memory and CXL-attached pools, with DRAM-class bandwidth, lower idle power, and zero refresh — capabilities that map directly onto large language model inference, KV-cache offload, and disaggregated memory architectures. The Fe-NAND path addresses the scaling limits of charge-trap flash — lateral charge migration, high programming voltages, and pass disturb — while remaining compatible with existing 3D NAND integration flows.
Drawing on recent results from our group at Georgia Tech and the broader community, the talk will walk through how progress in materials engineering, cell- and device-level characterization, and integration studies is advancing ferroelectric memory and storage from laboratory demonstrations toward credible candidacy for high-volume manufacturing. We will close with three near-term opportunities the SMC community is well positioned to enable: a unified HfO2-based ferroelectric materials platform shared across the memory and storage tiers, CXL-class persistent memory products built on that platform, and radiation-hardened ferroelectric storage for the emerging space-AI infrastructure layer. The throughline is that ferroelectricity is best understood not as a single device but as a strategic-materials platform with applications across the AI-era memory and storage hierarchy.
BIOGRAPHY
Dr. Asif I. Khan is an Associate Professor in the School of Electrical and Computer Engineering at the Georgia Institute of Technology, with a courtesy appointment in the School of Materials Science and Engineering. His research focuses on semiconductor materials and devices for advanced memory, logic, and AI hardware, with emphasis on ferroelectric and oxide materials and AI-accelerated materials-to-technology translation.
Dr. Khan’s awards and honors include the Intel Rising Star Award, NSF CAREER Award, DARPA Young Faculty Award, Georgia Tech Outstanding Junior Faculty Award, and selection to the National Academy of Engineering Frontiers of Engineering Symposium. He serves as Editor-in-Chief of the IEEE Journal on Exploratory Solid-State Computational Devices and Circuits and as an Editor of IEEE Electron Device Letters and has served on the technical program committees of IEDM, the Symposium on VLSI Technology and Circuits, DAC, and DRC.
Dr. Khan also serves as an independent technical advisor to semiconductor and AI companies, startups, and venture funds on emerging semiconductor technologies, AI hardware, technical diligence, and investment strategy.