Advancing Connectivity with Advanced Packaging in the AI Era
ABSTRACT
We are at a pivotal moment in the semiconductor industry with a more diversified end market driven by the AI revolution. This shift is bringing innovation and new challenges. In the recent months, significant investments have been made in data centers to build infrastructure and run new large language models that promise to drastically change every aspect of our lives.
While Moore’s law continues with the introduction of high NA EUV, the shift to the new gate-all-around (GAA) transistor architecture and the introduction of backside power distribution network, the pace of scaling in front end manufacturing has slowed and become more expensive.
Consequently, semiconductor packaging has started to play a more crucial role in driving performance, power, connectivity and cost advantages. The acceleration of heterogeneous integration, being implemented with several new 2.5 and 3D architectures, is bringing unprecedented process, process integration and process control challenges in the wafer-level packaging and assembly fabs.
The whole industry is developing new ways to achieve high interconnect density to meet performance and costs requirements, including hybrid bonding, embedded bridges, wafer and panel interposer, glass core substrates and, in the longer term, co-packaged optics.
While AI compute platforms, such as GPU, HBM and other accelerators, continue to expand their presence in data centers, the packaging technology roadmap must adapt to enable AI edge applications. The key metric for AI compute going forward is performance per watt across all compute domains (data center, client and mobile), and this can be achieved through various packaging architectures.
KLA continues to collaborate with key industry players and broaden its portfolio of products and solutions to solve the new challenges that the proliferation of AI at data centers and on edge devices will bring to the semiconductor industry.
BIOGRAPHY
Oreste Donzella serves as Executive Vice President and Chief Strategy Officer at KLA Corporation, leading key corporate growth initiatives and working closely with external stakeholders, such as financial investors and end customers in the broad electronics ecosystem.
Prior to his current role, Oreste was Executive Vice President, managing the Electronics, Packaging and Component (EPC) business group at KLA Corporation, which included multiple product divisions, targeting growth opportunities in specialty semiconductors, packaging, printed circuit board and display markets.
Previously, Oreste was the Chief Marketing Officer (CMO) of KLA. In this role, he oversaw corporate marketing activities, market analytics and forecast, and company-wide collaborations with the broad electronics industry.
In the years before his CMO role, Oreste led the world-wide field applications engineering team, and was responsible for Customer Engagement projects and product portfolio optimization for wafer inspection platforms at KLA.
Previously, Oreste was Vice President and General Manager of the Surfscan and SWIFT divisions at KLA-Tencor. In these positions, he was responsible for the unpatterned wafer inspection, wafer geometry, and macro inspection business, overseeing new products development, sales, and marketing activities, customer support, and ultimately, division financial performance (P&L).
Oreste brings 30+ years of experience in the semiconductor industry. Prior to joining KLA in 1999, he spent almost seven years at Texas Instruments and Micron Technology, holding engineering and management positions in the process integration and yield enhancement departments.
Oreste holds various patents and is featured in several technical publications.
In 2020, Oreste was awarded with VLSI Semiconductor All Star for “charting KLA’s path into new markets related to More than Moore semiconductor technologies”
Oreste earned his master’s degree in electrical engineering from the University La Sapienza in Rome, Italy.