Janice leads an organization responsible for creating and executing Intel’s lithography supply chain strategy to deliver lithography and mask capability meeting Intel’s global technology, manufacturing, affordability, and time to market requirements. Her integrated technical and business team manages Intel’s executive supplier relationships, corporate contracts, joint development programs, and complex deals including strategic investments in Intel’s lithography ecosystem.
Janice has represented Intel on the Sematech Lithography Program Advisory Group, the ITRS US Lithography Technical Working Group, the Berkeley CXRO Advisory committee, has been Intel senior sponsor for Cornell University and is Chairman of the Board for the EUV LLC. She has presented and published at industry forums and currently represents Intel on advisory boards including ITPC conference chair and the International EUV Symposium. Janice joined Intel in 1989 and has held positions in lithography process engineering, technical program management, and engineering management. She holds one US patent in the mask area. Janice earned a BS degree in Electrical Engineering from Cornell University.