March 9, 2027
This four-hour workshop provides a comprehensive technical foundation in semiconductor packaging, briding the gaps between front-end wafer fabrication and final system integration.
Pricing
- Members: $199
- Non-Members: $249
* For group orders with 10+ attendees, and for Students/Veterans discounted pricing, please contact [email protected]
Time
8:00 am - 12:00 pm PDT
Location
United States
Course Description
In this course, we dive into the fundamental roles of the package to enable a complex product; namely, signal distribution, power delivery, thermal management, mechanical protection of the fragile silicon die(s), and the risks associated with the manufacturing flow. We trace the evolution of packaging technology from wire-bonded leadframe packages through flip-chip and ball grid arrays to today's advanced heterogeneous integration platforms, including 2.5D interposers, 3D die stacking, fan-out wafer level packaging, and chiplet-based architectures.
Given the complicated, and expensive, nature of these semiconductor packages, quality and reliablity for a central theme for such complex products. We will discuss quality metrology used to maintain outgoing quality of products and accelerated testing methods used to predict field performance using physics of failure methodology.
The course concludes by presenting information on current or emerging technologies and the attendant challenges, that include hybrid bonding, co-packaged optics, and advanced substrate materials. The course also touches upon challenges with thermal dissipation for high-power AI products, and the bottlenecks now shaping next-generation semiconductor package roadmaps.
Learning Objectives
Define core packaging functions (signal, power, thermal, and mechanical).
Trace the evolution from leadframes to 2.5D/3D and chiplet architectures.
Explain the "More than Moore" shift from transistor to package innovation.
Identify key failure mechanisms like electromigration and thermal fatigue.
Apply quality metrology and screening methods to ensure outgoing product standards
Use accelerated testing and physics-of-failure models to predict long-term package reliability.
Evaluate emerging trends in hybrid bonding and co-package optics.
Hands-on exercises
Who Should Attend
This course is ideal for anyone seeking a better understanding of semiconductor packaging fundamentals, challenges, and latest technologies.
Instructors
Shalabh Tandon and Shubhada Sahasrabudhe
SQuRIuS LLC
Important Information
Note that only the person who registered will receive a certificate of completion. This virtual training will not be recorded. Attendees must be present to access course knowledge.
Can't find the training link day of? After you register, you will receive the link to the live training via the email address you provided. In addition, you will receive email reminders about 24 hours in an advance and an hour before with the same link. Please keep these emails on hand to access the trainings on time. If you do not see any confirmation emails, please check your junk/spam folders before contacting SEMI U for support.