ESD Alliance Webinar: Hardware Fuzzing: What? Why? How?

Hardware is at the heart of computing systems. However, recent years have seen increased attacks exploiting hardware vulnerabilities and exploits, which even traditional software-based protections cannot prevent. Hardware fuzzing has shown promise in detecting vulnerabilities in large-scale designs like modern processors. In this talk, we will describe the hardware vulnerabilities in hardware description languages, such as Verilog and VHDL. Then, we will explain a new and radical approach called hardware fuzzing to find these vulnerabilities and detail how fuzzing techniques can be combined with existing formal verification techniques to detect vulnerabilities efficiently. Finally, we will discuss a strategy for pinpointing vulnerabilities to accelerate the mitigation process and briefly talk about improving the efficiency of hardware fuzzing using ML/AI techniques, such as multi-armed bandit (MAB) and large language models (LLM).

Meet the Speakers

Guest Speaker

Jeyavijayan (JV) Rajendran
Associate Professor
Department of Electrical and Computer Engineering
Texas A&M University
Biography

Moderator

Warren Savage
Researcher at University of Maryland
Applied Research Laboratory for Intelligence and Security
Biography