Advanced Packaging: Key to Next Generation Silicon’s Economic Success
ABSTRACT
As the semiconductor industry enters a new era with next generation silicon nodes, advanced packaging has become the key to economic success. Advanced packaging, especially chiplets, is pivotal in this new era. This presentation examines the drivers for chiplets in both sided-by-side and 3D configurations. The role of chiplets for advanced semiconductor nodes is explained and the requirements for successful adoption are presented. Applications that benefit from the use of chiplets will be highlighted.
BIOGRAPHY
E. Jan Vardaman is president and founder of TechSearch International, Inc., which has provided market research and technology trend analysis in semiconductor packaging since 1987. She is the author of numerous publications on emerging trends in semiconductor packaging and assembly. She is a senior member of IEEE EPS and is an IEEE EPS Distinguished Lecturer. She received the IMAPS GBC Partnership award in 2012, the Daniel C. Hughes, Jr. Memorial Award in 2018, the Sidney J. Stein International Award in 2019, and she is an IMAPS Fellow. She is a member of MEPTEC, SMTA, and SEMI. She has worked with SEMI on the research and publication of the Global Semiconductor Packaging Materials Outlook since 2005 and the OSAT database since 2017. Before founding TechSearch International, she served on the corporate staff of Microelectronics and Computer Technology Corporation (MCC), the electronics industry’s first pre-competitive research consortium.