Defect Inspection 1
Chairs: Ralf Buengener, Abhishek Vikram, Israel Ne’eman
In-line inspection is critical for modern semiconductor processing. The session talks about defect inspection/review for yield improvement for a wide range of use cases. DI1 session will showcase papers using E-Beam technology.
Tuesday, May 3, 2022
1:30 PM ET
3.1 Negative Model E-Beam Inspection of the Contact Layer.
Oliver Patterson, MD Faruk, Intel; Datong Zhang, Guanchen He, Brian Sheumaker, ASML
1:55
3.2 3D NAND Vertical Channel Defect Inspection and Classification Solution on a DL-Based e-Beam System.
Cheng Hung Wu, Yen Chun Chuan Sun, Rishabh Kushwaha, Piyush Bajpai, Shao Chang Cheng, KLA
2:20
3.3 Accelerating FINFET MOL Process Development Using Design for Inspection Methodology.
Runling Li, Fangrui Yu, Linrong Yang, Chiung-Han Ye, Shanghai Huali Integrated Circuit Corporation; Haiqiong Zhang, Ikai Hsu, Tomasz Brozek, Bo Yu, PDF Solutions
2:45
3.4 Nuisance Rate Improvement of E-beam Defect Classification.
Hairong Lei, Qian Dong, Cho Teh, Lingling Pu, Chih-Yu Jen, Steve Lin, ASML-HMI