downloadGroupGroupnoun_press release_995423_000000 copyGroupnoun_Feed_96767_000000Group 19noun_pictures_1817522_000000Member company iconResource item iconStore item iconGroup 19Group 19noun_Photo_2085192_000000 Copynoun_presentation_2096081_000000Group 19Group Copy 7noun_webinar_692730_000000Path

October 3, 2018

Add to Calendar 2018-10-03 00:00:00 2018-10-03 00:00:00 25 & 26 October 2018: Japan SOI Design Workshop United States SEMI.org [email protected] America/Los_Angeles public
Location

United States

The SOI Industry Consortium has organized for the 4th time its annual workshop in Japan. During the two day workshop, leading companies working with SOI technologies met in Yokohama and discussed about designing with FD & RF SOI technologies. The second day was held in Tokyo, on More than Moore, with special focus on silicon photonics, MEMS & sensors, and the SOI manufacturing ecosystem. 

PRESENTATIONS

Yokohama, Thursday, 25 October 2018: Design Methods and Tools for FD- & RF-SOI Products (Agenda)
22FDX based SoC Platform for L-4 Autonomous Driving, Wayne Dai, CEO, Verisilicon >Silvaco’s design flow and IP blocks for SOI, Thomas Blaesi, VP Global Marketing, Silvaco >Enabling SoC Differentiation with Collaborative Eco-System, Subramani Kengeri, CTO & VP of WW Client Solutions, Globalfoundries >FD-SOI Product Design Methodology, Christophe Tretz, Design Advisor, SOI Industry Consortium       >SOI at Synopsys: EDA Flow and IP Support, Akira Nikaido, Director &  Shunichi Suzuki, Synopsys >Addressing the Energy Efficiency Challenges of IoT end points, Frederic Renoux, EVP, Dolphin Integration >RF-SOI for RFFE Solution: EDA Perspective; Feng Ling, CEO, Xpeedic FDSOI Foundry Enablement – From Concept to Mass Production, Jonathan Smith, Director, Cadence  >RF-SOI Technology and Design Enablement; Mostafa Emam, CEO, Incize >Improving IC Reliability by Automating Power Net Robustness and Net-aware Fill with Calibre PERC, Calibre YieldEnhancer and Calibre Pattern Matching; Takashi Yabe, Application Engineering Consultant, Mentor Graphics
Tokyo - Friday, 26 October 2018 More than Moore and SOI Ecosystem (Agenda)
Distributed AI and computing at edge and nodes for sensors, 

Giorgio Cesana, Sr. Director, STMicroelectronics >RF- & FD-SOI: addressing substrate supply to support accelerated growth, Jean-Marc LeMeil, Director, Soitec >FD-SOI for ultra low power edge computing, Jon Cheek, Director, NXP A Time-of-Flight Range Image Sensor with High Near Infrared Quantum Efficiency Using SOI-Based Fully-Depleted-Substrate Detectors, Prof. Shoji Kawahito, Shizuoka University >An Overview of SOI based MEMS, Jean-Philippe Polizzi, MEMS Business Development Manager, Leti-CEA >Smart Cut technology applied to MEMS: illustration in the field of ultrasonic transducers; Bruno Ghyselen, Sr. Expert, Soitec >Si Photonics Foundry, Makoto Ueda, Director, GlobalFoundries >Si Photonics design, Yoshimi Kitagawa, Technical Leader, Cadence Si Photonics Applications, Giorgio Cesana, Sr. Director, STMicroelectronics >Validation Flow for SOI photonic Integrated Circuits, Tohru Mogami, PETRA >Putting Curves in an Orthogonal World, Masahiro Shiina, Technical Marketing Engineer, Mentor Graphics