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Session 5Poster Session

Tuesday, May 5, 2020
5:15-6:45pm

Chairs: Shekhar Bakshi, Analog Devices; Rajan A. Beera, PhD, Pall Microelectronics; Jeanne P. Bickford, PhD; Thanas Budri Texas Instruments; Saurabh Chowdhury, Transphorm USA; Nora Colligan, Samsung Austin Semiconductor; Ido Holcman, Applied Materials; Ankit Jain, KLA; Pratik Joshi, PhD, Samsung Austin Semiconductor; Sophia Keil, PhD, University of Applied Sciences Zittau/Görlitz; George Kong, Peregrine Semiconductor; Kotlanka Rama Krishna, PhD, Analog Devices; Sudtida Lavangkul, Texas Instrument; Holly Magoon, Nikon Precision; Kazunori Nemoto, PhD, Hitachi High Technologies; Mohammad Nosrati; Zhou Ren, PhD, KLA; Leonard Rubin, PhD, Axcelis Technologies; Kavita Shah, NOVA; Satyajit Shinde, Samsung Austin Semiconductor; Misty Thompson, Texas Instruments; David Tucker, PhD, Texas Instruments; Daisy Vaughn, GLOBALFOUNDRIES; Bradley Wood, Entegris   
 

  • 5000+ Wafers of 650 V Highly Reliable GaN HEMTs on Si Substrates: Wafer Breakage and Backside Contamination Results
    Saurabh Chowdhury, YiFeng Wu, Likun Shen, Lee McCarthy, Primit Parikh, David Rhodes, Tsutomu Hosoda, Kotani, Kenji Imanishi, Yoshimori Asai, Tsutsumo Ogino, Kenji Kiuchi, Transphorm
     
  • Additive Manufacturing Applications for Quality Improvement and Cost Reduction
    William James Blalack, Samsung Austin
     
  • Back-Side Residue Analyses and Reduction in FinFET Middle of Line Wafers CFM: Contamination Free Manufacturing
    Reshmi Mitra, Alper Konuk, Samsung Austin Semiconductor
     
  • Characteristics of SiGe Oxidation and Ge Loss According to Ge Content 
    Meejung Kwon, Je Hyeok Ryu, Chiyoung Lee, Yoon Young Lee and Byoung Hoon Kim, PSK
     
  • Control of Oxidation for Improved Phase-Change Device Performance
    K. W. Brew, R. Conti, I.Saraf, G. Rodriquez, M. Lippitt, N. Saulnier, IBM; Y. Xu, S. Manita, T. Masuda, T. Jimbo, ULVAC
     
  • Data Set Preparation Using Clustering Applied to Colored Resists Coating Striation Detection
    M. Kessar, University Grenoble Alpes, P. Lemaire, B. Le-Gratiet, V. Gredy, STMicroelectronics (Student)
     
  • Effect of Sparse or Asymmetric Sampling on the Estimation of Photolithography Overlay Regression Parameters
    Tim Conway, Ronak Kamat, SkyWater Technology
     
  • Empirical Relationship between Cycle Time Impact and Batching on Furnaces in Semiconductor Foundry
    Nivedha Rajasekaran, Vikram Arjunwadkar, Richard Man, GLOBALFOUNDRIES
     
  • Environmental Improvements through Media Packaging
    Ryan Parrott, Patrick Dunaway, Intel Corporation
     
  • Epitaxial SiGe Seed Layer Thickness for PFET Performance Tuning
    Dali Shao, Kyle Briggs, Crystal Kenney, Aaron Chadwick, Churamani Gaire, Judson Holt, Hongying Peng, Anahit Hovhannisyan, James Chen, Weihua Tong, GLOBALFOUNDRIES
     
  • Estimation of Process Time Delay between Chamber Measurements and Optical Emission Spectrum
    Taikang Ning, Trinity College; CH Huang, J. A. Jensen, V. Wong and H. Chan, Lam Research
     
  • Excursion Prevention Strategy to Increase Chip Performance by Photomask Tuning
    Ofir Sharoni, Yael Sufrin, Avi Cohen, Carl Zeiss; Rolf Seltmann, RS-Lithoconsult; Aravind Narayana, Thomas Thamm, GLOBALFOUNDRIES 
     
  • How to Minimize Wafer-To-Wafer/Lot-To-Lot OPO Variations Caused by Process-Induced Wafer Distortion
    Hamid Khorram, Nikon Precision
     
  • Host Centric Recipe Management on SEMI E170
    Osamu Ohishi, IBM Services Japan
     
  • Impact of Asymmetric Memory Hole Profile on Silicon Selective Epitaxial Growth in 3D NAND Memory
    Yao-Yuan Chang, Zusing Yang, Ming-Tsung Wu, Hong-Ji Lee, Nan-Tzu Lian, Tahone Yang, Kuang-Chao Chen, and Chih-Yuan Lu, Macronix International Co.
     
  • In-device High Resolution and High Throughput Optical Metrology for Process Development and Monitoring
    Kaushik Sah, Shifang Li, Andrew Cross, KLA; Sayantan Das, Sandip Halder, IMEC
     
  • In-line Photoresist Defect Reduction Through Failure Mode and Root-Cause Analysis
    S. Goswami, S. Hall, W. Wyko, J.T. Elson, J. Galea, J. Kretchmer, General Electric Global Research Center
     
  • Innovative Approach on Dynamic Behavior of LPCVD Nitride Process on Diffusion Furnace
    Satyajit Shinde, Chee Huei Chan, Marcus Minchew, Lawrence Mbonu, Samsung Austin Semiconductor
     
  • Integrated Sub-Fab Monitoring System Improving Data Visibility and Abatement Uptime
    Xin Li, Xin Li, Scott Veirs, Tony Betts, John Dalziel, Ania Zemlerub, Yuee Feng, Edwards Vacuum; Dinesh Saigal, Applied Materials
     
  • Managing Process Performance Using Predicted Yield Impact
    Aditi A. Breed, Eric St. Pierre, Phillip Kyzer, Intel Corporation
     
  • Metrology of Hafnia-Zirconia ALD Ultra-thin Films
    Vineetha Mukundan, Alain C Diebold, SUNY Polytechnic Institute
     
  • NextGen Calibration Utility for Tool Setup and Matching in Real-Time Automated Visual Inspection Systems
    Chris Edwards, Cody L. Morgan, John Rudolph, Danniel Slinker, Debashis Panda, Intel Corporation
     
  • Particle Improvement for Low-K Process in Diffusion Furnace
    Viboth Houy, Janice Lam, Halima Ali, Samsung Austin
     
  • Practical Considerations for High Throughput Wafer Level Tests of Silicon-Photonics Integrated Devices
    Kate McLean, GLOBALFOUNDRIES
     
  • Repeatability of Nanoimprint Lithography Followed Through Line Roughness Extraction
    Hubert Teyssedre, Jérôme Reche, University Grenoble Alpes, CEA, LETI; Florian Delachat, Intitek for Industry; Manuela Stirner, Jonas Khan, Peter Ledel, EV Group (Student)
     
  • Roughness Measurement of a Silicon Wafer Using Wave Front Phase Imaging
    J.M. Trujillo-Sevilla, J.M. Ramos-Rodríguez, Juan Trujillo, Jan Olaf Gaudestad, Wooptix
     
  • Science of Sealing: Advanced Materials for High-Temperature Applications
    Thomas S. Reger, Gary J. Reichl, Greene, Tweed
     
  • Selective Metal Deposition to Increase Productivity
    Robert L. Rhoades, Revasum; Rashid Mavliev, IPGrip; Knut Gottfried, Fraunhofer ENAS
     
  • Significant Yield Improvement on Antenna Wafers Achieved via Hardware and Process Optimization
    Chengzhu Qi, Eric Madsen, Mary Anne Plano, Lam Research
     
  • Slip Line Detection by Polarized Infrared and Photoluminescence Imaging
    Zoltán Kiss, Zsolt Kovács, Máte Janecska, Gábor Molnar, Máte Nagy, Anita Pongrácz, György Nádudvari, Lubek Jastrzebski, John Byrnes Semilab; Ramsey Hazbun, Cameron Luce, Jay Burnham, Phil Kaszuba, GLOBALFOUNDRIES
     
  • Staggering Preventive Maintenance Actions at CMP Using a Dispatching Algorithm
    Srikanth Ramakrishnan, Shiladitya Chakravorty, Jensen Tay, David Olsen, Peter Zumpano, GLOBALFOUNDRIES
     
  • Study of Process Window Discovery Methodology for 28nm Technology Node Process Window Limiting Structures
    Zhang Xingdi, Chen Hunglin, Wang Kai, Long Yin, Shanghai Huali Microelectronics
     
  • A System for Wafer Pattern Matching & Classification at Scale
    Peter Shaw, Nico Rode, TIBCO Software; Aditi Goswami, Andal Jayalakshmi, Nihal Mahajani, Ahmer Srivastava, Senthil Subramanian, Western Digital
     
  • Systematic Missing Pattern Defects Introduced by Topcoat Change at PC Lithography: A Case Study in the Tandem Usage of Inspection Methods
    M. Fields, R. VanRoijen, M. Lucksinger, GLOBALFOUNDRIES
     
  • Tilt Angle and Dose Rate Monitoring of Low Energy Ion Implantation Processes with Photomodulated Reflectance Measurement
    A. Pongracz, J. Szívós, F. Ujhelyi, Zs. Zolnai, Ö. Sepsi, Á. Kun, Gy. Nádudvari, J. Byrnes, Semilab; Leonard M. Rubin, Edward D. Moore, Axcelis Technologies
     
  • Use of Modulated Fast Flow Glow Discharge Mass Spectrometry to Evaluate Impurities in Silicon Carbide Substrates and Thin Films
    Bob Hengstebeck, Karol Putyera, Eurofins EAG Material Science
     
  • Using GAN to Improve CNN Performance of Wafer Map Defect Type Classification
    Yongsung Ji, Samsung Electronic

 

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