Contamination Free Manufacturing
Session Chairs: Chris Ebert, Jennifer Braggin, Chris Long
Contamination in the form of particulates, surface impurities and volatile organic compounds can have a significant impact on semiconductor wafer fab yield and reliability. This session will feature papers focused on process improvement to reduce overall on-wafer contamination in order to eliminate killer defects, drive yield improvement and minimize yield excursions.
Wednesday, May 15, 2024
9:00AM ET
9.1 A Particle Reduction Strategy for Plasma Etching Processes
J. Jeong, Y. Kim, J. Lee, Y. Kim, Samsung Electronics
9.2 Elimination of Bond Pad Etch Induced Wafer Arcing via Reducing ESC Chuck Surface Charges
J. Ye, Micron Technology; W. Lien, O. Lee, L. Tsai, Micron Memory
9.3 Analyzing Time-Dependent Behavior of Wafer Outgassing in the Front Opening Unified Pod (FOUP)
K.D. Yang,. Y. Kim, K. Suk, H. Jeon, S. Park, J. Han, E. Han, Y. J. Kim, J. J. Kim, Memory Division, Samsung Electronics
9.4 In-Situ Post Etch Fluorocarbon Byproduct Removal for HDP Void Reduction
P. Bharatan, J. Ye, B. Webb, L. Kerstetter, D. MacMahon,
J. Snead, D. Poling, M. Hurt, Micron Technology
9.5 Defect Reduction And Line Width Roughness (LWR) improvement By Using A Post Pre-coat Treatment (PPT) In Waferless Chamber Conditioning
J. Ye, R. Pagadala, F. Lu, Micron Technology