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Session 2—Yield Management

Co-Chairs: Qintao Zhang, Applied Materials | Gary Green, Green Consulting | Sagar Kekare, KLA | Brett Williams, ON Semiconductor | Reshmi Mitra, Samsung Austin Semiconductor

Yield improvement in today’s fabs requires careful process development and proactive preventive steps for mitigating yield loss. This session covers papers detailing cobalt process development work for improved yield & reliability, preventive measures to mitigate potential yield loss during new product introductions, a detailed study of BEOL defectivity for AI applications and describes challenges of optimizing yield in fabs with a diverse product mix. 

2.1 Introduction to Analog Testing of Resistive Random-Access Memory (RRAM) Devices Towards Scalable Analog Computer Technology for Deep Learning | Ruturaj Pujari, Arthur Gasasira, Youngseok Kim, Veenadhar Katagadda, Coon-Cheon Seo, Xuefeng Liu, Sean Teehan, Nicole Sauliner, Ishtiaq Ahsan, Vijay Narayanan, Taskashi Ando, IBM 
2.2 Dashboard for CMOS Parametric Yield and Performance Monitoring in Semiconductor Manufacturing | William Simpson, Ritesh Ray Chaudhuri, John Lee, Michael Hurt, Micron 
2.3 Machine Learning vs Deep Learning in Low Yield Wafer Map Classification | Congshu Zhou, Jason Khaw, Summer Boo, Heinmun Lam, Hingpoh Kuan, Guozhong You, Douglas Chan, Saiking Chong, Juliana Puey, Elton Ng, GlobalFoundries 
2.4 One-Chamber Workflow for STEM Examination of EBIRCH-Localized Defects | Gregory Johnson, Zeiss Microscopy 
 

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