Session 10—Innovative Silicon Devices and Processes, Advanced Patterning / Design for Manufacturability, Non-silicon and Non-CMOS, Advanced Semiconductor Developments
Co-Chairs: Jeanne Bickford, IEEE | Shubho Goswami, GE
Papers in this session address advances and concerns across the semiconductor industry, encompassing advanced patterning, design for manufacturability, innovative silicon, non-silicon, and non-CMOS devices. Advanced Semiconductor Developments.
10.1 AP/DFM: Snapback Design Rules for Automotive Vstress Reliability Tests | Mazar Hoque, Mark Griswold, Martin Clark, On Semiconductor
10.2 APDFM: Quick Yield Impact Assessment Using Silicon-design Correlation to Address Design Systematics. Chenlong Miao, Deborah Ryan, Haizhou Yin, Monisa Babu, Shenghua Song, Shobbit Makik, Sriram Madhavan, Michael Wojtowecz, Peter Lin, William Wilkinson, CT Lim, Panneerselvam Venkatachalam, GlobalFoundries
10.3 ISD: Fabrication of High Aspect-Ratio Si Pillar-Based Hybrid Plasmonic-Photonic Crystal Waveguides for Ultra-Sensitive Infrared Gas-Sensing Applications | Gerald Stocker, Thomas Grille, Thomas Ostermann, Elmar Aschauer, Infineon; Reyhaneh Jannesari, Gerald Puhringer, Parviz Saeidi, Bernhard Jakoby, Johannes Kepler University; Jassmin Spettel, Anderas Tortschanoff, Thang Duy Dao, Florian Dubois, Silicon Austria Labs GmbH
10.4 ISD: Bi-Layer Lift-Off Resist Process Optimization of Insulator Film for Neural Probe Fabrication | Bob Wadja, Dan Nawrocki, Lori Rattray, Kayaku Advanced Materials
10.5 NS/NC: Influence of Resist Profile on Deep Reactive Ion Etch (DRIE) Sidewall Morphology | Shubhodeep Goswami, Robert Macdonald, Renner Ruffalo, Matthew Edmonds, Charles Szymanski, GE Research