Fan-Out Wafer-Level Packaging for Flexible Medical Devices
Abstract
Current electronic packages are very bulky and typically rigid limiting their use in biological environments which are very sensitive to device form factors and mechanical property. Fan-Out Wafer-Level Packaging (FOWLP), with fine-pitch, high-density interconnects, and embedded bare-die components without the use of solder offers a potential solution. FOWLP enables seamless integration of heterogeneous components like signal processing chips, memory, sensors, electrodes, etc. with fine pitch interconnection between them in non-conventional substrates. At UCLA, we have developed a novel FOWLP process called FlexTrateTM that uses PDMS as the substrate. The unique properties of PDMS such as low modulus, tissue-like softness, viscoelasticity & biocompatibility make it an ideal candidate for medical electronics packaging. In this talk, I will discuss the FlexTrateTM process, challenges for future development and its potential as a platform for medical electronics.
Biography
Goutham Ezhilarasu is an R&D Engineer in Advanced Packaging and Deputy Director of UCLA CHIPS, where he leads daily operations and mentors graduate students in packaging research. His current work focuses on high-speed flexile connectors (>200 Tbps) for silicon interconnect fabric (Si-IF) and backside power delivery for wafer-scale systems. Previously, at IIT-Madras, he designed >50 GHz RF PCBs and developed optical fiber-array attach schemes for silicon photonic integrated circuits (PICs), advancing quantum communication (QKD) and microwave photonics. He is a recipient of two patents for innovations in flexible microLED arrays and large area microLED testing methodologies, developed during his graduate research at UCLA. His PhD thesis on GaN microLED assembly via Fan-Out Wafer-Level Packaging (FOWLP) pioneered flexible AR and biomedical display technologies. He holds bachelor’s degree in electrical and Electronics Engineering from CEG, Anna University, India.