In This Issue for April 2011
Standards for 3D-IC
Upcoming Regional Meetings
Building Information Modeling
PV Standards Development in China
LED Standards Update
450 mm Standards Update
PV Cell Vibration Task Force
PV Gases and Chemicals Update
450 mm Tape Frame Standard
Advanced Semiconductor Manufacturing Conference
Standards Meetings at Intersolar Europe
Standards Meetings at SEMICON West
From the Director's Desk
SEMI International Standards
3D-IC Standardization Underway at SEMI
Given their potential for increased performance, smaller footprints, and reduced cost and power consumption, 3D-IC technologies are now on the leading edge of innovation, with the industry poised to jump from concept to commercialization. However, multiple manufacturing challenges must first be solved, as 3D-ICs' increased design and mechanical complexity can lead to increased manufacturing defects, as well as thermal management issues and signal interference. While 3D integration using through-silicon vias (TSVs) promise a fundamental shift for current multi-chip integration and packaging approaches, cost-effective, high-volume manufacturing will be difficult to achieve without standardized equipment, materials, and processes.
The needs and opportunities for 3D-IC manufacturing standards were first explored at
SEMICON West in 2010,
and the first 3DS-IC SEMI Standards Committee was formed in North America
late last year. After a kick-off meeting in January, the 3DS-IC committee met again during the recent NA Spring 2011 meetings and made further progress in targeting the Committee’s initial priorities. At the conclusion of the meetings, activities had been organized into three Task Forces (TFs): Thin Wafer Handling, Bonded Wafer Stacks, and Inspection and Metrology.
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