Strategic Materials Conference - SMC 2015 Agenda

HOMEAGENDAREGISTERTRAVELSPONSORSHIPATTENDEES

Tuesday, September 20

7:30am–8:30am 

Registration & Continental Breakfast -- Sponsor: Materion 

   
8:30–8:35Denny McGuirk-SMC 2015

Welcome Remarks

Denny McGuirk (Biography)
President and Chief Executive Officer
SEMI

   
8:35–8:40        Mark ThirskOpening Remarks

Mark Thirsk (Biography)
Managing Partner
Linx Consulting
Co-Chair, SMC 2016 Committee
   

8:40–9:30      Keynote

From Materials To Artificial Intelligence—
A Deep Learning IC Industry Neuro-network in the Era Of System Level Integration


John Hu, Ph.D. (Biography)
Director of Advanced Technology
NVIDIA 

   

9:30–9:45

The Heterogeneous Integration Roadmap

Wilmer R. Bottoms, Ph.D. (Biography)
Chairman
Third Millennium Test Solutions

   
   
9:45–10:15 Networking Break Sponsor: KMG Chemicals
   
Session 1:  ECONOMIC / MARKET TRENDS
Market forces that drive demand for semiconductor process materials not only involves the influence / demand from chip fabricators, but also involves end use applications, largely influenced by consumer demand, locally and globally.  The first day of the Strategic Materials Conference will feature, the Economic and Market Trends Session.  Here, the semiconductor business environment will be presented from various vantage points - from the materials perspective through chip fabricator, to the global economic view point.  Information on materials and business trends for a broad range of semiconductor device technologies, and the driving forces behind these trends, will be presented in the form of four key presentations.  Market experts will present their findings on market trends in materials and semi equipment growth, semiconductor production demand, and end user applications.   In addition, a “views from wall street perspective” and global economic influences on the semi market will be presented, connecting the semiconductor market to Wall Street, and to the world.
   
10:15-10:20Session Moderater:  
Wenge Yang
Vice President, Marketing
Entegris
   
10:20–10:50

Economic Uncertainty, the Global Economy and Semiconductors

Duncan Meldrum (Biography)
Chief Economist and Founder
Hilltop Economics

   
10:50–11:20

The Impact of Disruptive Technology on the Materials Market

E. Jan Vardaman (Biography)
President
TechSearch International

   
11:20–12:20

“Views from Wall Street” Materials Innovation to Drive Growth in a Maturing Industry

Y. Edwin Mok (Biography)
Managing Director & Senior Equity Research Analyst
Needham & Company

   
  

Street View on the Sector

Krish Sankar (Biography)
Director, Semiconductor Capital Equipment & Alternative Energy Analyst
Bank of America Merrill Lynch

   
 Perspectives on an Unprecedented Semiconductor M&A Environment

Tom Stokes (Biography)
Senior Managing Director
Evercore

   
12:20–1:30 Lunch
   
Session 2: FUTURE of MOORE's LAW and ENCOUNTERS OF A 3D KIND 

Last year marked the 50th anniversary of Moore’s Law, the engine that has powered the Semiconductor Industry for the past five decades.  Along the way there have been naysayers proclaiming that this pace of two dimensional (2D) CMOS scaling could not be maintained and that Moore’s Law would soon crack.  Recently there have been noticeable and well publicized cracks in many areas of the factory from Lithography to Interconnect.  This session addresses traditional 2D scaling challenges faced by industry in sub-10nm technology through the filter of materials related opportunities and solutions.

One alternative that has surfaced, in part due to the cracks present in 2D CMOS scaling, is the idea of true monolithic three-dimensional scaling.  This new 3D focus holds true to the original tenets of Moore’s Law, but literally turns it on its side.  Yes, the transistor count metric will continue, and it must, but there are many more facets.  Density will not be defined by planar density, but by its cubic density.  In this global skyscraper like race to the z-dimension the 2D scaling rules can be relaxed a bit, but new challenges arise in the vertical.  OEM’s, Material Suppliers, and Chip Manufacturers are encountering specific demands of this new paradigm.  This session will look to those companies for insights on the Material based issues.

   
1:30–1:35

Session Moderator:
Kevin Peterson 
Director Sales & Marketing
JX Nippon Mining & Metals, USA
CGMG 2016-2017 Committee Co-chair

    
   
2:05–2:35

Atomic Layer Processing via ALD/ALE for Semiconductor Fabrication

Adrien LaVoie (Biography)
Director, Engineering, Dielectric ALD / Deposition Products Group
Lam Research 

   
2:35–3:05

What Do You Mean When You Say Moore's Law?

Benjamin G. Eynon (Biography)
Sr. Director, Engineering Development
Samsung Austin

   
3:05–3:30 

Networking Break - Sponsor: SACHEM

   
3:30–4:00

Scaling Challenges for Technology and Design Architectures for Advanced MOL BEOL Technology Nodes

Larry Clevenger, Ph.D. (Biography)
Senior Technical Staff Member 
5NM, 7NM, 10NM and 14nm BEOL Architect
IBM Research

   
4:00–4:30

Materials Challenges for 3D Sequential Integration 

Philippe Rodriguez (Biography)
Process Engineer, R&D Materials
CEA-LETI

     
4:30–5:00

VLSI Design in the 3rd Dimension

Yang Du, Ph.D. (Biography)
Senior Director, Technology, ASIC
Qualcomm Research

 

   
   
5:00–7:00 SMC 2016 Reception   -- Sponsor:   JX Nippon Mining and Metals
   
 

Wednesday, September 21

   

Session 3: DISRUPTIVE TRENDS AND OPPORTUNITIES FOR NEW MATERIALS

Sponsor: Linde Electronics

Demand for traditional electronics markets such as PC's and smartphones has been slowing in recent years. However, there are many emerging and potentially disruptive trends that will drive demand for new materials.

Autonomous vehicles, virtual reality and the proliferation of IoT will drive demand and innovation in areas such as flexible, hybrid and printed electronics, novel memory devices such as 3D Xpoint, thin film batteries and advanced logic architecture.

This session will focus on some of these emerging trends and the challenges manufacturers and suppliers will confront as these technologies are brought into high volume manufacturing. 

   
7:30–8:30 

Continental Breakfast

Sponsor:  Air Liquide Electronics

   
   
8:30–8:35

Welcome and Introduction

Session Moderator:
Bob Cates
Director, Business Strategy and Planning
Cabot Microelectronics
Co-Chair, SMC 2016 Committee

   
   

8:35–9:05    Keynote

Anton DeVilliers

A Critical Look at Material Challenges Emerging as a Result of Patterning becoming Integrated and Self- aligned

Anton DeVilliers, Ph.D(Biography)
Director Patterning Technology SMTS
Tokyo Electron America

   
9:05–9:35

Vanishing Space and Shifting Tectonics for Integrated Circuits

Scott Sills, Ph.D. (Biography)
Senior Member Technical Staff
Micron Technology

 

   
9:35–10:05

Hybrid Electronics:  Enabling New Applications with Novel Materials

James R. Buntaine, Ph.D. (Biography)
Country Lead, Advanced Technologies
EMD Performance Materials

 

   
10:05–10:35

“Welcome to the Fourth Floor”  Transfer Bonding as a New Fabrication Processe 

Tony D. Flaim, Ph.D. (Biography)
Chief Technical Officer
Brewer Science

   
10:35–11:00 Networking Break -
Sponsor:  EMD Performance Materials 
   

Session 4:  ADVANCED PACKAGING:

Market size estimates for the value of the module market by ASE are of the order of $60 billion for 2015, with a CAGR greater than 10% through 2018.  Packaged modules are close to the size of the chips being packaged (chipscale packages), and include hybrid systems that include ICs and passives.  Advanced packaging technologies can be seen as enabling the Internet of Things, and extending the scaling of advanced devices.  As packaged modules are developed for various applications manufacturers strive to meet the Performance, Power, and Cost (PPC) requirements set by the system designer, and package types must meet the needs for different system types such as mobile or computing, and each competitor in the market attempts to develop proprietary packaging technologies and designs that steal a march over others, resulting in a dizzying list of package types being introduced to the market.


For much of the last decade of 3-D packaging TSV technology has been the center of an approach to develop very high density hybrid or stacked device packages.   While TSV has been adopted, it is now clear that the TSV package is not a panacea, and a multitude of proprietary technologies and package designs are appearing to meet advanced packaging requirements. This session will review some of the materials aspects which are critical to advanced packaging.

   
11:00–11:05

Mark Thirsk

Session Moderator:
Mark Thirsk (Biography)
Managing Partner
Linx Consulting
Co-Chair, SMC 2016 Committee

   
11:05–11:35

Strategies for Heterogeneous Integration

Ivor Barber (Biography)
Senior Director Package Technology Development
Xilinx​

 

   
11:35–12:05

Process & Materials Challenges for Advanced Packaging

Eric Ouyang
Deputy Director
STATS ChipPAC

   
12:0512:35

The Role of Advanced Materials and System Integration in an Application Driven Industry

Rozalia Beica (Biography)
Global Director, New Business Development, Dow Electronic Materials
The Dow Chemical Company

   
12:35–1:40 Lunch   

 

Session 5:  CONTAMINATION AND METROLOGY CHALLENGES:   Sponsor:Teflon Fluoroplastics 

Driven by the increasing technology challenges, materials and equipment innovation and thus escalating cost the process complexity increases in the industry's continuous pursuit of Moore's Law.  Defect reduction and yield enhancement have become critical differentiators in determining the economics of a successful node shrink. Devices have become increasingly sensitive to the various sources of contaminants during the wafer fabrication process, which makes contamination detection, identification and control a focal point in fab operations and global supply chain strategy. Recent developments have shown much tighter control specifications in terms of particles, metals, other inorganic and organic contaminants. This has prompted next generation of equipment, materials, and fab design concepts that are designed to specifically address contamination control issues at advanced technology nodes.

The session will present a comprehensive picture of how the industry value chain participants (IDM, Equipment, chemicals) need collaboration and preparing to address contamination control and metrology challenges for sub 20nm era. You'll hear perspectives from:

1. IDM / foundry about the current contamination control challenges and requirements to achieve a successful sub 20nm node ramp.

2. Equipment producer discussing new developments in process tools and metrology/defect inspection tools to detect contaminants and minimize them during the wafer fabrication process.

3. Materials and sub-component makers regarding a new push to eliminate various types of contaminants in the materials manufacturing, shipment, and dispensing process before they reach the wafer.

   
1:40–1:45

Session Moderator:
Mansour Moinpour, Ph.D.
SMC 2016 Committee Member

   
1:45–2:15

The Future of Contamination Control & Next Generation Supply Chain for Beyond 14nm Node Semiconductor Processes

Archita Sengupta, Ph.D. (Biography)
Technologist, TSO/MCSC Program Manager
Intel 

     
2:15–2:45

Optical Films Metrology Solutions for 10nm CMOS Process Challenges

Kartik Venkataraman (Biography)
Sr. Product Marketing Manager
KLA-Tencor

   
2:45–3:15

Putting the Pieces Together:  Advanced Materials Solutions for 10nm & Beyond

James O’Neill, Ph.D. (Biography)
Chief Technical Officer
Entegris

   
3:15–3:40 Networking Break- Sponsor: JSR Micro
   
SESSION 6:  A VIEW FROM THE FABS - PANEL DISCUSSION

The panel discussion “Strategic Materials Challenges from the Perspective of the Fabs" will close the conference.  The discussion will focus on the current and emerging material challenges.   Participants on the panel will be asked to present a ten minute commentary on the issues related to materials these companies are facing in meeting their customer’s expectations as well as how these expectations are evolving in the environment of slow growth, cost sensitivity & consolidation.   Topics that are encouraged for discussion include new material needs, supply chain challenges, and how to build collaborative relationships that result in a win-win for both the device manufacturer and the supplier community.  Following the presentations will be a moderated Q&A session with the audience to further explore these topics as well as issues that may subsequently rise during the open dialogue.

   
3:403:50 Kurt Carlsen- SMC 2015

Session Moderator:
Kurt Carlsen 
Director, Strategic Sourcing
Air Liquide Electronics
SMC 2016 Committee Member

   
3:50–4:00

Michael Matragrano, Ph.D. (Biography)
Fab Technology Sourcing
Intel 

 

   
4:004:10Benjamin G. Eynon (Biography)
Sr. Director, Engineering Development
Samsung Austin
   
4:10–4:20

Larry Clevenger, Ph.D. (Biography)
Senior Technical Staff Member 
5NM, 7NM, 10NM and 14nm BEOL Architect
IBM Research

   
4:20–4:55 

 PANEL DISCUSSION: View from the Fabs

 

   
4:55–5:00

Closing Remarks

Bart Pitcock
Vice President and General Manager
KMG Electronic Chemicals
SEMI CGMG Committee Co-Chair

 

 

   

Agenda as of September 18, 2016. Subject to change.

 

Go back to http://www.semi.org/smc