ASMC 2015 - Agenda

ASMC 2015 Header

Conference Agenda and Highlights
Detailed schedule (subject to change)

Sunday, May 3, 2015

6:30-7:30 pm Welcome Reception and Registration 

Monday, May 4, 2015 

7:30-8:30amRegistration
8:30-8:45amWelcome to the Conference and 2014 Best Paper Awards 
8:45-9:45amKeynote
Tom Caulfield Thomas Caulfield, Ph.D.
Sr. Vice President and General Manager

GLOBALFOUNDRIES (Fab 8)
9:50am-12:15pmTechnical Sessions (parallel)
Session 1 - Defect Inspection I
Chairs: Jeff Barnum, KLA-Tencor; Byoung-Ho Lee, Ultratech Stepper; Larry Pulvirent, GLOBALFOUNDRIES
Defect inspection in our industry is critically important to process optimization and yield improvement.  This session will focus on defect reduction in the BEOL Cu CMP processes for both physical and non-visual defects, a unique method to quantify Ge and SiGe growth, defect source isolation in 20nm gate module, and defect challenges associated with triple patterning in the 14nm node.
Session 2 - Factory Optimization I
Chairs:  Alan Brightman, Edwards; Holly Magoon, Nikon; Jan Rothe, GLOBALFOUNDRIES
Semiconductor equipment and manufacturing is increasingly complex and driven by strict economic constraints, making it essential for IC makers to maximize fab productivity and efficiency.  This session discusses management of several semiconductor manufacturing constraints and as well as optimization of fab parameters and scenarios towards lean manufacturing.
12:15-1:40pmNetworking Lunch
1:45-3:25pmTechnical Sessions (parallel)
Session 3 – Yield Enhancement/Methodology I
Chairs: Jeanne Bickford, IBM; Sagar Kekare, KLA-Tencor; Raymond Van Roijen, IBM
Nanometer nodes technologies are bringing about significant new yield loss mechanisms, both in random and systematic categories. This session will review leading edge efforts to capture, manage, and reduce these yield loss avenues through process or device optimization.
Session 4 – Advanced Metrology I
Chairs: Amiad Conley, Applied Materials; Franz Heider, Infineon; Erin Lavigne, IBM
Novel processes and complex materials are putting significant pressure on measurement tool-sets.  As the time to develop upcoming process nodes and new semiconductor architectures decreases there is a drive for ever more in-line Critical Dimension and films metrology control for fast cycles of learning and process control.  This session will cover several key advancements in integrated metrology module control and advances TSV films metrology and control.
3:50-4:50pmTutorial - Graphene
Prof. Paul L. McEuen
John A. Newman Professor of Physical Science, Director, LAASP and Kavli Institute at Cornell for Nanoscale Science, Department of Physics

Cornell University
5:00-6:30pmSession 5 - Technical Posters and Reception
Co-chairs: Jennifer Braggin, Interplex Industries; Thanas Budri, Texas Instruments; Philippe Campion, STMicroelectronics; Eric Eisenbraun, SUNY CNSE; Mutaz Haddadin, Intel; Larry Hennessy, CH2M Hill; Weimin Li, Entegris; Sophia Keil, Dresden University of Technology; Hamid Khorram, Nikon; George Kong, Peregrine Semiconductor; Weimin Li, Entegris; Delphine Le Cunff, STMicroelectronics; Daniel Maynard, IBM; Kazunori Nemoto, Hitachi High-Tech; Rob Pearson, Rochester Institute of Technology; Anand Subramani, KLA-Tencor; Patrick Varekamp, IBM; Naomi Yoshida, Applied Materials 

Tuesday, May 5, 2015

7:30-8:00amRegistration
8:00-9:00amKeynote
 Frances RossFrances M. Ross, Ph.D.
Research Staff Member Nanoscale Materials Analysis Department 

IBM T.J. Watson Research Center
9:05-11:25amTechnical Sessions (parallel)


Session 6 - Defect Inspection II
Chairs: Pinyen Lin, G450C/TSMC; Israel Ne’eman, Applied Materials
Defect inspection is integral to the development and manufacturing of semiconductor devices. This session will feature papers describing new ways to utilize e-beam technology for defect detection and process monitoring.


Session 7 - Factory Optimization II
Chairs:  Thomas Beeg, GLOBALFOUNDRIES; Stefan Radloff, Intel Corporation; Charles Weber, Portland State University
The challenges of current and future semiconductor process technologies require a higher level of equipment reliability, quality, repeatability and productivity while improving energy efficiency. Optimizing scenarios and embarking on new approaches for addressing known problems will help improve fab metrics, minimize wafer costs and maximize competitiveness. Presentations in this session will introduce novel ideas for fab and equipment performance improvements and simulation
11:30am-12:00pmLunch
12:00-1:40pm
Technical Sessions (parallel) 
Session 8 – Advanced Equipment and Materials I
Chairs: Scott Lantz, Intel Corporation; Anand Subramani, KLA-Tencor
Advanced memory, analog and logic manufacturers face daunting challenges as the next generation device nodes come on line. These challenges are being met by the development and applications of innovations in equipment, materials, and processes. This session will focus on and will highlight some of the latest innovations that are being implemented in leading edge high volume manufacturing.
Session 9 - Advanced Metrology II
Chairs: Janay Camp, KLA-Tencor; Dick James, Chipworks; Alok Vaid, GLOBALFOUNDRIES
Novel processes and complex materials are putting significant pressure on measurement tool-sets.  As the time to develop upcoming process nodes and new semiconductor architectures decreases there is a drive for ever more in-line Critical Dimension and films metrology control for fast cycles of learning and process control.  This session will cover several key advancements in integrated metrology module control and advances TSV films metrology and control.

Session 10 – Advanced Patterning
Chairs: Oliver Patterson, IBM; Jacek Tyminski, Nikon Research
Advanced patterning is a key element of leading edge semiconductor fabrication.  This session contains papers on the use of inspection and metrology tools to characterize and improve on patterning weaknesses.  The final paper discusses lithography tool improvements to enable complex MEMS part manufacture.
Session 11 - Contamination Free Manufacturing (CFM)
Chairs: Dave Gross, GLOBALFOUNDRIES; Christopher Long, IBM R&D
4:15-5:45pmPanel Discussion
Semiconductor Manufacturing: Keeping the Silicon Magic Alive 

Wednesday, May 6, 2015

7:30-8:00amRegistration
8:00am-9:00amTutorial - Memory
Gurtej S. Sandhu, Ph.D.
Senior Fellow, IEEE Fellow, Advanced Technology Development, Process R&D

Micron Corporation
9:05am-12:40amTechnical Sessions (parallel)
Session 12  - Advanced Process Control
Chairs: Agnés Roussy, EMSE-CMP; Patrick Varekamp, IBM
Advanced Process Control applies feedback and predictive techniques, including predictive maintenance, to improve yield and tool availability.
Session 13 – Yield and Reliability Enhancement/Methodology II
Chairs: Ishtiaq Ahsan, IBM; Gary Green, AOVtech;  Dieter Rathei, D R YIELD
Characterization techniques for driving yield are critical for successful semiconductor manufacturing.  This session explores the projected yield impact of new product designs based on manufacturing history, capacitive TDDB improvements at 28nm, detecting BEOL process marginalities on vias with hammer testing and improving reliability using nitrogen purge of FOUPs. 
Session 14 – 3D/TSV
Chairs:  James Lu, RPI; Thuy Tran-Quinn, IBM; Sathish Veeraraghavan, KLA -Tencor
This session will cover key innovations in the field of 3D/Through-silicon via technology (TSV) including TSV design, processing, and wafer bonding.
Session 15 - Advanced Equipment and Materials II
Chairs: Russell Dover, Lam Research; Leonard Olmer, Micron Technology
Advanced memory, analog and logic manufacturers face daunting challenges as the next generation device nodes come on line. These challenges are being met by the development and applications of innovations in equipment, materials, and processes. This session will focus on and will highlight some of the latest innovations that are being implemented in leading edge high volume manufacturing.
12:40-1:20pmKeynote
 Robert Maire
President 
Semiconductor Advisors