Paul D. Kirsch received a B.S. (1995) in chemical engineering from the University of Wisconsin‐Madison and Ph.D. (2001) in chemical engineering from the University of Texas at Austin with a focus on high‐k dielectrics. He was with IBM Systems and Technology Group from 2001 to 2007
working on gate stacks and gate module integration for DRAM, low power bulk Si logic and high performance silicon‐on‐insulator logic. His work includes SiON and HfO2 based gate stacks in gate first and gate last integration scheme. He joined the SEMATECH Front End Process team in
2007 and is currently the director of the front end process group. The division currently includes programs in non‐silicon channel materials such as Ge and III‐V, non‐planar devices and modules, metal oxide RRAM and STT‐MRAM. The division has grown to include a broader cross section of the semiconductor industry including materials, equipment and fabless companies. He has authored and co‐authored more than 120 journals and conference papers in the various semiconductor research areas including high‐k dielectrics, metal gates, high mobility channels, flash memory, DRAM and RRAM. He also holds 4 US patents.