Next opportunities: Compound Semiconductors Meet Silicon for Power Semiconductors and Beyond
Next opportunities: Compound semiconductors meet silicon for power semiconductors and beyond
This webinar was held on November 17, 2011.
To replay the webcast and get a copy of the slides, CLICK HERE to register now
To meet growing member interest in power semiconductor technology, SEMI hosted a webcast on November 17. Webcast replay is free for SEMI members and $100 for non-members.
Beyond LEDs: Compound semiconductor production technology issues and opportunities for power devices
Beyond the boom in LED production, growing demand for more efficient energy management from solar inverters to hybrid vehicles is also spurring innovation and opportunities in SiC and GaN processes for high voltage power electronics, and in integrating these materials into more conventional silicon process flows. We’ve invited leading experts from Yole Développement, EpiGaN and SEMATECH to update on the recent progress and the market outlook for wide band gap process equipment and materials, the state of GaN on Si production technology, and the issues of making III-Vs on a conventional silicon line.
How wide band gap technologies will drive the demand for new substrates and dedicated process equipment
Philippe Roussel, Yole Développement
With the penetration of wide bandgap technologies into the power electronics market, substrate suppliers have made tremendous progresses towards optimizing SiC or GaN wafers. SiC is now available in 6” with a close-to-zero defects, and GaN is expected to enter into mass-production in several µm-thick layers on 200mm diameter silicon in the next couple of years. To reach such specs, equipment makers are developing their core Si-based technology knowledge into something fully dedicated to these exotic materials. CVD equipment will turn to MOCVD and HT-CVD for both GaN and SiC, dicing will learn how to handle such hard and brittle materials, wafer handling & bonding will adapt to thin layer transfer, laser technologies will develop techniques for substrate lift-off, etc. This paper will highlight how improvements to materials and equipment will allow WBG technologies to take-off, and how big the related markets will be.
Philippe ROUSSEL graduated from the University of Lyon in Electronics and Microelectronics. He was granted a Ph-D in Integrated Electronics Systems from the Applied Sciences National Institute (INSA) in Lyon. He has worked at Yole Développement since 1998, where he leads the technical and economic market analysis in compound semiconductors and power electronics, focusing on the material, equipment and device level.
GaN on silicon production technology and its commercial prospects
Marianne Germain, Joff Derluyn, and Stefan Degroote, EpiGaN
GaN-on-Si technology offers an unmatched cost/performance ratio for the next generation of power electronic devices, in a total accessible market projected to grow significantly to $16 billion, according to Yole Développement. GaN on Si offers the key advantages of the possibility to combine high operation voltage, high switching speed, low loss, and high integration level, on large diameter Si wafers. Today GaN-on-Si wafers with 150mm wafer diameter are available for device processing, while 200 mm GaN-on-Si wafers are under development. The Si CMOS manufacturing compatible device process offers significant opportunity for cost-efficient volume production. EpiGaN founders have jointly developed state-of-the-art GaN wafer technology for more than 10 years at imec. We have established the unique characteristics of GaN-on-Si epi material to support record device performance, in particular showing the importance of in-situ SiN passivation for enhancing the robustness of the devices in operation. The same quality materials are now being ramped up to larger production volumes for industrial applications. We will discuss the key features of GaN-on-Si technology and its roadmap towards commercialization.
Marianne Germain is co-founder and CEO of EpiGaN nv, a spin-off from imec created in 2010. She received the M.S. degree and PhD degree in Electrical Engineering from the University of Liege (ULg) in 1993 and 1999, respectively. Until 2001 she was Research Assistant at the Physical Department of ULg involved in characterization of compound semiconductor heterostructures, in collaboration with RWTH Aachen. She has been invited as Visiting Scientist at Purdue University (US) and Wuerzburg University (D). In 2001 she joined imec in Leuven (Belgium), where she took part in the development of gallium nitride technology for high power/high frequency applications. She was Program Manager of imec’s Efficient Power program, which aimed at developing high-efficiency solutions for power applications beyond the limits of Si by GaN-on-Si technology. She also was group leader of the III-V Systems research group at IMEC between 2007/2010. She pursued training management course in Vlerick Management School (Gent) in 2008/2009. In May 2010, with her colleagues Joff Derluyn and Stefan Degroote, she co-founded EpiGaN, a spin-off licensing imec technology, which manufactures and sells GaN epiwafers for electronic devices. She has authored and co-authored more than 70 international journal papers and conference communications. She co-holds several patents in the field of GaN material and devices.
VLSI processing of III-V on Si for logic and beyond
J. Oh, SEMATECH
CMOS scaling has traditionally followed Moore’s law to deliver improved performance and reduced cost. Geometric scaling is continuing, with the help of new materials and non-planar architectures, however increasing performance at each node is proving more challenging. Consensus has now been reached that low band-gap, high mobility and velocity, III-V channel materials offer significant performance advantages at reduced Vdd. In addition to the continuation of Moore’s law, III-Vs are also proving attractive to augment functionality in terms of photonics, RF and power. This presentation will focus on the challenges of processing III-V materials using an industry standard toolset in a VLSI silicon line, without the use of traditional III-V methods such as Au based ohmics and lift-off patterning.
Richard Hill graduated from the University of Glasgow in 2000 and received his doctoral degree in Electrical Engineering from the same institution in 2007. He joined SEMATECH’s Front End Process division in 2009, where he has continued his research into III-V MOSFETs concentrating on VLSI compatible processes and now leads the III-V integration team. He has authored/co-authored over 40 papers.
As high-voltage wide-band gap technologies begin to impact the the power electronics industry, substrate suppliers have made tremendous progress to provide optimized wafers of SiC or GaN, points out Roussel. SiC is now available in 6” with a close-to-zero defects and GaN will likely enter into mass-production in 200mm diameter and several µm-thick on silicon in the next couple of years. To reach such specs, equipment makers are developing variations of their core Si-based processes dedicated to these exotic materials. Deposition will move from CVD to MOCVD and HT-CVD for both GaN and SiC, dicing will be adjusted for such hard and brittle materials, wafer handling & bonding will adapt to thin layer transfer, laser technologies will develop techniques for lift-off.
The webcast is free for SEMI members and $100 for non-members.
Register at: https://ams.semi.org/ebusiness/meetings/meeting.aspx?ID=2235
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