TestVision 2020 - Register

Register for Test Vision 2016

TestVision 2020 Logo

Test Vision 2020, formerly ATE Vision, has emerged as the premier workshop in the area of Automated Test Equipment, with record attendance from a broad section of industry featuring Keynotes and panel discussions from leaders in the industry. This year, once again the workshop will be held with SEMICON West and will examine where the test industry is heading and provide a forum for discussing the directions and solutions for emerging problems.. The workshop will be located at the Moscone Center in San Francisco. If you have questions, please contact our Local Arrangements Chair, Paul Trio, ptrio@semi.org.

The workshop is part of the TEST Forum Program at SEMICON West.   Registration for the workshop is required, please see information and link below.

 


Test Forum Logo
In the new microelectronics space, everything is up for grabs.Rapidly changing new technologies, accelerated product life cycles, IoT devices, wearable electronics and a host of other developments are driving a paradigm shift.  What’s ahead?  And what will it mean for you?


The Automated Test Equipment (ATE) industry sees a continuing pressure for higher yields, better quality, and lower cost of test with technology being driven by adoption of increased integration. At the Test Forum, you will explore topics relevant to strategic thinkers as well as test engineers. Technical papers will be presented on how different ATE vendors are solving today’s latest test challenges. Sessions will cover ongoing initiatives, current business and technology trends, as well as future challenges.
The Test Program will feature presentations from Test Vision 2020, the premier workshop in the area of automated test equipment, as well as activities from SEMI Collaborative Alliance for Semiconductor Test (CAST) special interest group. Test Vision 2020 will include sessions on adaptive test, while CAST will present on current activities aimed to enable adaptive test. CAST activities include the next-generation Standard Test Datalogging Format (STDF) called Rich Interactive Test Database (RITdb), and Tester Event Messaging for Semiconductor (TEMS).


If you are involved in technical or business leadership, you need the latest industry information. SEMICON West provides you with strategic insights from industry thought leaders to enable you to assess the landscape, identify opportunities, and develop strategic plans. Come to SEMICON West and connect with people in your community, discover what's new, and discuss what it means for your business.


Agenda

Tuesday, July 1210:30 am–12:30 pm      

Test Executive Panel
For the last several decades, test professionals have aggressively driven down the “Cost of Test” through such approaches as ATE cost reduction, multi-site test implementation, and various Design-For-Test methodologies.  Over this time period, the various factors affecting cost of production test have shifted from a heavy cost of ATE capital depreciation component to now being more impacted by many other items such as material handling systems, electro-mechanical interfaces and consumables (e.g. probe cards, load boards, etc.)  Few Cost-of-Test models exist beyond proprietary tools, and there is certainly no standard available.  Those that are published, focus on the production cost of test and completely ignore the “elephant in the room” which is the cost of test development.  Hence the reason for embracing the larger scope of “Economics of Test” in this session, which will include presentations by five speakers followed by an interactive panel for Q&A discussion.

2:00–4:00 pm                 
Test Showcase  
Test Forum will also showcase select presentations from the recent BiTS (Burn-in Test Strategies)and SW (Semiconductor Wafer Test) Test Workshops. The BiTS Workshop is dedicated to providing a forum for the latest information on a broad range of test topics including final, wafer sort, and burn-in. The SW Test Workshop focuses on all the aspects associated with microelectronic wafer and die level testing. It is a probe technology forum where attendees come to learn about recent developments in the industry and exchange ideas.

Wednesday, July 13

10:30 am–4:00 pm        
Test Vision 2020 presents: Adapting to the New Realities of Test (Day 1 of 2)

This year’s theme is "Adapting to the New Realities of Test".  While the semiconductor classic front-end Moore’s Law physical and cost scaling is near an end, the pace to adopting advanced packaging technologies such as 2.5D and 3D is accelerating.  The focus is now shifting to feature integration density, whether through on-die 3-D stacking (NAND, X-Point) or heterogeneous integration of different die in the same package.  This trend is significantly impacting the wafer and final test strategy and cost considerations.   Test is now evolving from primarily a pass/fail exercise only, to a process that is adapting to the needs of newer devices.  This has taken the form, for example, repairing and calibrating devices to enable the latest fab processes and improve yield, securitization of test, or the optimization of test and production flows based on "big data" gathered during the manufacturing process.  In many cases, yield and costs are not sustainable, or devices are simply non-functional without a highly developed test strategy.
Test Vision 2020, we’ll address questions like these: What can we do differently to provide probably-good-enough testing cost effectively? What R & D tools are needed for today’s and tomorrow’s devices? What will test cell (ATE, handlers or probers, probe cards) need to look like in 2016 and 2030? Are today’s technologies adequate for the future? If not what can we do to close the gap?

Thursday, July 14

10:30 am–4:00 pm            
Test Vision 2020 presents: Adapting to the New Realities of Test (Day 2 of 2)
Register Now