Volume 7, Issue 2


In This Issue for July 2012

Intersolar Europe Update

HB-LED Update

New SEMI North America Standards Staff

NA PV Materials Standards Meeting Summary - July 2012

Update on SEMI E10 and the Future of SEMI Equipment Performance and Productivity Standards

Coping with Ultrapure Water Particles

SEMI Standards Honors Six Industry Leaders

Logistically Speaking - The Role of PV Standards

SEMI China Photovoltaic Standards Committee Update

Word 2010 SEMI Standards Document Templates Now Available

Upcoming Regional Meetings

SEMICON Europa 2012 Technical Standards Meetings

North America Standards Fall Meetings

Full Calendar of Events

From the Director's Desk
James Amano
Senior Director
SEMI International Standards & EHS

First 3D-IC Standard Approved

Formed in late 2010, the SEMI 3DS-IC Committee recently approved its first Standard for publication during SEMICON West 2012. Pending successful procedural review, the Document will be published as SEMI 3D1, Terminology for Through Silicon Via Geometrical Metrology. SEMI 3D1 will provide a starting point for standardization of geometrical metrology for selected dimensions of through silicon vias (TSVs). The Inspection & Metrology Task Force recognized the need for such a standard because although different technologies can measure various geometrical parameters of an individual TSV, or of an array of TSVs, such as pitch, top diameter, top area, depth, taper (or sidewall angle), bottom area, and bottom diameter, it is currently difficult to compare results from the various measurement technologies as parameters are often described by similar names, but actually represent different aspects of the TSV geometry. SEMI 3D1 is an important first step in promoting common understanding and precise communication between stakeholders in the 3D-IC manufacturing supply chain.

In addition, the 3DS-IC Committee is actively working on multiple other activities, organized within five task forces. The Thin Wafer Handling Task Force aims to develop standards for reliable handling and shipping of thin wafers and dies (e.g., micro-pillar grid arrays, or MPGA) used in high-volume manufacturing. As part of this effort the TF will define thin wafer handling requirements including physical interfaces used in 3D-IC manufacturing, as well as shipping requirements, including packaging, reliability, and other relevant criteria for both thin wafers and MPGAs. The task force's first effort is SEMI Draft Document 5175, Guide for Multi-Wafer Transport and Storage Containers for Thin Wafers. More...

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