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GaN-on-Silicon Power Devices Ship — Innovation in Packaging Key to Wide Adoption of Compound Semiconductors beyond LED Market

By Paula Doe, SEMI

RF GaN, power SiC and power GaN devices should all see healthy double-digit growth, pushing each of these segments to more than $500 million in sales by 2020, for a >$2 billion total compound semiconductor device market, according to Yole Développement. The GaN-on-Silicon devices finally starting to ship in qualification volumes will start to see real impact in a couple of years. But wide adoption of all of these high performance compound semiconductor materials in power and RF markets will also depend heavily on new developments in packaging technology.

“What’s needed now are innovations in the packaging technology to best take advantage of the compound semiconductor properties. The chip can work at 250°C, but the typical silicon packaging doesn’t work at more than 150°C,” notes Philippe Roussel, leader of the compound semiconductor business at analyst firm Yole Développement.   “The real action is on the packaging side, where material and chemical suppliers are pushing like crazy to develop high-temperature solutions with new gels, polymers and cooling systems.”

Although wide-bandgap compound semiconductor devices are already a $15 billion market, today that’s almost entirely (>90 percent) for LEDs and demand for LED lighting will soon start to level off, as the replacement lighting market saturates.  Meanwhile, GaN power devices that outperform silicon at high voltages are at last starting to ship in limited volumes for qualification, as suppliers of GaN on silicon have made good progress on controlling the bowing, cracks and dislocations from the lattice and thermal mismatch of growing the two materials. “Once the 600V GaN devices are available and qualified in volume, it will really open doors for markets from PV inverters to electric vehicles,” says Roussel, who will speak at the "Disruptive Compound Semiconductor Technologies" TechXPOT program at SEMICON West 2014.

Who will make this GaN on silicon is still up for grabs. Currently the makers of LEDs, laser diodes and power devices all mostly deposit their own epitaxial GaN in house, as the ability to grow high-quality film is a core advantage.  But as the GaN-on-silicon technology matures to more of a commodity, some power device makers, and especially new entrants, may decide to buy GaN epi wafers from wafer or epi suppliers and do the front end processing in house, instead of investing in MOCVD capacity.

Most of the major LED makers have been researching GaN-on-silicon as a cost-saving alternative to sapphire or SiC substrates, but the main advantage will accrue to those who can use existing depreciated 6” or 8” silicon fab capacity to significantly reduce costs. These LED makers could then also potentially use their depreciated surplus GaN epi capacity to enter the power device market, probably reducing production costs by some 20 percent.  It would, however, take them several years to develop the power technology, and distribution in the new market would be a challenge, notes Roussel.

Silicon, GaN-on-silicon and innovations in packaging technology will impact GaAs RF devices in mobile front end

On the RF side, silicon power amplifier technology, GaN on silicon, and new packaging technologies will all impact the market.

GaAs is likely to continue to dominate the power amplifier business for the mobile front end, but both silicon and GaN will likely see increasing share over time, suggests Thomas Meier, TriQuint VP of  Central Engineering, another speaker at the event. “The most interesting development for the future of high-efficiency broadband is GaN on silicon,” says Meier, noting that GaN’s high-voltage performance, high power density and high efficiency could well be the best solution for broadband power amplifiers needed for the proliferation of bands in high-end wireless application, if and when GaN-on-silicon brings the cost down. He figures that over the next three to five years, GaN will likely move from high performance military and network applications into the mobile front end, replacing GaAs from the high end, as GaN-on-silicon technology now being developed for other applications matures.

“Also very important for the near future — and people tend to underestimate this — are advances in packaging technology,” he says. “With the tremendous pressure to reduce dimensions in the x, y and z directions of the multichip modules overmolded on multilayer laminate, we need major improvements in line accuracy, width, and alignment, as well as heat spreaders and embedded die, and of course no one wants to pay a single cent more.”

Silicon will also likely take share from GaAs in the mobile front end in less expensive phones, but it will not take over the business, Meier argues, as GaAs will continue to offer the better RF performance that matters most at the high end. Silicon can be lower cost and can integrate controls on the same SOI die with the power amplifier, but those advantages could be limited. The very small power amplifier die is only a very minor part of the cost of the entire module of chips of multiple different technologies, from BAW filters to passives, that are most sensibly integrated at the package level, he suggests.  

 Wide-band-gap devices will need new variants of flip chip, new substrate materials, new bonding materials

“The biggest need to enable wide-band-gap (WBG) devices is for efficient, low-cost multi-chip packaging,” concurs Sameer Pendharkar, Texas Instruments power device and wide-band-gap roadmap manager and TI Fellow. While these devices offer high-speed switching of high voltage, the technology does not allow large scale integration.  This means that WBG power devices need to be supported by silicon drivers and controllers, and the parasitics between the silicon driver and WBG power device need to be minimized for high-speed switching.  One promising option is multi-chip, flip chip packaging, where the driver and the FET can be co-packaged to minimize parasitics, he notes. These packages will need to be thin for efficient thermal capability, and have both top side and bottom side cooling. Multiple components with different substrate potentials may need isolated package substrates that are electrically isolating but thermally conducting. Electromigration in the high current devices would need to be addressed through properly-sized interconnects and substrate layout.

New approaches will be needed to avoid the impact of parasitics and to manage the heat dissipation. “The wire bond for example is like an antenna creating all sorts of problems with parasitic inductances,” says Fraunhofer IZM director Klaus-Dieter Lang.  That means variants of flip chip or copper pillar packaging, or even sandwich-style direct copper-to-copper connections will be needed, but with improved materials, better understanding of the interface characteristics, and much tighter tolerances to prevent misoperation or damage.  Substrate materials, and the design and positioning of the components on the substrate, are also all important to reduce parasitics, and very different from what’s needed for standard silicon components, he notes.

New substrate materials must also serve to improve heat dissipation. While various ceramic and metal materials are under consideration, one intriguing possibility is to use advanced printed circuit board laminate with thicker metal layers. Lang says Fraunhofer IZM has some promising results with embedding the power devices and passives into cavities in the PCB, and using the copper layers of the laminate for interconnection and heat management. 

From the reliability point of view, new kinds of solder or bonding materials will be needed as well. “The next technology to be implemented, in my opinion, will be silver sintering or diffusion soldering for die bonding,” says Lang.  Copper wire interconnect is also a possibility for higher reliability under thermal cycling load because of higher fatigue strength, lower CTE and much better thermal conductivity of copper.  Other options for new thermal interface materials include nano fillers, or even carbon nanotubes or diamond films.

These SEMICON West TechXPOT North speakers (Thursday, July 10) will be joined by Marina Sofas, technology manager of the new U.S. Dept. of Energy Wide-Band-Gap device manufacturing research program; Primit Parikh, president and co-founder of Transphorm; and Frank Burkeen, VP and GM of KLA-Tencor’s Candela division, in discussing what’s needed to move emerging compound semiconductor devices to volume markets, at SEMICON West 2014 (, July 8-10, in San Francisco.

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Other upcoming SEMICON exhibitions and conferences include SEMICON Taiwan (September 3-5), SEMICON Europa (October 7-9), and SEMICON Japan (December 3-5).

June 3, 2014