Interesting Developments at the Leading Edge of Lithography from SPIE 2014

Interesting Developments at the Leading Edge of Lithography from SPIE 2014

By Michael Lercel, senior director of Lithography, Metrology and Nanodefectivity, SEMATECH

The SPIE Advanced Lithography conference is always an interesting place to hear about leading-edge developments in lithography, network with experts and listen to the undercurrents coming from what is presented (or not presented) at the conference. 2014 did not disappoint. There was excitement about directed self-assembly (DSA), disappointment about extreme ultraviolet lithography (EUV), and some real progress on enabling technologies for continued dimensional scaling of the semiconductor roadmap.

Concern about EUV source power was heard from several fronts this year. Although ASML reported progress on shipping its NXE:3300 scanners and Cymer showed improvements in collector lifetime, overall progress in source power — particularly in the field — did not meet the expectations of the industry. That set a somber tone for EUV, and unfortunately, overshadowed major improvements in other key EUV infrastructure elements.

Following source power, the development of defect-free EUV mask blanks has always been the next major challenge. SEMATECH’s Mask Blank Development Center (MBDC) showed a 40 percent reduction in so-called “killer defects” (i.e., those that are too large for repair or compensation and must be removed) [Antohe et al, 9048-16]. With a median of killer defects now down to six per blank, this achievement is critical to yielding production-quality substrates. Other areas of improvement in EUV mask blanks, including blank stack material and cleaning for blank production, were also demonstrated in SEMATECH’s presentations at SPIE. In fact, eight of the nine oral presentations on EUV mask blanks involved the SEMATECH MBDC.

Progress was also demonstrated in the development of an EUV actinic aerial image metrology tool, one of the key mask metrology tools required to fabricate defect-free patterned masks. A program to enable this tool, the EUV Mask Infrastructure (EMI) initiative, was started several years ago between Carl Zeiss, SEMATECH and future users of this tool. At SPIE this year, Carl Zeiss and SEMATECH reported the first imaging results from the AIMS tool for 16 nm half-pitch node structures [Hellweg et al, 9048-32]. Image quality is ahead of what was projected at this stage of the program and demonstrates that most of the technical risks in this program have been overcome.

Another challenge to enabling EUV in manufacturing has been the quality of EUV photoresists. This is another area where progress was reported this year by SEMATECH and its partners. Most exciting (to me) was the nanoparticle photoresist work sponsored by SEMATECH at Cornell, where initial results were presented for 20 nm resolution at a dose of <2mJ/cm2 [Chakrabarty et al, 9048-47]. The line width roughness is still high, but think of the implications of a photoresist with a dose this low — EUV source power requirements could be reduced by a factor close to 10! Maybe that is a bit optimistic, but any relaxation in source power will greatly benefit the adoption of EUV into manufacturing.

As the required resolution decreases, the numerical apertures (NA) of EUV lenses must increase. However, it will take many years to engineer the high-NA production lenses, so SEMATECH started a program to update its micro-exposure tools (MET) with 0.5NA lenses. Those lenses are nearing fabrication and the reports on optics and wavefront quality presented at this year’s conference show that we’re on target to enable the upgrade of the METs later this year. [Cummings et al 9048-57, and Holger et al 9048-55]. With LBNL, SEMATECH also reported the latest results from the high-NA upgrade to the aerial imaging microscope that enables work on developing EUV masks for high-NA [Goldberg et al, 9048-33].

As for other lithography techniques — whether alternatives or complementary to primary techniques — directed self-assembly (DSA) was very hot this year, with the number of papers almost doubling from 2013. This is consistent with prior rapid ramps in exploring new lithography technologies (193 nm immersion comes to mind). There are encouraging results in DSA with very high resolution achieved by pattern multiplexing (as demonstrated by TEL and others), as well as improvements in defect levels.

However, the metrics to close on a manufacturing DSA solution still are a little vague. For all the difficulty in enabling EUV lithography, the lithography community set a number of clear key performance indicators (KPIs) early on for EUV regarding source power, mask blank defect density and photoresist CD/dose/LWR tradeoff. So, for good or bad, it has been fairly clear in tracking progress for EUV. It would be very helpful to have a similar set of KPIs for DSA.

Lithography usually gets top billing, but progress can’t be made without the right metrology (doesn’t help to print <10 nm lines if you can’t see them!). Again, SEMATECH presented on several programs to enable future metrology capability. The SEMATECH CD-SAXS work presented in conjunction with NIST has shown the technique can provide fine precision and accuracy on small structures, assuming there is enough x-ray flux [Settens et al 9050-35; Sunday et al 9050-33]. So, the search is on for a fab-size high-brightness source (maybe we’ll present on that in 2015). In addition, SEMATECH also reported how optical scatterometry models can be adapted to achieve better measurement on the key structural parameters of a DSA structure [Sarma et al, 9050-23]. And finally, addressing questions about CD-SEM (the workhorse for CD metrology), a SEMATECH study clearly identified some of the requirements and options for extending this critical technology [Bunday et al 9050-28].

So, although there were some rainy days at SPIE this year (literally as well as figuratively) and some real concerns about certain aspects of the lithography roadmap, overall progress was demonstrated by some major improvements. The semiconductor lithography roadmap does have some clouds over it, but there are a lot of good ideas to keep it going for several more generations.

Michael Lercel is senior director of Lithography, Metrology and Nanodefectivity at SEMATECH. As a member-driven global consortium, SEMATECH’s role is to align roadmaps, R&D and financial investments on behalf of our members, partners and the industry. With a focus on both early development and manufacturability, we drive technical consensus, pull research into the industry mainstream, and lead major programs to address critical industry transitions.


April 1, 2014