Packaging Materials Trends — Mobility is the Key Market Driver

Packaging Materials Trends — Mobility is the Key Market Driver

By Jan Vardaman, TechSearch International, and Dan Tracy, SEMI

The electronics industry trend towards smaller and thinner form factors has ushered an era of significant changes in packaging materials. As these trends continue, innovative material solutions will be needed to address demanding requirements related to product integration, mobility, and reliability. Mobile electronics — especially smartphones and tablet computers — are the major unit volume drivers for semiconductor device sales and have unique packaging requirements. Given the compact form-factors and demands for connectivity, advanced packaging technologies such as wafer-level packaging (WLP), flip chip packaging for wireless, and package-on-package (PoP) deliver the necessary device integration needed in a thinner and smaller form factor package, and materials technologies are key in enabling this trend.

According to the upcoming SEMI Global Semiconductor Packaging Materials Outlook—2013-2014 Edition, the outlook for advanced packaging remains strong. These packages include ball grid array (BGA), CSP (including leadframe-based QFNs), flip chip, WLP, and various 3-D packages such as stacked-die and PoP.  TechSearch has shown that 15 percent of 190 billion packaged ICs shipped in 2012 were in advanced packaging form factors, and this will grow to an estimated 21 percent of the 244 billion units to be shipped in 2017. Flip chip packaged units will grow at a compound annual growth rate (CAGR) of 25 percent between 2012 and 2017 with wireless products driving the growth.  Over the same timeframe, WLP, which has already experience strong growth in unit shipments, is forecasted to grow at an 11 percent CAGR due to the strength in the mobile sector.


Flip Chip Package

Advancements in materials technology and new materials will be needed to solve challenges pertaining to device and system integration and to package and system reliability. New materials and processes will enable the semiconductor industry to advance scaling in packaging down to the 16nm node and below. Semiconductor manufacturers and packaging subcontractors have identified a number of concerns, unmet material needs, and opportunities for material suppliers. The table below summarizes some general issues and topics identified particular material segment.

Key Issues and Concerns of Users of Packaging Materials

Material Segment

Issues, Concerns, and Needs


  • Concern about quality suppliers possibly exiting in market
  • Limited sources for high pin count leadframe CSP
  • Longer lead times, especially for quick turn projects given limited investments by the suppliers

Organic Substrates

  • Quality supplier base is available and it is geographically diversified
  • Need for thin and coreless substrates and for finer line/space features
  • Warpage control during assembly and optimum material properties to balance component and board level reliability

Bonding Wire

  • With the emergence of silver wire, what will the industry trend be with gold, copper and silver wires?
  • Improvements in palladium-coated copper alloy to address pad peeling and ball lift
  • For silver, reducing the oxidation and better understanding interactions with other materials and longer-term reliability
  • Unknowns concerning capabilities with new suppliers

Mold Compounds/ Encapsulants

  • Stable supplier base in place
  • Improvements needed in low stress materials, including low alpha1 properties
  • Improvements in high temperature materials for automotive applications and thermally conductivity for power devices
  • Smaller fillers for Molded Underfill (MUF)

Die Attach

  • High thermal conductivity including film type
  • Backside coated materials still in development; especially need for conductive materials
  • Thinner films materials


  • Plenty of supplier choices for “standard” applications.
  • Optimum material properties to balance solder bump and low-K and ultra-low-K dielectric reliability and warpage.
  • For Cu pillar and fine pitch applications, limited supplier options.

Solder Balls

  • Several suppliers exited business because of low margins and price pressure
  • Trends to finer pitch balls
  • Improved current carrying capability
  • For WLP-CSP, temperature cycle impact with larger die size

Wafer Level Dielectrics

  • Polyimide standard
  • Desire low temperature cure (<200C)
  • Need for materials compatible with ultra low-k dielectrics at 28nm and below silicon nodes

Thermal Interface Materials

  • Thermal conductivity, bond line thickness, voids, interfacial wetting and adhesion
  • Multifunctional materials

Source: SEMI Industry Research & Statistics and TechSearch International, November 2013 

Not included in the table summary is the oft repeated and obvious call for lower cost material solutions desired by the manufacturers across the various material segments. The needs and solutions identified in the table encompass the materials challenges with 3D integration and wafer-level packaging in addition to the single package solutions that continue to dominate the market.

The information in this article was derived from the Global Semiconductor Packaging Materials Outlook—2013-2014 Edition, produced by SEMI and TechSearch International. The report will be published later in the fourth quarter and is based on information obtained from well over 100 in-depth interviews conducted with semiconductor manufacturers, packaging subcontractors, and packaging materials suppliers throughout the world.

TO ORDER YOUR COPY of Global Semiconductor Packaging Materials Outlook — 2013-2014 Edition, please contact Dr. Dan P. Tracy, research development director, Industry Research and Statistics, SEMI via email at, or telephone 1.408.943.7987 or facsimile 1.408.943.7915. You can also click here for sample, pricing, and ordering information.

November 5, 2013