SEMICON Taiwan 2013 Examines Embedded Substrate Technology

SEMICON Taiwan 2013 Examines Embedded Substrate Technology

By SEMI Taiwan

SEMICON Taiwan 2013
September 4-6

With the demands from powerful portable consumer products, realization of lower power consumption and improved functionality/bandwidth in a smaller package becomes an issue for the industry. Thus the technology sector has its eyes focused on 3D-IC and embedded substrate technology. This trend is also driving advances in embedded interconnects, and development in equipment and materials for packaging design.

Yang Rui-Ling, manager of system IC and process research department at ITRI IEK, mentioned that global mobile phone shipments will reach 2.1 billion in 2015, comprising 740 million traditional phones, 570 million low- to mid-range smart phones, and 850 million high-end smart phones. Market segregation will also require different packaging processes. According to IEK's prediction, the penetration rate for packaging processes for 3D-IC (TSV) is 2 percent, FO-WLPoP is 3 percent, embedded SiP is 3 percent, FC-POP is 33 percent, and FBGAFCCSP is 59 percent.

Yang emphasized that even though foundry holds an advantage in the 3D-IC (TSV) markets with its superior process integration capabilities over the backend vendors, the IC packaging/testing vendors can still gain footing with FOWLP or embedded 3D-IC processes, because they have the advantage in the embedded and glass intermediary layer. He also revealed that recently Japanese packaging/testing vendors plan to release their higher-end technologies. Taiwanese vendors should take this opportunity to collaborate with them for a head start in emerging technologies and next-generation IC packaging demands.

Li Sheng-Zhou of Unimicron pointed out that the cost reduction, reduced thickness, and compact size of embedded processes will aid in the innovation of 3D packaging technology. Since 2008, Unimicron has started to develop their discrete device embedded process and is currently capable of mass producing the FCCSP and FCBGA components with embedded capacitors. The main design concerns of this technology process are the embedded MLCC design, laser through-hole, cavity forming, and inspection process. In addition, they would have to overcome design challenges in the laser through-hole interconnect process, PCB thickness, high-density, and fine pitch. Unimicron is also investing in the active embedded devices, initially focusing on components with a lower pin count, with the processes currently undergoing evaluation.

In terms of trend and prospects of advanced 3D IC packaging materials, Zhang Zhi-Ji, analyst at IEK material chemical lab, mentioned that to commercialize 3D-IC the industry still needs to overcome barriers in the TSV process, thermal management, tension/interconnect reliability, I/O standards, industry infrastructure and supply chain. As such, this also brings along various difficulties in the materials and equipment used. In addition, various stacked CSP, PoP, and TSV packaging require the use of bonding film, substrate with ultra-low thermal expansion coefficient, potting, temporary bonding, or dielectric material technologies.

Statistics show that the global 3D IC/WLP materials and supplies market will quickly grow from the US$65 million of last year to US$18 billion in 2016. Zhang pointed out for the Taiwanese vendors, there will be great opportunities in basic material/supplies and equipment, including photoresistance, the deposition of metallic materials, permanent bonding materials, PVD modules, PECVD modules, and lamination machines etc. He added that Taiwanese vendors, while already possessing a good level of technological capacity, should strive to pick the best possible timing to enter the 3D IC material market at this present stage. By collaborating with international equipment or material vendors, Taiwanese vendors should be able to achieve the goal of domestic production.

SEMICON Taiwan New 3D-IC & Substrate Pavilion

Looking forward, reaching the last mile of heterogeneous integration lies within the development of embedded substrate technology and relative materials for the industry. Square on the backs of the explosive demand for 3D-IC and substrate processes, SEMICON Taiwan is introducing a new “3D IC and Substrate” Pavilion to combine technical presentation, free publicity, business matching, and customer interaction for the industry. The pavilion will be held in conjunction with the SiP Global Summit, one of the most influential international forums in the 3D-IC technology field. Meet prospects from the packaging/testing industry including high-level management, R&D, and procurement personnel and get connected at SEMICON Taiwan 3D-IC and Substrate Pavilion, and maximize chances to get a share of the flourishing 3D-IC market!  

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