SiP Global Summit : Embedded Technology Forum

 
 
Embedded Technology Forum
Friday, September 6th, 2013
08:30 –15:50 
Room 504 BC, 5F, TWTC Nangang Exhibition Hall, Taipei

   
Theme: Bridging the Last Mile: Chip-to-Substrate Interconnections
        
Forum Objectives:
(1) Discover Killer Application for Embedded Die Packaging
(2) Supply Chain and World-wide Leading Progress of this Emerging Packaging
(3) Discuss the Cost / Technology Challenge & Potential Solution
 
 
 
Outline:

Will "embedded die" be a cost-effective 3D solution? For potential mobile applications, embedded die has been considered another 3D-compatible technology and key element for miniaturization and ultra-thin 3D packaging. While several reconfigured wafer-molded or panel-level alternatives have been developed, remaining challenges still come from the process integration with known-good-die yield risk, precise die positioning, reliability issues and even supply chain R&R associated in the new business model.

To explore the path forward to cost-effective 3D approach, Embedded Technology Forum invites key contributors to share their latest achievements with technology progress in process & materials and re-visit the production readiness & cost structure. 

 

Brought to you by    

SEMI Taiwan PKG&TEST Committee

Program Organizing Committee

Program Steering Committee

 


General Chair:
Dr. Ho-Ming Tong / 唐和明
Chairman, SEMI Taiwan PKG&TEST Committee / General Manager & Chief R&D Officer, ASE Group
Forum Chair & Morning Session Moderator:
Dr. Wei-chung Lo / 駱韋仲, Director, Package Technology Div./Electronic & Optoelectronic Research  Laboratory, ITRI
Forum Co-Chair
Mr. Chia-Pin Lee / 李嘉彬President, Unimicron Technology Corp.
Afternoon Session Moderator:
Dr. Dyi-Chung Hu / 胡迪群, Sr. VP, R&D and New Business Development, Unimicron Technology Crop.
Organized by
 
 
 
 
 
Technical Sponsored by

 

 
 

 
 
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Agenda
Time 
Title / Speaker
08:30 – 09:00

Registration

09:00 – 09:10

Welcome / Opening Remarks

 1. Dr. Rolf Aschenbrenner, Deputy Director, Fraunhofer IZM

 2. Dr. Wei-chung Lo 駱韋仲, Director, Package Technology Div. / Electronic & Optoelectronic Research Laboratory, ITRI

09:10 – 09:40
Market Overview - Extension Embedded Technology to Wider Application
Mrs. Rozalia Beica, CTO & Business Unit Director, Yole Développement

09:40 – 10:10

Applications of Fan-Out Wafer Level Packaging
Dr. Beth Keser, Senior Staff Manager, Package Engineering, Qualcomm Incorporated
10:10 – 10:30
Break Time

10:30 – 11:00

Embedded Component in Panel Production
Mr. Mark Beesley, COO Advanced Packaging, AT&S AG

11:00 – 11:30

Panel Level Embedded Technology
Dr. Dyi-Chung Hu / 胡迪群, Sr. VP, R&D and New Business Development, Unimicron Technology Crop.

11:30 – 12:00

A Trace-Embedded Coreless Substrate Technique
Mr. Albert Lan / 藍章益, Sr. Director, Engineering Center -Customer Advanced Packaging, SPIL
12:00 – 13:30
Lunch Break

13:30 – 13:40

Welcome Remarks
Dr. Dyi-Chung Hu / 胡迪群, Sr. VP, R&D and New Business Development, Unimicron Technology Crop.

13:40 – 14:10

Fan-out Wafer-level Technology – Extending Moore’s Law to the Packaging Domain
Dr. Raj Pendse, Vice President & Chief Marketing Officer, Product & Technology Marketing (PTM), STATS ChipPAC Ltd.

14:10 – 14:40

Solder Material Technology for Embedded Package
Mr. Tetsuya Okuno 奥野 哲也, Senior Counselor, GM, Senju Metal Industry Co.,LTD

14:40 – 15:10

A New Embedded Package Structure and Technology for Next Generation of WLP, The Wafer Level Fan-out Package - WFOPTM 
Mr. Akio Katsumata, General Manager Packaging Research & Development Center, J-Devices Corporation

15:10 – 15:40

Expectation of Embedded Device Technology and Key Challenging Area
Mr. Takashi Kariya, Division Manager, R&D Operation, Electronics Development Division, IBIDEN CO., LTD.

15:40 – 15:50

Closing Remarks
Dr. Dyi-Chung Hu / 胡迪群, Sr. VP, R&D and New Business Development, Unimicron Technology Crop.
 
● Programs are subject to change without prior notice.
All presentations will be conducted in English
No recording/ photography during seminar.
 
 
 
Forum Fee
Price & Member Types
Original & On-site Price
Non-Member 
USD$ 235
NTD$ 6,500 
SEMI Member
IEEE Member
USD$195
NTD$5,000
* Price is not included with 5% tax