SiP Global Summit : 3D IC Technology Forum
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3D IC Technology Forum |
Thursday, September 5th, 2013 | |
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Forum Objectives: (1) Review 2.5D/3D IC Market Situation (2) Discuss Barrier(or Challenge) to Volume Adoption of 3D IC (3) Best Practice Knowledge Sharing for Cost & Yield (4) Discuss the Optimal Standardization on Eco-system and Process Flow. |
Outline: While the whole supply chain is preparing for 3D IC readiness with a given developing infrastructure & facilities to support its go-to-market, and when 2.5D IC design had been adopted by advanced product. However, the ecosystem is looking forward to achieving a faster volume adoption and wider market penetration to ICT products. Although many valuable perspectives had been addressed about 3D IC in recent years, this 2013 3D IC Technology Forum is to provide further guidance on the path between 2.5DIC and 3DIC from both market and technology drivers. The core issues of yield, standardization and cost will also be addressed to ensure maturity for high volume 2.5D / 3DIC production with TSV. Brought to you by |
General Chair: 唐和明, Chairman, SEMI Taiwan PKG&TEST Committee / General Manager & Chief R&D Officer, ASE Group |
Forum Chair & Moderator: Mr. Mike Liang/ 梁明成, President, Amkor Technology艾克爾國際科技股份有限公司 總經理, Chairman, SEMI Taiwan PKG&TEST Committee |
Forum Co-Chair(TBD) |
Dr. CP Hung / 洪志斌, VP of Corporate R&D, ASE |
Panel Discussion Moderator:(TBD) |
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Time | Title / Speaker |
08:30 – 09:00 | Registration |
09:00 – 09:20 | Welcome / Opening Remarks 1. Executive, SEMI 2. Dr. Ho-Ming Tong / 唐和明, Chairman, SEMI Taiwan PKG&TEST Committee / General Manager & Chief R&D Officer, ASE Group 3. Mr. Mike Liang/ 梁明成, President, Amkor Technology艾克爾國際科技股份有限公司 總經理, Chairman, SEMI Taiwan PKG&TEST Committee |
09:20 - 09:50 | Opening Speech – Technology Overview (From Advanced Package to 2.5D/3D IC) Mr. Choon-Heung Lee, EVP & CTO, Amkor |
09:50 - 10:20 | Keynote Speech - 3D IC Last Mile to Product Adaption (Benefit/Advantage to consumer & system) Dr. Steve Bezuk, VP, Qualcomm ( Inviting) |
10:20 - 10:30 | Break Time |
10:30 - 11:00 | 3D IC Market Opportunities CEO,Yole |
11:00 - 11:30 | 3D IC (Interposer & Stacking) Cost Effective Technology Solution-Foundry / OSAT Mr. Jerry Tzou / 鄒覺倫 Deputy Director, Backend Business Devision, TSMC |
11:30- 12:00 | 3D IC (Interposer & Stacking) Cost Effective Technology Solution-Process, Equipment and Materials |
12:00-13:30 | Lunch Break |
12:30-12:35 | Welcome Remarks |
| 13:35–14:05 | A Holistic Method for 3D-IC Realization Mr. Brandon Wang , Director, 3D-IC Solutions, Silicon Realization Group,Cadence Design Systems, Inc |
| 14:05–14:35 | DfM & Technology Readiness - Test for TSV Perspective Mr.Greg Smith, General Manager,
Computing and Communications Business Unit, Semiconductor Test Division, Teradyne |
| 14:35–15:05 | DfM & Technology Readiness – Equipment /Process Perspective (Temp Bond/Debond) SUSS |
| 15:05–15:35 | DfM & Technology Readiness – Underfill Design and Trend for 2.5D/3D with TSV Package Haruyuki Yoshii / 吉井東之, Group Manager, Technical R&D DIV.,NAMICS |
15:35–15:45 | Break |
15:45–17:00 | Panel Discussion: “3D IC Supply Chain Synergy ” Moderator: Dr. Ian Chan, Hermes-Epitek Keynote Presentation:Meterial-Driven Process Development as a New Mode for Industry Collaboration Dr. Terry Brewer, CEO, Brewer Science (20 mins) Panelists: 1.Mr.
Choon-Heung
Lee, CTO, Amkor
2.Dr.
CP Hung, VP of Corporate R&D, ASE Group
3.Dr.
Terry Brewer, CEO, Brewer Science
4.Dr.
Mike Ma, Vice President, Corporate R&D, SPIL
5.Dr.
Steve Bezuk,
VP, Qualcomm (Inviting)
6.Mr.
Jerry Tzou,
Deputy Director, Backend Technology and Service Div., TSMC
7.Mr. Gregory
Smith, General Manager, Semiconductor Test Division, Teradyne |
17:00 | Adjournment |


