An Update on 450mm Activities in SEMI Standards – April 2011
There is a good level of enthusiasm for 450mm from SEMI Standards volunteers which has translated to progress on multiple 450mm standards document activities. This article provides a brief status report of these activities. First, we take a look at the published SEMI 450mm specifications, these include:
- SEMI E158-1110 - 450mm front-opening unified pods (FOUPs), and
- SEMI E154-1110 – Loadports. (The two aforementioned specifications were developed to be used in together.)
- SEMI E156-0710 - Interface between stockers and transport components
With the publication of these specifications, the industry can now focus on initial research and development of interfaces, processes, materials, and equipment which would be ultimately required for semiconductor manufacturing on 450mm wafers.
Specifications not yet in development include circuit-quality 450mm wafers, however, it should be noted that specifications have been published for:
- SEMI M74-1108- R&D and semiconductor equipment (e.g., wafer carriers, loadports, AMHS) design investigation (mechanical handling wafers)
- SEMI M76-0710 - process and metrology equipment R&D
(single crystal wafers)
The single crystal wafers specified in SEMI M76 can also be used to establish the techniques and metrology necessary to support a dimension specification for circuit-quality 450mm wafers. For the 450mm wafer size, edge profile and flatness need to be refined further than what has been used for smaller wafer sizes, and specifications for each of these are in development as Draft Documents 4588 and 4812, respectively.
- Plus, development of a specification for 450 mm polished wafer (Draft Document 5090) is in progress.
Progress in FOSB
A specification for a front-opening shipping box (FOSB) has been completed (Draft Document 4760), along with a specification for a new carrier for 450mm wafers, the Multi-Application Carrier (MAC) (Draft Document 4770). The MAC is focused on silicon manufacturing and processed wafer shipping and is designed to be compatible with both loadports and especially FOUPs, using the same envelope, factory integration, and interoperability interfaces. Both 4760 and 4770 have passed technical committee review. The next step is for the development of a specification for 450 mm wafer shipping system (Draft Document 5069) which will address: materials, dimensions and necessary items related to 450 mm wafer shipping system, such as wafer shipping boxes, bags, labels, cushions, secondary containers, pallets, and shipping documentation.
Progress in Assembly and Packaging
- Published: SEMI G88-0211 - Specification for Tape Frame for 450 mm Wafer
- Documents in development: specifications for frame cassettes (Draft Document 4814) and load ports for frame carriers (Draft Document 4965)
There is a diverse and certainly broad-based level of understanding that is required to work on these documents. And, there has to be consensus and cooperation across the technical committees sponsoring their development and in order for these documents to be utilized together as intended.
An Auxiliary document is currently being developed that would serve as a guide to SEMI standard for 450mm wafers (Draft Document 5108).
The image below shows where 450mm standards development is taking place.
For more information
All of the published standards in this article are available in SEMIViews. Individual standards can be purchased from the SEMI Web store using the links below.
SEMI E154-1110, Mechanical Interface Specification for 450 mm Load Port
SEMI E158-1110, Mechanical Specification for Fab Wafer
Carrier Used to Transport and Store 450 mm Wafers
(450 FOUP) and Kinematic Coupling
SEMI E156-0710, Mechanical Specification for 450 mm AMHS Stocker to Transport Interface
SEMI G88-0211, Specification for Tape Frame for 450 mm Wafer
SEMI M74-1108, Specification for 450 mm Diameter Mechanical Handling Polished Wafers
SEMI M76-0710, Specification for Developmental 450 mm Diameter Polished Single Crystal Silicon Wafers
For additional information on draft documents under development, see the Standards New Activity Report Forms (SNARFs) linked below.
4588, New Standard: Guide for Specifying Edge Profile of 450 mm Silicon Wafers
4812, New Standard: Guide for Flatness Measurement on 450 mm Wafers
4760, New Standard: Mechanical Specification for 450 mm Shipping Box Used to Transport and Ship 450 mm Wafers
4770, New Standard: 450 mm Horizontal Multi-Application Carrier
4814, Specification for Frame Cassette for 450 mm Wafer
4965, Specifications for Load Port for 450mm Frame Carrier
5069, New Standard: Specification for 450 mm Wafer Shipping System
5090, Revision of SEMI M1-0311, Specifications for Polished Single Crystal Silicon Wafers to incorporate specifications for polished 450 mm silicon wafers
5108, New auxiliary document: Overview guide to SEMI standard for 450mm wafer
About the Silicon Wafer, Physical Interfaces & Carriers, and Assembly & Packaging Committees
Physical Interfaces & Carriers Committee
This committee develops specifications to enhance the manufacturing capability of the semiconductor industry, specifically addressing mechanical, electrical, and special equipment specifications; and material movement integration, including substrate support and containment structures. For more information on committee activities, please contact Ian McLeod at email@example.com or Hiro'fumi Kanno at firstname.lastname@example.org.
Silicon Wafer Committee
This committee develops international standards fulfilling the requirements for commercial silicon wafers. Silicon Wafer Committee standardization includes specifications and guides for silicon wafers, test methods for silicon wafer quality and geometry, shipping box related topics, wafer ID related topics, and business related topics to support smooth communication between silicon suppliers and customers. For more information on committee activities, please contact Kevin Nguyen at email@example.com or Akiko Yamamoto at firstname.lastname@example.org.
Assembly & Packaging Committee
This committee develops specifications to enhance the manufacturing capability of the semiconductor industry as it relates to the packaging and assembly of the semiconductor chip, including the materials, piece parts, and interconnection schemes, and unique packaging assemblies that provide for the communication link between the semiconductor chip and the next level of integration. This committee also discusses total infrastructure for Chip to Final Set system and processes such as Testing and Design Software, Transportation Tools, Reliability and Traceability issues, EHS issues, Inspection methods, etc. For more information on committee activities, please contact Paul Trio at email@example.com or Hiro'fumi Kanno at firstname.lastname@example.org.