Building Information Modeling (BIM) for Semiconductor Capital Equipment TF

Building Information Modeling (BIM) for Semiconductor Capital Equipment TF

Kevin Nguyen, SEMI Standards

The SEMI Standards Building Information Modeling (BIM) for Semiconductor Capital Equipment Task Force was formed recently in the North America Facilities committee in an effort to create a standard format for building information modeling.  A three-dimensional model will work with multiple different software applications and needs to reflect true dimensions of the semiconductor fabrication tool with its location and interface point. This will allow the user to build virtual models of their entire fab, optimize layouts, and plan all of the facilities requirements (routing and sizing of all of the equipment supplies). It is also expected to contain information about idle, typical, and maximum usage of each interface point.

The benefit of BIM to the semiconductor manufacturers is large when designing a new fab, with over $1 billion at stake, or when optimizing existing fabs. With the latest facilities trend, a common format that works for all semiconductor manufacturers and all BIM software, the equipment manufacturers will only have to create one BIM model per equipment configuration.

The Task Force welcomes those who are involved with capital equipment manufacturers, device manufacturers, facility builder, and software manufacturers or anyone who is interested.

The first kick off meeting will be in mid-May 2011, and a face-to-face meeting will be held at SEMICON West in San Francisco in July.  Check for the latest schedule.   For more information, please contact Kevin Nguyen (

Participation in the SEMI Standards Program is free, but member registration is required.