MP Divakar - A Holistic Approach to Thermal Management

Session 13: Emerging Capabilities

A Holistic Approach to Thermal Management in Flexible/Hybrid Electronics Using Carbon Fiber Technology
Thursday, February 15, 2018
8:00 AM - 8:25 AM

Printed and flexible / hybrid electronics (FHE) are technologies that are enabling the next generation of products not just in functional feasibility but also in cost. FHE products are thin, flexible, wearable, stretchable, lightweight, cost-effective and are environmentally friendly. FHE encompasses processes such as screen printing with stencils for circuit boards to inkjet printing, gravure printing, roll-to-roll (R2R) printing, direct ink transfer and 3D printing of electronics. Other processes for curing, drying, passivating, painting and finishing are unique to FHE. However, many electronics components including those for thermal management neither conform to the uniqueness of the manufacturing flow nor take advantage of it. Wearable FHE products for example pose unique thermal design challenges for both the components and the overall system. The operating temperatures of wearable FHE products are not just based on reliability requirements alone but also on personal comfort. Therefore components such as thermal interface materials (TIM) must be flexible, conform to the shape, be stable at all operating ranges of temperatures and meet electromechanical reliability of FHE products. In this paper, we present the unique properties and advantages of Carbon Fiber Thermal Interface (FTI), an efficiently engineered TIM stack which is customizable to suit the applications in FHE. It offers many advantages such as high thermal conductivity and provides excellent contact resistance at low pressures. TIM thicknesses ranging from 0.3mm to as high as 4mm, FTI materials are compliant and are compressible to conform to the surfaces under pressures as low as 10psi. Furthermore, when the contact pressure is removed (for rework or changes), the compressible FTI fully recovers the original form exhibiting shape memory capability. FTI also has very low CTE which enhances the thermomechanical reliability of FHE products. Very low stress relaxation and nearly zero compression set of FTI results in no degradation of low contact pressure. The mechanical stress coupling between the interface and the component is thus greatly reduced. These are attributes ideal for implementation in FHE. Some examples of thermal simulation and design implementations are presented, demonstrating the superior performance of FTI Carbon Fiber Technology.

Speaker's Biography

M.P. Divakar is founder and CEO of Stack Design Automation, a company focused on developing ECAD-MCAD integration software platform, design stacks, services and training for next-generation electronics including MEMS, 3DIC, Printed Electronics, Wearable & Stretchable Electronics and the Internet-of-Things. He has more than 18 years of experience in electronic packaging development in microwave-, millimeter-wave and RF-communications, power electronics and MEMS at component-, module- and system-level applications. He has also worked on hardware development for semiconductor test and high speed communication fabric. His expertise includes electronic & optoelectronic packaging (JEDEC, IPC, MIL-STD, & Telcordia), thermal and thermo-mechanical modeling, characterization (AnalysisTech’s Phase-10 system) and finite element simulation. FEA and CAD Systems expertise include ANSYS, ICEM CFD, DesignSpace, CAEFEM, COSMOS, Comsol, NASTRAN, LSDyna, LS PrePost, ProE, AutoCAD and SolidWorks. His professional experience includes serving as the Chief Engineer, Copper Ethernet at Panduit where he led a group developing gigabit and 10Gig, 40Gig and 100Gig connectivity products. He has also worked for Power-One, Peregrine Semiconductor, InTest and Remec. He has more than 30 publications, 10 issued patents and many applications pending. He is a Senior Member of IEEE and a Fellow of the Institution of Engineers (India). He is an active contributor to EE Times and participates in the 3DIC & MEMS standards activities of SEMI and GSA. He has published several articles in the technical press and organized and chaired sessions at conferences in the Silicon Valley. He also serves as Vice Chair for the Silicon Valley Chapter of the IEEE Communications Society. He holds a PhD from Arizona State University, an MSc from The University of Calgary, and a B Eng from the University of Mysore (India).


MP Divakar
Stack Design Automation